Re: [PATCH v3] pci: Work around PCIe link training failures

2022-01-17 Thread Maciej W. Rozycki
On Sat, 15 Jan 2022, Tom Rini wrote: > > Keep the 2.5GT/s speed restriction then, conservatively, if functional > > once applied. > > > > Signed-off-by: Maciej W. Rozycki > > Reviewed-by: Stefan Roese > > Applied to u-boot/master, thanks! Great, thank you all for input and reviews! Macie

Re: [PATCH v3] pci: Work around PCIe link training failures

2022-01-15 Thread Tom Rini
On Sat, Nov 20, 2021 at 11:03:30PM +, Maciej W. Rozycki wrote: > Attempt to handle cases with a downstream port of a PCIe switch where > link training never completes and the link continues switching between > speeds indefinitely with the data link layer never reaching the active > state. >

Re: [PATCH v3] pci: Work around PCIe link training failures

2022-01-13 Thread Stefan Roese
On 11/21/21 00:03, Maciej W. Rozycki wrote: Attempt to handle cases with a downstream port of a PCIe switch where link training never completes and the link continues switching between speeds indefinitely with the data link layer never reaching the active state. It has been observed with a downs

Re: [PATCH v3] pci: Work around PCIe link training failures

2022-01-12 Thread Maciej W. Rozycki
On Wed, 12 Jan 2022, Tom Rini wrote: > > I believe this version has addressed all concerns raised in the review > > thus far. With the nature of a problem better understood now I'm sending > > a corresponding update for Linux as well. > > What as the feedback to your Linux change? Is this es

Re: [PATCH v3] pci: Work around PCIe link training failures

2022-01-12 Thread Tom Rini
On Sat, Nov 20, 2021 at 11:03:30PM +, Maciej W. Rozycki wrote: > Attempt to handle cases with a downstream port of a PCIe switch where > link training never completes and the link continues switching between > speeds indefinitely with the data link layer never reaching the active > state. >

[PING][PATCH v3] pci: Work around PCIe link training failures

2022-01-02 Thread Maciej W. Rozycki
On Sat, 20 Nov 2021, Maciej W. Rozycki wrote: > Attempt to handle cases with a downstream port of a PCIe switch where > link training never completes and the link continues switching between > speeds indefinitely with the data link layer never reaching the active > state. Ping for:

[PATCH v3] pci: Work around PCIe link training failures

2021-11-20 Thread Maciej W. Rozycki
Attempt to handle cases with a downstream port of a PCIe switch where link training never completes and the link continues switching between speeds indefinitely with the data link layer never reaching the active state. It has been observed with a downstream port of the ASMedia ASM2824 Gen 3 swi