Re: [PATCH v2 2/4] net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V

2023-07-23 Thread Leo Liang
On Thu, Jul 20, 2023 at 07:37:27PM +0800, Minda Chen wrote: > For RISC-V architeture, hardware maintain the dcache coherency. > Software do not flush the cache. So even cache-line size larger > than descriptor size, driver can work. > > Signed-off-by: Minda Chen > --- > drivers/net/rtl8169.c | 4

[PATCH v2 2/4] net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V

2023-07-20 Thread Minda Chen
For RISC-V architeture, hardware maintain the dcache coherency. Software do not flush the cache. So even cache-line size larger than descriptor size, driver can work. Signed-off-by: Minda Chen --- drivers/net/rtl8169.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/driver