On 01/10/2024 17:47, Marek Vasut wrote:
On 10/1/24 5:32 PM, Neil Armstrong wrote:
On 01/10/2024 17:21, Marek Vasut wrote:
On 7/24/24 5:48 PM, Neil Armstrong wrote:
The current flush operation will omit doing a flush/invalidate on
the first and last bytes if the base address and size are not al
On 10/1/24 5:32 PM, Neil Armstrong wrote:
On 01/10/2024 17:21, Marek Vasut wrote:
On 7/24/24 5:48 PM, Neil Armstrong wrote:
The current flush operation will omit doing a flush/invalidate on
the first and last bytes if the base address and size are not aligned
with DMA_MINALIGN.
This causes ope
On 01/10/2024 17:21, Marek Vasut wrote:
On 7/24/24 5:48 PM, Neil Armstrong wrote:
The current flush operation will omit doing a flush/invalidate on
the first and last bytes if the base address and size are not aligned
with DMA_MINALIGN.
This causes operation failures Qualcomm platforms.
Take i
On 7/24/24 5:48 PM, Neil Armstrong wrote:
The current flush operation will omit doing a flush/invalidate on
the first and last bytes if the base address and size are not aligned
with DMA_MINALIGN.
This causes operation failures Qualcomm platforms.
Take in account the alignment and size of the b
The current flush operation will omit doing a flush/invalidate on
the first and last bytes if the base address and size are not aligned
with DMA_MINALIGN.
This causes operation failures Qualcomm platforms.
Take in account the alignment and size of the buffer and also
flush the previous and last c
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