Re: [PATCH V3 2/2] spi: cadence_qspi: use STIG mode for small reads

2022-12-13 Thread Dhruva Gole
Hey Pratyush, Thanks for reviewing. On 13/12/22 05:05, Pratyush Yadav wrote: On 25/11/22 11:29AM, Dhruva Gole wrote: Fix the issue where some flash chips like cypress S25HS256T return the value of the same register over and over in DAC mode. For example in the TI K3-AM62x Processors refer [0]

Re: [PATCH V3 2/2] spi: cadence_qspi: use STIG mode for small reads

2022-12-13 Thread Pratyush Yadav
On 25/11/22 11:29AM, Dhruva Gole wrote: > Fix the issue where some flash chips like cypress S25HS256T return the > value of the same register over and over in DAC mode. > > For example in the TI K3-AM62x Processors refer [0] Technical Reference I know where to find the useful information in this

Re: [PATCH V3 2/2] spi: cadence_qspi: use STIG mode for small reads

2022-11-28 Thread Vaishnav Achath
On 25/11/22 11:29, Dhruva Gole wrote: > Fix the issue where some flash chips like cypress S25HS256T return the > value of the same register over and over in DAC mode. > > For example in the TI K3-AM62x Processors refer [0] Technical Reference > Manual there is a layer of digital logic in front

[PATCH V3 2/2] spi: cadence_qspi: use STIG mode for small reads

2022-11-24 Thread Dhruva Gole
Fix the issue where some flash chips like cypress S25HS256T return the value of the same register over and over in DAC mode. For example in the TI K3-AM62x Processors refer [0] Technical Reference Manual there is a layer of digital logic in front of the QSPI/OSPI Drive when used in DAC mode. This