On 5/6/22 10:39, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/22/22 09:38, Patrice Chotard wrote:
>> On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
>> Example:
>> If GPIO bank have 16 GPIO pins [0-15].
>> In particular SoC's package case, some GPIO bank can have less GP
Hi,
On 4/22/22 09:38, Patrice Chotard wrote:
On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
Example:
If GPIO bank have 16 GPIO pins [0-15].
In particular SoC's package case, some GPIO bank can have less GPIO pins:
- [0-10] => 11 pins;
- [2-7] => 6 pins.
On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
Example:
If GPIO bank have 16 GPIO pins [0-15].
In particular SoC's package case, some GPIO bank can have less GPIO pins:
- [0-10] => 11 pins;
- [2-7] => 6 pins.
Commit dbf928dd2634 ("gpio: stm32f7: Add gpio bank h
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