Re: [PATCH 2/2] rockchip: clk: rk3188: enable bwadj for rk3188 DPLL

2020-06-27 Thread Alexander Kochetkov
Hi Kever, Strange… Then I tested a year ago I saw, that writing into bwadj registers had no effect for some PLLs. But now I did another test. See patch and output. Looks like rk3188 allow writing into bwadj fields. So I do something like 'priv->has_bwadj = 1' in the rk3188_clk_probe() and se

Re: [PATCH 2/2] rockchip: clk: rk3188: enable bwadj for rk3188 DPLL

2020-06-27 Thread Kever Yang
Hi Alex,     I think it will be better to update the rk3188_clk_probe() function instead of what you have modified if the RK3188 and RK3188A has the same PLL(I'm not sure about it now). Thanks, - Kever On 2020/6/22 下午9:17, Alexander Kochetkov wrote: Empirically, I found that DPLL on rk

[PATCH 2/2] rockchip: clk: rk3188: enable bwadj for rk3188 DPLL

2020-06-22 Thread Alexander Kochetkov
Empirically, I found that DPLL on rk3188 has bwadj registers. Configuring DPLL with bwadj increase DPLL stability. Because of DPLL provide clock for ethernet, enabling bwaj reduces the number of errors on the ethernet. Signed-off-by: Alexander Kochetkov --- drivers/clk/rockchip/clk_rk3188.c | 8