Re: [PATCH 1/2] riscv: sifive: fu540: enable all cache ways from U-Boot proper

On Fri, May 29, 2020 at 2:45 PM Pragnesh Patel wrote: > > Add L2 cache node to enable all cache ways from U-Boot proper. > > Signed-off-by: Pragnesh Patel > Reviewed-by: Bin Meng > --- > arch/riscv/cpu/fu540/Makefile | 1 + > arch/riscv/cpu/fu540/cache.c | 53 +

[PATCH 1/2] riscv: sifive: fu540: enable all cache ways from U-Boot proper

Add L2 cache node to enable all cache ways from U-Boot proper. Signed-off-by: Pragnesh Patel Reviewed-by: Bin Meng --- arch/riscv/cpu/fu540/Makefile | 1 + arch/riscv/cpu/fu540/cache.c | 53 +++ arch/riscv/dts/fu540-c000-u-boot.dtsi | 4 ++ arc