Hi Michael,
> > > Thank you for adding those patches. We are working on mipi support
> > > here and some of the clock patches
> > > are there too. I will try to look and rebase our patchset
> > >
> > > https://patchwork.amarulasolutions.com/patch/3401/
> >
> > Thanks for letting me know. Indeed
Hi Miquel,
Thanks for the series.
On Tue, Sep 10, 2024 at 7:21 AM Miquel Raynal wrote:
> Miquel Raynal (8):
> dm: core: Add a helper to retrieve devices through graph endpoints
> clk: Ensure the parent clocks are enabled while reparenting
> clk: imx8mp: Add media related clocks
> imx: p
Hi Miquel
On Tue, Sep 10, 2024 at 2:56 PM Miquel Raynal wrote:
>
> Hi Michael,
>
> mich...@amarulasolutions.com wrote on Tue, 10 Sep 2024 12:30:42 +0200:
>
> > Hi Miquel
> >
> > On Tue, Sep 10, 2024 at 12:13 PM Miquel Raynal
> > wrote:
> > >
> > > In order to display a boot picture or an error m
Hi Michael,
mich...@amarulasolutions.com wrote on Tue, 10 Sep 2024 12:30:42 +0200:
> Hi Miquel
>
> On Tue, Sep 10, 2024 at 12:13 PM Miquel Raynal
> wrote:
> >
> > In order to display a boot picture or an error message, the i.MX8MP
> > display pipeline must be enabled. The SoC has support for va
Hi Miquel
On Tue, Sep 10, 2024 at 12:13 PM Miquel Raynal
wrote:
>
> In order to display a boot picture or an error message, the i.MX8MP
> display pipeline must be enabled. The SoC has support for various
> interfaces (LVDS, HDMI, DSI). The one supported in this series is the
> standard 4-lane LVD
In order to display a boot picture or an error message, the i.MX8MP
display pipeline must be enabled. The SoC has support for various
interfaces (LVDS, HDMI, DSI). The one supported in this series is the
standard 4-lane LVDS output. The minimal setup is thus composed of:
* An LCD InterFace (LCDIF)
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