> From: Achath, Vaishnav
>
> J721E SoC has a hyperbus controller and OSPI controller muxed and only
> one of the controllers should be active at a time
>
> While enabling support for hyperflash in J721E, the hyperbus controller
> was enabled by default in SoC DTS and was kept disabled in board D
J721E SoC has a hyperbus controller and OSPI controller muxed and only
one of the controllers should be active at a time
While enabling support for hyperflash in J721E, the hyperbus controller
was enabled by default in SoC DTS and was kept disabled in board DTS.
For J721E SK, the board level DTS d
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