Re: [PATCH 0/2] Add riscv semihosting support in u-boot

Hi Sean, Will address your comment in v2 by moving the ARM and RISCV code to generic lib/semihosting.c. On Thu, Sep 15, 2022 at 8:55 PM Sean Anderson wrote: > > Hi Kautuk, > > On 9/15/22 8:45 AM, Kautuk Consul wrote: > > [You don't often get email from kcon...@ventanamicro.com. Learn why this i

[PATCH 0/2] Add riscv semihosting support in u-boot

Semihosting is a mechanism that enables code running on a target to communicate and use the Input/Output facilities on a host computer that is running a debugger. This patchset adds support for semihosting in u-boot for RISCV64 targets. Compilation and test commands for SPL and S-mode configuratio

Re: [PATCH 0/2] Add riscv semihosting support in u-boot

Hi Kautuk, On 9/15/22 8:45 AM, Kautuk Consul wrote: > [You don't often get email from kcon...@ventanamicro.com. Learn why this is > important at https://aka.ms/LearnAboutSenderIdentification ] > > Semihosting is a mechanism that enables code running on > a target to communicate and use the Inpu