On 4/18/25 18:44, Patrick DELAUNAY wrote:
> Hi,
>
> On 4/11/25 18:03, Patrice Chotard wrote:
>> From: Simeon Marijon
>>
>> TAMP backup registers will be exposed as nvmem cells.
>>
>> Each registers ([0..127] for STM32MP2, [0..31] for STM32MP1) could be
>> exposed as nvmem cells under the nvram
Hi,
On 4/11/25 18:03, Patrice Chotard wrote:
From: Simeon Marijon
TAMP backup registers will be exposed as nvmem cells.
Each registers ([0..127] for STM32MP2, [0..31] for STM32MP1) could be
exposed as nvmem cells under the nvram node in device tree
Signed-off-by: Simeon Marijon
Signed-off-b
From: Simeon Marijon
TAMP backup registers will be exposed as nvmem cells.
Each registers ([0..127] for STM32MP2, [0..31] for STM32MP1) could be
exposed as nvmem cells under the nvram node in device tree
Signed-off-by: Simeon Marijon
Signed-off-by: Patrice Chotard
---
arch/arm/mach-stm32mp/
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