On 09/06/2020 19:47, Michael Nazzareno Trimarchi wrote:
Hi,
that looks much better now, thanks! Some suggestion below.
> On Tue, Jun 9, 2020 at 6:13 AM Bin Meng wrote:
>>
>> Hi André,
>>
>> On Mon, Jun 8, 2020 at 9:52 PM André Przywara wrote:
>>>
>>> On 07/06/2020 12:22, Jagan Teki wrote:
>>>
Hi all
On Tue, Jun 9, 2020 at 6:13 AM Bin Meng wrote:
>
> Hi André,
>
> On Mon, Jun 8, 2020 at 9:52 PM André Przywara wrote:
> >
> > On 07/06/2020 12:22, Jagan Teki wrote:
> >
> > Hi,
> >
> > (CC: ing Mark)
> >
> > Without looking to deep, I think invalidating the cache might be the
> > right th
Hi André,
On Mon, Jun 8, 2020 at 9:52 PM André Przywara wrote:
>
> On 07/06/2020 12:22, Jagan Teki wrote:
>
> Hi,
>
> (CC: ing Mark)
>
> Without looking to deep, I think invalidating the cache might be the
> right thing to do, but the rationale or at least the wording of it seems
> somehow flawed
Hi
On Mon, Jun 8, 2020 at 3:52 PM André Przywara wrote:
>
> On 07/06/2020 12:22, Jagan Teki wrote:
>
> Hi,
>
> (CC: ing Mark)
>
> Without looking to deep, I think invalidating the cache might be the
> right thing to do, but the rationale or at least the wording of it seems
> somehow flawed:
>
> >
On 07/06/2020 12:22, Jagan Teki wrote:
Hi,
(CC: ing Mark)
Without looking to deep, I think invalidating the cache might be the
right thing to do, but the rationale or at least the wording of it seems
somehow flawed:
> Some architecture like ARM Cortex A53, A72 would need
Please don't mix the t
On Sun, Jun 7, 2020 at 7:22 PM Jagan Teki wrote:
>
> Some architecture like ARM Cortex A53, A72 would need
> to invalidate dcache to sync the cache with the memory
> contents before flushing the cache to memory.
>
> The NVME here submitting the admin command using dma_addr
> to the memory without
Some architecture like ARM Cortex A53, A72 would need
to invalidate dcache to sync the cache with the memory
contents before flushing the cache to memory.
The NVME here submitting the admin command using dma_addr
to the memory without prior cache invalidation. This causing
dma_addr is pointing to
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