Re: [PATCH] net: phy: dp83867: Clean force link good bit

2020-02-28 Thread Michal Simek
čt 6. 2. 2020 v 16:03 odesílatel Michal Simek napsal: > > On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which > means FORCE_LINK_GOOD is already setup. Origin code was doing write but the > new code is doing read/modify/write and keep this bit untouched. That's why > ethern

Re: [PATCH] net: phy: dp83867: Clean force link good bit

2020-02-10 Thread Grygorii Strashko
On 06/02/2020 17:03, Michal Simek wrote: On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which means FORCE_LINK_GOOD is already setup. Origin code was doing write but the new code is doing read/modify/write and keep this bit untouched. That's why ethernet stop to work. Th

[PATCH] net: phy: dp83867: Clean force link good bit

2020-02-06 Thread Michal Simek
On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which means FORCE_LINK_GOOD is already setup. Origin code was doing write but the new code is doing read/modify/write and keep this bit untouched. That's why ethernet stop to work. The patch is cleaning this bit when PHYCR value