On Fri, 30 Aug 2024 15:23:34 +0800, Chia-Wei Wang wrote:
> Aspeed AST27xx SoCs integrate the CPTRA 1.0 secure IP, which
> export a SHA accelerator interface for SoC to use.
>
> Note that CPTRA 1.0 supports only SHA384 and SHA512 and this
> patch is verified by the 'hash test sha384/sha512' comman
Aspeed AST27xx SoCs integrate the CPTRA 1.0 secure IP, which
export a SHA accelerator interface for SoC to use.
Note that CPTRA 1.0 supports only SHA384 and SHA512 and this
patch is verified by the 'hash test sha384/sha512' commands.
Signed-off-by: Chia-Wei Wang
---
drivers/crypto/aspeed/Kconfi
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