Hi Pali,
On 5/23/23 19:17, Pali Rohár wrote:
Hello! I have looked at this change and below are my comments.
Many thanks.
On Tuesday 23 May 2023 14:57:38 Stefan Roese wrote:
This patch adds the PCIe controller driver for the Xilinx / AMD ZynqMP
NWL PCIe Bridge as root port. The driver source
Hello! I have looked at this change and below are my comments.
On Tuesday 23 May 2023 14:57:38 Stefan Roese wrote:
> This patch adds the PCIe controller driver for the Xilinx / AMD ZynqMP
> NWL PCIe Bridge as root port. The driver source is partly copied from
> the Linux PCI driver and modified to
This patch adds the PCIe controller driver for the Xilinx / AMD ZynqMP
NWL PCIe Bridge as root port. The driver source is partly copied from
the Linux PCI driver and modified to enable usage in U-Boot (e.g.
simplified and interrupt support removed).
Signed-off-by: Stefan Roese
Cc: Simon Glass
Cc
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