> The iMX7 defines further DDRC ZQCTLx registers, however those were
> thus far missing from the list of registers and not programmed. On
> systems with LPDDR2 or DDR3, those registers must be programmed with
> correct values, otherwise the DRAM may not work. However, existing
> systems which worke
The iMX7 defines further DDRC ZQCTLx registers, however those were
thus far missing from the list of registers and not programmed. On
systems with LPDDR2 or DDR3, those registers must be programmed with
correct values, otherwise the DRAM may not work. However, existing
systems which worked without
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