On Fri, 13 Jun 2025 01:45:28 +, 牛 志宏 wrote:
> When booting RISC-V ELF-formatted kernel images (IH_TYPE_KERNEL + IH_OS_ELF),
> explicitly pass SMP hart ID (via a0/argc) and DTB address (via a1/argv)
> to comply with modern SMP-enabled kernels' boot protocol requirements.
> See https://www.kerne
When booting RISC-V ELF-formatted kernel images (IH_TYPE_KERNEL + IH_OS_ELF),
explicitly pass SMP hart ID (via a0/argc) and DTB address (via a1/argv)
to comply with modern SMP-enabled kernels' boot protocol requirements.
See https://www.kernel.org/doc/html/latest/arch/riscv/boot.html#register-state
On Thu, Jun 12, 2025 at 09:08:50AM +, 牛 志宏 wrote:
> When booting RISC-V ELF-formatted kernel images (IH_TYPE_KERNEL + IH_OS_ELF),
> explicitly pass SMP hart ID (via a0/argc) and DTB address (via a1/argv)
> to comply with modern SMP-enabled kernels' boot protocol requirements.
> See https://www
When booting RISC-V ELF-formatted kernel images (IH_TYPE_KERNEL + IH_OS_ELF),
explicitly pass SMP hart ID (via a0/argc) and DTB address (via a1/argv)
to comply with modern SMP-enabled kernels' boot protocol requirements.
See https://www.kernel.org/doc/html/latest/arch/riscv/boot.html#register-state
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