Re: [PATCH v2 8/8] board: add support for Qualcomm SA8155P-ADP board

Hi, Volodymyr Babchuk writes: > Caleb Connolly writes: > >> On 11/03/2024 18:23, Volodymyr Babchuk wrote: >>> Hi Caleb, >>> Caleb Connolly writes: >>> >>>> On 06/03/2024 21:24, Volodymyr Babchuk wrote: >&

Re: [PATCH v3 2/4] clk: qcom: clear div mask before assigning a new divider

Hi Sumit, Thank you for the review. Sumit Garg writes: > On Tue, 12 Mar 2024 at 03:03, Volodymyr Babchuk > wrote: >> >> The current behaviour does a bitwise OR of the previous and new >> divider values, this is wrong as some bits maybe be set already. We > >

[PATCH v3 3/4] clk: qcom: add support for power domains uclass

Now sub-drivers for particular SoCs can register them as power domain drivers. This is needed for upcoming SM8150 support, because it needs to power up the Ethernet module. Signed-off-by: Volodymyr Babchuk --- Caleb suggested to use "imply POWER_DOMAIN", not "depends POWER

[PATCH v3 2/4] clk: qcom: clear div mask before assigning a new divider

The current behaviour does a bitwise OR of the previous and new divider values, this is wrong as some bits maybe be set already. We need to clear all the divider bits before applying new ones. This fixes potential issue with 1Gbit ethernet on SA8155P-ADP boards. Signed-off-by: Volodymyr Babchuk

[PATCH v3 4/4] pinctrl: qcom: pass pin number to get_function_mux callback

ds to know for which pin the function is requested. Signed-off-by: Volodymyr Babchuk Reviewed-by: Caleb Connolly Reviewed-by: Sumit Garg --- Changes in v3: - Added Sumit's R-b tag Changes in v2: - Added Caleb's R-b tag drivers/pinctrl/qcom/pinctrl-apq8016.c | 3 ++- drivers/

[PATCH v3 0/4]

n can't be enabled/disabled Changes in v2: - New patch in v2 - Reworked qcom_cc_bind() function - Added timeout to qcom_power_set() - Minor fixes in register names and formatting Volodymyr Babchuk (4): qcom: board: validate fdt before trying to use it clk: qcom: clear div mask before

[PATCH v3 1/4] qcom: board: validate fdt before trying to use it

early boot stage we don't know where RAM is anyways so there is little we can do. Signed-off-by: Volodymyr Babchuk Reviewed-by: Sumit Garg --- Changes in v3: - Replaced fdt_valid() with fdt_check_header() - Added Sumit's R-B tag Changes in v2: - New patch in v2 arch/arm/mach-sn

Re: [PATCH v2 8/8] board: add support for Qualcomm SA8155P-ADP board

Caleb Connolly writes: > On 11/03/2024 18:23, Volodymyr Babchuk wrote: >> Hi Caleb, >> Caleb Connolly writes: >> >>> On 06/03/2024 21:24, Volodymyr Babchuk wrote: >>>> >>>> Hi Caleb, >>>> >>>> C

Re: [PATCH v2 8/8] board: add support for Qualcomm SA8155P-ADP board

Hi Caleb, Caleb Connolly writes: > On 06/03/2024 21:24, Volodymyr Babchuk wrote: >> >> Hi Caleb, >> >> Caleb Connolly writes: >> >> [...] >>>>>> +}; >>>>>> + >>>>>> +&tlmm { >>>>&

Re: [PATCH v2 8/8] board: add support for Qualcomm SA8155P-ADP board

re[.]kernel[.]org] It is exactly this. With your patch I don't need to /delete-node/ anymore. I'll add a comment in the cover message that this series are depended on your patch. (and sorry for the mangled link. It is our corporate mail server doing) >> >>>> +}; >>>&

Re: [PATCH v2 8/8] board: add support for Qualcomm SA8155P-ADP board

Hi Sumit, Sumit Garg writes: > Hi Volodymyr, > > On Wed, 6 Mar 2024 at 06:23, Volodymyr Babchuk > wrote: >> >> SA8155P Automotive Development Platform is Qualcomm SA8155-based board >> for developers. The nice thing that it has unlocked loaders with test >&

[PATCH v2 0/8] Add support for Qualcomm SA8155-ADP board

s for couple of devices - Enable GPLL7 only when RGMII clock is enabled - Rebased onto qcom-next branch - Removed unnecessary files thanks to generic qualcomm board support - Enabled CONFIG_REMAKE_ELF (this removes one extra step in the readme) Volodymyr Babchuk (8): qcom: board: validat

[PATCH v2 3/8] net: dw_eth_qos: add support for Qualcomm SM8150 SoC

eqos_priv struct: eqos_qcom_rgmii_regs and qcom_enable_loopback. Signed-off-by: Volodymyr Babchuk --- Changes in v2: - Clear loopback bit explicitly drivers/net/dwc_eth_qos.c | 4 +++ drivers/net/dwc_eth_qos.h | 2 ++ drivers/net/dwc_eth_qos_qcom.c | 46

[PATCH v2 6/8] pinctrl: qcom: pass pin number to get_function_mux callback

ds to know for which pin the function is requested. Signed-off-by: Volodymyr Babchuk Reviewed-by: Caleb Connolly --- Changes in v2: - Added Caleb's R-b tag drivers/pinctrl/qcom/pinctrl-apq8016.c | 3 ++- drivers/pinctrl/qcom/pinctrl-apq8096.c | 3 ++- drivers/pinctrl/qcom/pinctr

[PATCH v2 8/8] board: add support for Qualcomm SA8155P-ADP board

networking operation. I am using U-Boot to ease up Xen porting onto this board, so I am mostly interesting in booting U-Boot in EL2. But more conventional setup with Android boot image is supported as well. Signed-off-by: Volodymyr Babchuk --- Changes in v2: - Rebased onto qcom-next branch

[PATCH v2 5/8] clk: qcom: add driver for SM8150 SoC

now. Signed-off-by: Volodymyr Babchuk --- Changes in v2: - Renamed GPLL7_MAIN to just GPLL7 (while I like idea to use Linux naming convention, such rework needs to be done in a separate commit) - Removed unnecessary include - Fixed GDSCR register values for couple of devices - Enable

[PATCH v2 4/8] clk: qcom: add support for power domains uclass

Now sub-drivers for particular SoCs can register them as power domain drivers. This is needed for upcoming SM8150 support, because it needs to power up the Ethernet module. Signed-off-by: Volodymyr Babchuk --- Changes in v2: - Reworked qcom_cc_bind() function - Added timeout to

[PATCH v2 2/8] clk: qcom: clear div mask before assigning a new divider

The current behaviour does a bitwise OR of the previous and new divider values, this is wrong as some bits maybe be set already. We need to clear all the divider bits before applying new ones. This fixes potential issue with 1Gbit ethernet on SA8155P-ADP boards. Signed-off-by: Volodymyr Babchuk

[PATCH v2 7/8] pinctrl: qcom: add driver for SM8150 SoC

. Signed-off-by: Volodymyr Babchuk --- (no changes since v1) drivers/pinctrl/qcom/Kconfig | 7 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-sm8150.c | 589 ++ 3 files changed, 597 insertions(+) create mode 100644 drivers/pinctrl

[PATCH v2 1/8] qcom: board: validate fdt before trying to use it

boot stage we don't know where RAM is anyways so there is little we can do. Signed-off-by: Volodymyr Babchuk --- Changes in v2: - New patch in v2 arch/arm/mach-snapdragon/board.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-snapdragon/board.c b

Re: [PATCH 8/8] board: add support for Qualcomm SA8155P-ADP board

Hi Stephan, Stephan Gerhold writes: [...] >> +This approach ensures that U-Boot is booted in EL2 and it is possible >> +to run virtualization software (like Xen or KVM) on the board. You >> +must understand that this approach breaks Qualcomm's boot chain. You >> +will not be able to call all s

Re: [PATCH 0/8] Add support for Qualcomm SA8155-ADP board

Hi Stephan, Stephan Gerhold writes: > On Fri, Mar 01, 2024 at 06:25:39PM +0000, Volodymyr Babchuk wrote: >> Caleb Connolly writes: >> > On 29/02/2024 14:21, Volodymyr Babchuk wrote: >> >> This patch series adds support for Qualcomm SA8155-ADP development >>

Re: [PATCH 5/8] clk: qcom: add driver for SM8150 SoC

Hi Caleb, Caleb Connolly writes: > On 29/02/2024 14:21, Volodymyr Babchuk wrote: >> Add clock, reset and power domain driver for SM8150. Driver code is >> based on the similar U-Boot drivers. All constants are taken from the >> corresponding Linux driver. >> &g

Re: [PATCH 0/8] Add support for Qualcomm SA8155-ADP board

Hi Caleb, Caleb Connolly writes: > On 29/02/2024 14:21, Volodymyr Babchuk wrote: >> >> This patch series adds support for Qualcomm SA8155-ADP development >> board. Main motivation for this series is to allow running >> virtualization software on this board

[PATCH 0/8] Add support for Qualcomm SA8155-ADP board

evice-specific information, like register addresses and offsets. If anyone wants to maintain this, I will gladly agree. Volodymyr Babchuk (8): clk: qcom: clear div mask before assigning new divider dts: qcom: import device trees and bindings for SA8155P-ADP net: dw_eth_qos: add support for Qua

[PATCH 8/8] board: add support for Qualcomm SA8155P-ADP board

networking operation. I am using U-Boot to ease up Xen porting onto this board, so I am mostly interesting in booting U-Boot in EL2. But more conventional setup with Android boot image is supported as well. Signed-off-by: Volodymyr Babchuk --- arch/arm/dts/sa8155p-adp-u-boot.dtsi | 30

[PATCH 4/8] clk: qcom: add support for power domains uclass

Now sub-drivers for particular SoCs can register them as power domain drivers. This is needed for upcoming SM8150 support, because it needs to power up the Ethernet module. Signed-off-by: Volodymyr Babchuk --- drivers/clk/qcom/clock-qcom.c | 93 ++- drivers/clk

[PATCH 3/8] net: dw_eth_qos: add support for Qualcomm SM8150 SoC

eqos_priv struct: eqos_qcom_rgmii_regs and qcom_enable_loopback. Signed-off-by: Volodymyr Babchuk --- drivers/net/dwc_eth_qos.c | 4 +++ drivers/net/dwc_eth_qos.h | 2 ++ drivers/net/dwc_eth_qos_qcom.c | 47 +++--- 3 files changed, 44 insertions(+), 9

[PATCH 5/8] clk: qcom: add driver for SM8150 SoC

now. Signed-off-by: Volodymyr Babchuk --- drivers/clk/qcom/Kconfig| 8 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clock-qcom.h | 1 + drivers/clk/qcom/clock-sm8150.c | 234 4 files changed, 244 insertions(+) create mode 100644

[PATCH 7/8] pinctrl: qcom: add driver for SM8150 SoC

. Signed-off-by: Volodymyr Babchuk --- drivers/pinctrl/qcom/Kconfig | 7 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-sm8150.c | 589 ++ 3 files changed, 597 insertions(+) create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8150.c

[PATCH 6/8] pinctr: qcom: pass pin number to get_function_mux callback

ds to know for which pin the function is requested. Signed-off-by: Volodymyr Babchuk --- drivers/pinctrl/qcom/pinctrl-apq8016.c | 3 ++- drivers/pinctrl/qcom/pinctrl-apq8096.c | 3 ++- drivers/pinctrl/qcom/pinctrl-ipq4019.c | 3 ++- drivers/pinctrl/qcom/pinctrl-qcom.c| 4 ++-- drivers/pi

[PATCH 1/8] clk: qcom: clear div mask before assigning new divider

We need to do this to ensure that new divider is applied correctly. This fixes potential issue with 1Gbit ethernet on SA8155P-ADP boards. Signed-off-by: Volodymyr Babchuk --- drivers/clk/qcom/clock-qcom.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom

[PATCH] smcc: fix sign bit expansion

work properly on 32 bit architectures. Signed-off-by: Volodymyr Babchuk --- include/linux/arm-smccc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 2d1e6cc156..7f2be23394 100644 --- a/include/linux/arm-smccc.h

[PATCH v2] arm64: issue ISB after updating system registers

uggested-by: Julien Grall Signed-off-by: Volodymyr Babchuk CC: Tom Rini CC: Masahiro Yamada CC: Stefano Stabellini -- Changes from v1: - Added ISBs under CONFIG_ARMV8_SET_SMPEN and erratas. - Added Stefano, Julien and Oleksandr --- arch/arm/cpu/armv8/start.S | 8 1 file changed, 8 insert

[PATCH] arm64: issue ISB after updating system registers

executing instruction str q0, [sp, #112] in vsnprintf() prologue. This panic was observed on Cortex A72 so far. Also, this probably the right fix for the issue workarounded in the commit 45f41c13 ("ARM: uniphier: add weird workaround code for LD20") Signed-off-by: Volodymyr Babch