>> I just "touched" the file "arch/powerpc/cpu/ppc4xx/usbdev.c" again to
remove
>> some GCC 4.6 compiler warnings. While doing this I wondered (again) if
anybody
>> is using this "driver" at all. I definitely never did. And I'm
wondering if
>> this code is useful at all.
Hi Stefan,
This driver is
Hi Stefan,
The current u-boot git tree fails to build for Canyonlands. It reports
“board/amcc/canyonlands/init.S:43: multiple definition of `tlbtab' ”
Was there any recent changes ?
Regards,
Rup
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The GPIO 16 and 19 reconfiguration should be done once USB is initialized.
So moved the reconfiguration to the USB init function.
Signed-off-by: Rupjyoti Sarmah
---
board/amcc/canyonlands/canyonlands.c | 23 +--
1 files changed, 13 insertions(+), 10 deletions(-)
diff
Hello Wolfgang,
> So moved the reconfiguration to the USB init function
Does the Linux kernel perform the same initiaalization of the GPIO
pins? If not, then your change will most likely cause the USB is not
working in Linux unless you used USB in U-Boot.
RUP >> Yes, it does.
> --- a/board/a
The GPIO 16 and 19 reconfiguration should be done once USB is initialized.
So moved the reconfiguration to the USB init function
Signed-off-by: Rupjyoti Sarmah
---
board/amcc/canyonlands/canyonlands.c | 19 +--
1 files changed, 9 insertions(+), 10 deletions(-)
diff --git a
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.
Signed-off-by: Dave Mitchell
Signed-off-by: Rupjyoti Sarmah
---
This patch incorporates the changes advised.
The description of the Macros changed in
Hi Stefan and Felix,
Thanks for your inputs. I am releasing v3 with the updates.
Regards,
Rup
-Original Message-
From: Stefan Roese [mailto:s...@denx.de]
> isolates USB manipulations such that it is only touched if USB is
> used by U-Boot.
Thanks. Looks quite good now. Please find a
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.
Signed-off-by: Dave Mitchell
Signed-off-by: Rupjyoti Sarmah
---
This patch incorporates the changes advised.
The description of the Macros changed in
Hi Wolfgang,
Sent: Wednesday, July 07, 2010 1:02 PM
To: Rupjyoti Sarmah
> - if (in_8((void *)(CONFIG_SYS_BCSR_BASE + 3)) &
CONFIG_SYS_BCSR3_PCIE)
> + if (bcsr_data->board_status & CONFIG_SYS_BCSR3_PCIE)
Please use I/O accessors to read the BCSR.
> -
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.
Signed-off-by: Dave Mitchell
Signed-off-by: Rupjyoti Sarmah
---
This patch incorporates the changes advised.
board/amcc/canyonlands/canyonlands.c
Thanks for your inputs. I will do the necessary changes are resubmit.
Regards,
Rup
-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de]
Sent: Thursday, June 17, 2010 1:24 AM
To: Rupjyoti Sarmah
Cc: u-boot@lists.denx.de; rupjyoti.sar...@gmail.com; s...@denx.de;
rsar...@apm.com
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.
Signed-off-by: Dave Mitchell
Signed-off-by: Rupjyoti Sarmah
---
board/amcc/canyonlands/canyonlands.c | 79
setting FWDVB
to a value greater than 1 while using one of the four deafult bootstrap options.
Signed-off-by: Rupjyoti Sarmah
Acked-by : Victor Gallardo
---
cpu/ppc4xx/cpu_init.c | 65 +
include/ppc440.h |6
2 files changed, 66
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
This results in the PLLOUTB being greater than the CPU clock frequency
resulting unstable 440EPx operation resulting in various software hang
conditions.
Signed-off-by: Rupjyoti Sarmah
Acked-by : Victor Gallardo
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
This results in the PLLOUTB being greater than the CPU clock frequency
resulting unstable 440EPx operation resulting in various software hang
conditions.
Signed-off-by: Rupjyoti Sarmah
Acked-by : Victor Gallardo
-
From: Wolfgang Denk [mailto:w...@denx.de]
Sent: Monday, November 23, 2009 2:35 AM
To: Stefan Roese
Cc: u-boot@lists.denx.de; Rupjyoti Sarmah; Rupjyoti Sarmah
Subject: Re: [U-Boot] [U-boot][PATCH] AMCC ppc440SPe PCIe PLL lock error
Dear Stefan Roese,
In message <200908270650.39795...@denx
u-boot reports a PCIE PLL lock error at boot time on Yucca board, and
left PCIe nonfunctional. This is fixed by making u-boot function
ppc4xx_init_pcie() to wait 300 uS after negating reset before the
first check of the PLL lock.
Signed-off-by: Rupjyoti Sarmah
---
diff --git a/cpu/ppc4xx
problem. The patch touches two files
speed.c and cpu_init.c.
Signed off by Rupjyoti Sarmah < rsar...@amcc.com > from Applied Micro
--
diff --git a/a/u-boot-2009.06/cpu/ppc4xx/cpu_init.c
b/b/u-boot-2009.06/cpu/ppc4xx/cpu_init.c
old mode 100644
new mode 100755
u-boot reports a PCIE PLL lock error at boot time on Yucca
board, and left PCIe nonfunctional. This is fixed by making u-boot
function ppc4xx_init_pcie() to wait 300 uS after negating reset before
the first check of PLL lock.
This fix touches only one file 4xx_pcie.c
Signed off by Rupjyoti
u-boot reports a PCIE PLL lock error at boot time on Yucca
board, and left PCIe nonfunctional. This is fixed by making u-boot
function ppc4xx_init_pcie() to wait 300 uS after negating reset before
the first check of PLL lock.
This fix touches only one file 4xx_pcie.c
Signed off by Rupjyoti
problem. The patch touches two files
speed.c and cpu_init.c.
Signed off by Rupjyoti Sarmah < rsar...@amcc.com > from Applied Micro
--
diff --git a/u-boot-2009.06/cpu/ppc4xx/cpu_init
problem. The patch touches two files
speed.c and cpu_init.c.
Signed off by Rupjyoti Sarmah < rsar...@amcc.com > from Applied Micro
--
diff -uNr u-boot-2009.06/cpu/ppc4xx/cpu_init.c
u-boot-2009.06.1/cpu/ppc4xx/cpu_init.c
--- u-boot-2009.06/cpu/ppc4xx/cpu_init.
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