Update the chameleonv3 handoffs with the ones generated from the final
FPGA design.
Signed-off-by: Paweł Anikiel
---
...ocfpga_arria10_chameleonv3_480_2_handoff.h | 22 +--
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/dts
This file is included by the different chameleonv3 variants. Change the
name to .dtsi.
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
...arria10_chameleonv3.dts => socfpga_arria10_chameleonv3.dtsi} | 0
arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts | 2 +-
arch/
This file was missed during the conversion process. Add the symbol to
defconfig.
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
configs/socfpga_chameleonv3_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_chameleonv3_defconfig
b/configs
Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the
Mercury+ AA1 module
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
arch/arm/dts/Makefile| 1 +
.../socfpga_arria10_chameleonv3_270_2-u-boot.dtsi| 12
arch/arm/dts
Allow SPL to boot from an ext4 filesystem.
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
configs/socfpga_chameleonv3_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_chameleonv3_defconfig
b/configs/socfpga_chameleonv3_defconfig
index 4bbce3591d
Set the bitstream name per Chameleon variant. This allows the same
boot filesystem with all bitstream variants to be used on different
boards.
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi | 4
arch/arm/dts
Move the environment to an easily editable text file in the boot
partition
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
board/google/chameleonv3/environment.txt | 13 +
include/configs/socfpga_chameleonv3.h| 9 -
2 files changed, 17 insertions(+), 5
These changes add the third chameleon variation and make it easier to
deploy images to different boards.
v2 changes:
- rename chameleonv3.dts to .dtsi
- add missing CONFIG_SPL_MAX_SIZE symbol
Paweł Anikiel (6):
socfpga: chameleonv3: Enable ext4 in SPL
socfpga: chameleonv3: Move environment
On Fri, Oct 14, 2022 at 11:49 AM Paweł Anikiel wrote:
>
> These changes add the third chameleon variation and make it easier to
> deploy images to different boards.
>
> v2 changes:
> - rename chameleonv3.dts to .dtsi
> - add missing CONFIG_SPL_MAX_SIZE symbol
>
> Paw
This file was missed during the conversion process. Add the symbol to
defconfig.
Signed-off-by: Paweł Anikiel
---
configs/socfpga_chameleonv3_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_chameleonv3_defconfig
b/configs/socfpga_chameleonv3_defconfig
index
Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the
Mercury+ AA1 module
Signed-off-by: Paweł Anikiel
---
arch/arm/dts/Makefile| 1 +
.../socfpga_arria10_chameleonv3_270_2-u-boot.dtsi| 12
arch/arm/dts
This file is included by the different chameleonv3 variants. Change the
name to .dtsi.
Signed-off-by: Paweł Anikiel
---
...arria10_chameleonv3.dts => socfpga_arria10_chameleonv3.dtsi} | 0
arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts | 2 +-
arch/arm/
Set the bitstream name per Chameleon variant. This allows the same
boot filesystem with all bitstream variants to be used on different
boards.
Signed-off-by: Paweł Anikiel
---
arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi | 4
arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u
Allow SPL to boot from an ext4 filesystem.
Signed-off-by: Paweł Anikiel
---
configs/socfpga_chameleonv3_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_chameleonv3_defconfig
b/configs/socfpga_chameleonv3_defconfig
index 478efc59ea..e628ee8ad5 100644
--- a/configs
Move the environment to an easily editable text file in the boot
partition
Signed-off-by: Paweł Anikiel
---
board/google/chameleonv3/environment.txt | 13 +
include/configs/socfpga_chameleonv3.h| 9 -
2 files changed, 17 insertions(+), 5 deletions(-)
create mode 100644
These changes add the third chameleon variation and make it easier to
deploy images to different boards.
v2 changes:
- rename chameleonv3.dts to .dtsi
- add missing CONFIG_SPL_MAX_SIZE symbol
Paweł Anikiel (6):
socfpga: chameleonv3: Enable ext4 in SPL
socfpga: chameleonv3: Move environment
On Fri, Sep 2, 2022 at 9:59 PM Simon Glass wrote:
>
> Hi Paweł,
>
> On Fri, 2 Sept 2022 at 07:16, Paweł Anikiel wrote:
> >
> > On Tue, Aug 30, 2022 at 5:57 PM Simon Glass wrote:
> > >
> > > Hi Paweł,
> > >
> > > On Tue, 30 Aug 2022 at
On Tue, Aug 30, 2022 at 5:57 PM Simon Glass wrote:
>
> Hi Paweł,
>
> On Tue, 30 Aug 2022 at 05:51, Paweł Anikiel wrote:
> >
> > On Tue, Aug 30, 2022 at 5:13 AM Alexandru M Stan
> > wrote:
> > >
> > > Hey Simon,
> > >
> > > On M
On Tue, Aug 30, 2022 at 5:13 AM Alexandru M Stan wrote:
>
> Hey Simon,
>
> On Mon, Aug 29, 2022 at 7:29 PM Simon Glass wrote:
> >
> > Hi Paweł,
> >
> > On Mon, 29 Aug 2022 at 02:23, Paweł Anikiel wrote:
> > >
> > > On Sat, Aug 27, 2022 a
On Sat, Aug 27, 2022 at 2:22 AM Simon Glass wrote:
>
> Hi Paweł,
>
> On Fri, 26 Aug 2022 at 01:54, Paweł Anikiel wrote:
> >
> > Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the
> > Mercury+ AA1 module
> >
> > Signed-off-by: Paweł A
Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the
Mercury+ AA1 module
Signed-off-by: Paweł Anikiel
---
arch/arm/dts/Makefile| 1 +
.../socfpga_arria10_chameleonv3_270_2-u-boot.dtsi| 12
arch/arm/dts
Set the bitstream name per Chameleon variant. This allows the same
boot filesystem with all bitstream variants to be used on different
boards.
Signed-off-by: Paweł Anikiel
---
arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi | 4
arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u
Move the environment to an easily editable text file in the boot
partition
Signed-off-by: Paweł Anikiel
---
board/google/chameleonv3/environment.txt | 13 +
include/configs/socfpga_chameleonv3.h| 9 -
2 files changed, 17 insertions(+), 5 deletions(-)
create mode 100644
Allow SPL to boot from an ext4 filesystem.
Signed-off-by: Paweł Anikiel
---
configs/socfpga_chameleonv3_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_chameleonv3_defconfig
b/configs/socfpga_chameleonv3_defconfig
index e78d3b51de..a6901980b5 100644
--- a/configs
These changes add the third chameleon variation and make it easier to
deploy images to different boards.
Paweł Anikiel (4):
socfpga: chameleonv3: Enable ext4 in SPL
socfpga: chameleonv3: Move environment to a text file
arm: dts: chameleonv3: Override chameleonv3 bitstream names
arm: dts
Hi Pali,
I applied the patch and it works fine on my board. Log from atsha204a_wakeup():
Waking up ATSHA204A
Try 1... success
Tested-by: Paweł Anikiel
Regards,
Paweł
On Sun, Aug 7, 2022 at 9:30 PM Pali Rohár wrote:
>
> Paweł, could you please test this change if it works on your bo
On Mon, Jun 20, 2022 at 2:29 PM Chee, Tien Fong
wrote:
>
>
>
> > -Original Message-
> > From: Paweł Anikiel
> > Sent: Monday, 20 June, 2022 8:14 PM
> > To: Chee, Tien Fong
> > Cc: Vasut, Marek ; simon.k.r.goldschm...@gmail.com;
> > mic
On Mon, Jun 20, 2022 at 10:40 AM Chee, Tien Fong
wrote:
>
> Hi,
>
> > -Original Message-
> > From: Paweł Anikiel
> > Sent: Friday, 17 June, 2022 6:47 PM
> > To: Vasut, Marek ; simon.k.r.goldschm...@gmail.com;
> > Chee, Tien Fong ; michal.si...@xil
e in OCRAM
with the XN bit set causes a page fault. Override dram_bank_mmu_setup
to disable XN in the OCRAM and setup DRAM dcache before relocation.
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
arch/arm/mach-socfpga/misc_arria10.c | 26 ++
1 file changed, 26
before and after the delay,
imgcfg_FifoEmpty is the only bit that changes. Waiting for this bit
(instead of a hardcoded delay) also fixes the issue.
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
drivers/fpga/socfpga_arria10.c | 8
1 file changed, 8 insertions(+)
diff --git a
the fat fs driver
doesn't have to allocate a temporary buffer in get_contents
(assuming 8KiB clusters).
* Change the buffer size to a larger value when reading to ddr
(but not too large, because large transfers cause a stack overflow
in the dwmmc driver).
Signed-off-by: Paweł An
Using udelay while the clocks aren't fully configured causes the timer
system to save the wrong clock rate. Use sdelay and wait_on_value
instead (the values used in these functions were found experimentally).
Signed-off-by: Paweł Anikiel
---
arch/arm/mach-socfpga/clock_manager_arria10.c
This driver is a child of the rstmgr driver, both of which share the
same devicetree node. As a result, passing the child's udevice pointer
to dev_read_addr_ptr results in a failure of reading the #address-cells
property. Use the parent udevice pointer instead.
Signed-off-by: Paweł An
>From the ATSHA204A datasheet (document DS40002025A):
Wake: If SDA is held low for a period greater than tWLO, the device
exits low-power mode and, after a delay of tWHI, is ready to receive
I2C commands.
tWHI value can be found in table 7-2.
Signed-off-by: Paweł Anikiel
Reviewed-by: Si
Add defconfig and Kconfig files for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
arch/arm/mach-socfpga/Kconfig | 7 +
configs/socfpga_chameleonv3_defconfig | 29 ++
include/configs/socfpga_chameleonv3.h | 44
Add board directory for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
board/google/chameleonv3/Makefile | 5 +++
board/google/chameleonv3/board.c | 27 ++
board/google/chameleonv3/fpga.its | 28 ++
board
Add devicetrees for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
Signed-off-by: Alexandru M Stan
Reviewed-by: Simon Glass
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/socfpga_arria10_chameleonv3.dts | 90
Add handoff headers for the Google Chameleonv3 variants: 480-2 and
270-3. Both files were generated using qts-filter-a10.sh.
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
...ocfpga_arria10_chameleonv3_270_3_handoff.h | 305
Devicetree headers for Mercury+ AA1 module
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
.../socfpga_arria10_mercury_aa1-u-boot.dtsi | 54 ++
arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi | 72 +++
2 files changed, 126 insertions(+)
create mode 100644
work both in u-boot and linux
Put u-boot-specific parts of devicetrees into *-u-boot.dtsi files
Minor changes in Kconfig, defconfig, and config.h
Paweł Anikiel (11):
arm: dts: Add Mercury+ AA1 devicetrees
arm: dts: Add Chameleonv3 handoff headers
arm: dts: Add Chameleonv3 devicetrees
On Thu, May 26, 2022 at 4:37 PM Paweł Anikiel wrote:
>
> The Google Chameleon v3 is a board made for testing both video and audio
> interfaces of external devices. It has a connector compatible with the
> Mercury+ AA1 module, which itself contains an Arria 10 SoCFPGA. The AA1
> mo
On Fri, May 27, 2022 at 5:55 PM Simon Glass wrote:
>
> On Thu, 26 May 2022 at 07:38, Paweł Anikiel wrote:
> >
> > Apply some optimizations to speed up bitstream loading
> > (both for full and split periph/core bitstreams):
> >
> > * Change the size o
the fat fs driver
doesn't have to allocate a temporary buffer in get_contents
(assuming 8KiB clusters).
* Change the buffer size to a larger value when reading to ddr
(but not too large, because large transfers cause a stack overflow
in the dwmmc driver).
Signed-off-by: Paweł An
e in OCRAM
with the XN bit set causes a page fault. Override dram_bank_mmu_setup
to disable XN in the OCRAM and setup DRAM dcache before relocation.
Signed-off-by: Paweł Anikiel
---
arch/arm/mach-socfpga/misc_arria10.c | 26 ++
1 file changed, 26 insertions(+)
diff --git
>From the ATSHA204A datasheet (document DS40002025A):
Wake: If SDA is held low for a period greater than tWLO, the device
exits low-power mode and, after a delay of tWHI, is ready to receive
I2C commands.
tWHI value can be found in table 7-2.
Signed-off-by: Paweł Anikiel
---
drivers/m
Add defconfig and Kconfig files for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
---
arch/arm/mach-socfpga/Kconfig | 7 +
configs/socfpga_chameleonv3_defconfig | 29 ++
include/configs/socfpga_chameleonv3.h | 44 +++
3 files changed
Add board directory for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
---
board/google/chameleonv3/Makefile | 5 +++
board/google/chameleonv3/board.c | 27 ++
board/google/chameleonv3/fpga.its | 28 ++
board/google/chameleonv3
Add devicetrees for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
Signed-off-by: Alexandru M Stan
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/socfpga_arria10_chameleonv3.dts | 90 +++
...fpga_arria10_chameleonv3_270_3-u-boot.dtsi | 8
before and after the delay,
imgcfg_FifoEmpty is the only bit that changes. Waiting for this bit
(instead of a hardcoded delay) also fixes the issue.
Signed-off-by: Paweł Anikiel
---
drivers/fpga/socfpga_arria10.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/fpga
Using udelay while the clocks aren't fully configured causes the timer
system to save the wrong clock rate. Use sdelay and wait_on_value
instead (the values used in these functions were found experimentally).
Signed-off-by: Paweł Anikiel
---
arch/arm/mach-socfpga/clock_mana
This driver is a child of the rstmgr driver, both of which share the
same devicetree node. As a result, passing the child's udevice pointer
to dev_read_addr_ptr results in a failure of reading the #address-cells
property. Use the parent udevice pointer instead.
Signed-off-by: Paweł An
Devicetree headers for Mercury+ AA1 module
Signed-off-by: Paweł Anikiel
---
.../socfpga_arria10_mercury_aa1-u-boot.dtsi | 54 ++
arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi | 72 +++
2 files changed, 126 insertions(+)
create mode 100644 arch/arm/dts
Add handoff headers for the Google Chameleonv3 variants: 480-2 and
270-3. Both files were generated using qts-filter-a10.sh.
Signed-off-by: Paweł Anikiel
---
...ocfpga_arria10_chameleonv3_270_3_handoff.h | 305 ++
...ocfpga_arria10_chameleonv3_480_2_handoff.h | 305
-boot.dtsi files
Minor changes in Kconfig, defconfig, and config.h
Paweł Anikiel (11):
arm: dts: Add Mercury+ AA1 devicetrees
arm: dts: Add Chameleonv3 handoff headers
arm: dts: Add Chameleonv3 devicetrees
board: Add Chameleonv3 board dir
config: Add Chameleonv3 config
misc: atsha204a
On Mon, Apr 11, 2022 at 8:35 PM Simon Glass wrote:
>
> On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
> >
> > Add devicetree for Google Chameleon V3 board
> >
> > Signed-off-by: Paweł Anikiel
> > ---
> > arch/arm/dts/Makefile
On Mon, Apr 11, 2022 at 8:35 PM Simon Glass wrote:
>
> Hi Paweł,
>
> On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
> >
> > Device tree header for Mercury+ AA1 module
> >
> > Signed-off-by: Paweł Anikiel
> > ---
>
On Mon, Apr 11, 2022 at 8:35 PM Simon Glass wrote:
>
> On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
> >
> > Add handoff headers for the Google Chameleonv3 variants: 480-2 and
> > 270-3. Both files were generated using qts-filter-a10.sh.
> >
&g
On Mon, Apr 11, 2022 at 8:36 PM Simon Glass wrote:
>
> On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
> >
> > This driver is a child of the rstmgr driver, both of which share the
> > same devicetree node. As a result, passing the child's udevice pointer
> >
e in OCRAM
with the XN bit set causes a page fault. Override dram_bank_mmu_setup
to disable XN in the OCRAM and setup DRAM dcache before relocation.
Signed-off-by: Paweł Anikiel
---
arch/arm/mach-socfpga/misc_arria10.c | 26 ++
1 file changed, 26 insertions(+)
diff --git
Add board directory for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
---
board/google/chameleonv3/Makefile | 5 +++
board/google/chameleonv3/board.c | 27 ++
board/google/chameleonv3/fpga.its | 28 ++
board/google/chameleonv3
before and after the delay,
imgcfg_FifoEmpty is the only bit that changes. Waiting for this bit
(instead of a hardcoded delay) also fixes the issue.
Signed-off-by: Paweł Anikiel
---
drivers/fpga/socfpga_arria10.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/fpga
Using udelay while the clocks aren't fully configured causes the timer
system to save the wrong clock rate. Use sdelay and wait_on_value
instead (the values used in these functions were found experimentally).
Signed-off-by: Paweł Anikiel
---
arch/arm/mach-socfpga/clock_mana
the fat fs driver
doesn't have to allocate a temporary buffer in get_contents
(assuming 8KiB clusters).
* Change the buffer size to a larger value when reading to ddr
(but not too large, because large transfers cause a stack overflow
in the dwmmc driver).
Signed-off-by: Paweł An
Add defconfig and Kconfig files for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
---
arch/arm/mach-socfpga/Kconfig | 15
configs/socfpga_chameleonv3_defconfig | 29
include/configs/socfpga_chameleonv3.h | 49 +++
3 files
This driver is a child of the rstmgr driver, both of which share the
same devicetree node. As a result, passing the child's udevice pointer
to dev_read_addr_ptr results in a failure of reading the #address-cells
property. Use the parent udevice pointer instead.
Signed-off-by: Paweł An
>From the ATSHA204A datasheet (document DS40002025A):
Wake: If SDA is held low for a period greater than tWLO, the device
exits low-power mode and, after a delay of tWHI, is ready to receive
I2C commands.
tWHI value can be found in table 7-2.
Signed-off-by: Paweł Anikiel
---
drivers/m
Add devicetree for Google Chameleon V3 board
Signed-off-by: Paweł Anikiel
---
arch/arm/dts/Makefile | 2 ++
arch/arm/dts/socfpga_chameleonv3.dtsi | 21 +
arch/arm/dts/socfpga_chameleonv3_270_3.dts | 9 +
arch/arm/dts
Add handoff headers for the Google Chameleonv3 variants: 480-2 and
270-3. Both files were generated using qts-filter-a10.sh.
Signed-off-by: Paweł Anikiel
---
.../dts/socfpga_chameleonv3_270_3_handoff.h | 305 ++
.../dts/socfpga_chameleonv3_480_2_handoff.h | 305
Device tree header for Mercury+ AA1 module
Signed-off-by: Paweł Anikiel
---
arch/arm/dts/socfpga_mercury_aa1.dtsi | 95 +++
1 file changed, 95 insertions(+)
create mode 100644 arch/arm/dts/socfpga_mercury_aa1.dtsi
diff --git a/arch/arm/dts/socfpga_mercury_aa1.dtsi
b
-270-3E4-D11 and ME-AA1-480-2I3-D12E.
This patchset adds support for the Chameleon V3 (both versions), as well
as some bugfixes and optimizations, mostly in Arria 10 code.
Paweł Anikiel (11):
arm: dts: Add Mercury+ AA1 devicetree
arm: dts: Add Chameleonv3 handoff headers
arm: dts: Add
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