Change the vcpumntirq in the GICv3 node from SPI to PPI.
Prevents Linux from complaining:
'[Firmware Bug]: CPU interface incapable of MMIO access'
Fixes: 6d722894fd48 "board: emulation: Add QEMU sbsa support"
Signed-off-by: Patrick Rudolph
---
arch/arm/dts/qemu-sbsa.d
d fetch it from the device instead.
TEST: Fixes non working IRQs in QEMU sbsa-ref.
Signed-off-by: Patrick Rudolph
---
board/emulation/qemu-sbsa/acpi.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/board/emulation/qemu-sbsa/acpi.c b/board/emulation/q
According to the binding [1] the ITS node should be a subnode of the
GICv3 node. Thus move it now that the driver binds subnodes as well.
1:
https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/arm%2Cgic-v3.txt
Signed-off-by: Patrick Rudolph
---
arch/arm/dts/qemu
oller/arm%2Cgic-v3.txt
Signed-off-by: Patrick Rudolph
---
arch/arm/lib/gic-v3-its.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c
index 51cc2397768..34f05e94672 100644
--- a/arch/arm/lib/gic-v3-its.c
+++ b/arch/arm/lib/gic-v3-its.c
@@ -
Add tests for IORT table generation:
- SMMU_V3 node
- RC node
Signed-off-by: Patrick Rudolph
---
test/dm/acpigen.c | 115 ++
1 file changed, 115 insertions(+)
diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c
index 23c16bd9866..ee9517f9c29 100644
The spec recommends to set the mapping_offset only when there are
ID mappings as indicated by the mapping_count field.
Signed-off-by: Patrick Rudolph
---
lib/acpi/acpi_table.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/lib/acpi/acpi_table.c b/lib/acpi
The IORT spec says that reserved bits must be set to zero, thus clear
all fields of the struct before starting to fill out non-reserved
fields.
Signed-off-by: Patrick Rudolph
---
lib/acpi/acpi_table.c | 4
1 file changed, 4 insertions(+)
diff --git a/lib/acpi/acpi_table.c b/lib/acpi
Check that the provided offsets are really pointing to a node
that have been previously written and are of the correct type.
Signed-off-by: Patrick Rudolph
---
lib/acpi/acpi_table.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/lib/acpi/acpi_table.c b/lib/acpi
ace back to an invalid IORT RC nodes.
Add the missing ID mapping count and mapping offset.
TEST: Fixes IRQ usage of PCI devices on qemu/sbsa-ref.
Fixes: bf5d37662da5 "acpi: acpi_table: Add IORT support"
Signed-off-by: Patrick Rudolph
---
lib/acpi/acpi_table.c | 2 ++
1 file changed
Hi Tom,
On Mon, Mar 10, 2025 at 3:30 PM Tom Rini wrote:
>
> On Mon, Mar 10, 2025 at 10:01:32AM +0100, Patrick Rudolph wrote:
>
> > Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
> > prefetchable 32-bit BARs, while PCIe devices are not allowed to ha
he
BAR and place it in the non-prefetch MMIO window.
For prefetch BARs there's no downside on being placed in non prefetch
MMIO areas, besides the possible slower performance when a driver tries
to map it Write-Combine.
TEST: Fixes pci_auto on QEMU sbsa-ref fails to autoconfigure BAR0.
Signed-
-off-by: Patrick Rudolph
---
board/emulation/qemu-sbsa/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/emulation/qemu-sbsa/Kconfig
b/board/emulation/qemu-sbsa/Kconfig
index f4ad63e681c..728cecae6b3 100644
--- a/board/emulation/qemu-sbsa/Kconfig
+++ b/board/emulation/qemu-sbsa
qemu's sbsa-ref is always using a 64bit CPU and the PCI prefetch MMIO
window is located above 4GiB, thus always enable SYS_PCI_64BIT.
Signed-off-by: Patrick Rudolph
---
board/emulation/qemu-sbsa/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/emulation/qemu-sbsa/Kconf
_high) {
> > > + start = ALIGN_DOWN(gd->arch.table_start_high,
> > > +EFI_PAGE_MASK);
> > > + end = ALIGN(gd->arch.table_end_high, EFI_PAGE_MASK);
> > > + ret = efi_add_memory_map(start, end - start,
> > > + EFI_ACPI_RECLAIM_MEMORY);
> > > + if (ret != EFI_SUCCESS)
> > > + return ret;
> > > + }
> > >
> > > - addr = gd_acpi_start();
> > > + addr = gd_acpi_start();
> > > + }
> > > log_debug("EFI using ACPI tables at %lx\n", addr);
> > >
> > > /* And expose them to our EFI payload */
> >
>
> Regards,
> Simon
I can confirm that your patch fixes booting on qemu-system-aarch64
sbsa-ref as the ACPI tables are visible to the OS again.
Signed-off-by: Patrick Rudolph
Regards,
Patrick
qemu's sbsa-ref is always using a 64bit CPU and the PCI prefetch MMIO
window is located above 4GiB, thus always enable SYS_PCI_64BIT.
Signed-off-by: Patrick Rudolph
---
board/emulation/qemu-sbsa/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/emulation/qemu-sbsa/Kconf
-off-by: Patrick Rudolph
---
board/emulation/qemu-sbsa/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/emulation/qemu-sbsa/Kconfig
b/board/emulation/qemu-sbsa/Kconfig
index f4ad63e681c..728cecae6b3 100644
--- a/board/emulation/qemu-sbsa/Kconfig
+++ b/board/emulation/qemu-sbsa
he
BAR and place it in the non-prefetch MMIO window.
For prefetch BARs there's no downside on being placed in non prefetch
MMIO areas, besides the possible slower performance when a driver tries
to map it Write-Combine.
TEST: Fixes pci_auto on QEMU sbsa-ref fails to autoconfigure BAR0.
Signed-
Hi Simon,
On Thu, Jan 23, 2025 at 3:13 PM Tom Rini wrote:
>
> On Fri, 10 Jan 2025 16:59:59 -0700, Simon Glass wrote:
>
> > The current UPL spec[1] has been tidied up and improved over the last
> > year, since U-Boot's original UPL support was written.
> >
> > This series includes some prerequisite
Hi Heinrich,
here it is https://lists.denx.de/pipermail/u-boot/2024-November/571757.html
I'm fine with either solution.
Regards,
Patrick
On Thu, Jan 16, 2025 at 2:34 PM Heinrich Schuchardt
wrote:
>
> On 20.12.24 07:30, Patrick Rudolph wrote:
> > On Fri, Dec 20, 2024 at
, 0);
> +#endif
>
> void acpi_create_dbg2(struct acpi_dbg2_header *dbg2,
> int port_type, int port_subtype,
> --
> 2.47.1
>
Anything wrong with the patch series send Nov 14 2024 that addressed
this issue as well?
Reviewed-by: Patrick Rudolph
Build test QEMU riscv with ACPI enabled.
Signed-off-by: Patrick Rudolph
---
board/emulation/qemu-riscv/MAINTAINERS | 1 +
configs/qemu-riscv64_acpi_defconfig| 25 +
2 files changed, 26 insertions(+)
create mode 100644 configs/qemu-riscv64_acpi_defconfig
diff --git
On ACPI enabled platforms where QFW passes in the pre-generated
ACPI tables do not attempt to fill MADT and FADT. On all other
platforms MADT and FADT must be filled by SoC or mainboard code.
Fixes a compilation error on QEMU platforms that enable:
- CONFIG_QFW_ACPI
Signed-off-by: Patrick
Hi Heinrich,
On Thu, Nov 7, 2024 at 10:19 AM Heinrich Schuchardt wrote:
>
> On 10/23/24 15:19, Patrick Rudolph wrote:
> > From: Maximilian Brune
> >
> > Write the FADT in common code since it's used on all architectures.
> > Since the FADT is mandatory all So
Fix "Integer handling issues (SIGN_EXTENSION)" in newly added code:
Cast serial_info.reg_offset to u64 to prevent an integer overflow when
shifted too many bits to the left. Currently this never happens as the
shift is supposed to be less than 4.
Signed-off-by: Patrick Rudolph
---
Hi Tom,
On Tue, Oct 29, 2024 at 3:53 AM Tom Rini wrote:
>
> On Mon, Oct 28, 2024 at 05:27:14PM -0600, Tom Rini wrote:
> > On Mon, 28 Oct 2024 09:08:35 +0100, Patrick Rudolph wrote:
> >
> > > Fix "Integer handling issues (SIGN_EXTENSION)" in newly added code:
Fix "Integer handling issues (SIGN_EXTENSION)" in newly added code:
Cast serial_info.reg_offset to u64 to prevent an integer overflow when
shifted too many bits to the left. Currently this never happens as the
shift is supposed to be less than 4.
Signed-off-by: Patrick Rudolph
---
spi4b
- APs on real hardware do not enter Linux, but continue spinning in
their ACPI parking protocol spinloop. To be investigated.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Matthias Brugger
Cc: Peter Robinson
Cc: Tom Rini
---
arch/arm/mach-bcm283x/Kconfig
d accessed the GIC in C code without crash.
1: https://datasheets.raspberrypi.com/bcm2711/bcm2711-peripherals.pdf
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Acked-by: Matthias Brugger
Cc: Matthias Brugger
Cc: Peter Robinson
---
arch/arm/mach-bcm283x/init.c | 2 +-
1 file
Add generic ACPI code to generate
- MADT GICC
- MADT GICD
- MADT GICR
- MADT GIC ITS
- PPTT processor
- PPTT cache
as commonly used on arm platforms.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
---
Changelog v2:
- Add full comments to exported
Add QEMU's SBSA ref board to azure pipelines and gitlab CI to run tests on it.
TEST: Run on Azure pipelines and confirmed that tests succeed.
Signed-off-by: Patrick Rudolph
Reviewed-by: Tom Rini
---
Changelog v6:
- Add gitlab CI support
---
.azure-pipelines.yml | 8
.gitlab-c
Initialize addr to zero which allows to build on the CI
which is more strict.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
common/bloblist.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/bloblist.c b/common/bloblist.c
index 2008ab4d25..cf1a3b8b62
Allows to build the RPi4 with ACPI enabled.
TEST: - Boots on qemu-system-aarch64 -machine raspi4b
- Boots on real hardware with arm_64bit=1 in config.txt
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
Cc: Simon Glass
Cc: Matthias Brugger
Cc: Peter
functions that needs to be implemented.
When ACPI is not enabled the added code does nothing, keeping existing
behaviour.
TEST: Booted on RPi4 with only ACPI enabled, providing no FDT to the OS.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Matthias Brugger
Cc: Peter
he APs are released from reset
and will enter U-Boot after it has been relocated as well.
By default ARMV8_MULTIENTRY is not selected, keeping existing behaviour.
TEST: All APs enter U-Boot when run on qemu-system-aarch64 and on
real hardware.
Signed-off-by: Patrick Rudolph
Reviewed-by: S
Implement read_mpidr() on armv7 to make use of it in generic
code that compiles on both armv7 and armv8.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
arch/arm/include/asm/system.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/system.h b/arch
mailbox with the OS to
release the CPU.
TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
arch/arm/cpu/armv8/start.S | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu
extended to
other platforms, like ARMv7.
TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Tom Rini
---
Changelog v2:
- Use shorter function names
- Drop the use of atomics, they do not work on real ha
9.0 without
modifications, since it doesn't emulate PCIe yet.
Signed-off-by: Simon Glass
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Matthias Brugger
Cc: Peter Robinson
---
Changelog v5:
- Drop CPU device from DSDT
- Add Extern to CPU devices in SSDT
---
From: Simon Glass
These header files presumably duplicate things already in the U-Boot
devicetree. For now, bring them in to get the ASL code and ACPI table
code to compile.
Signed-off-by: Simon Glass
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Acked-by: Matthias Brugger
Cc
dora 40
1: Server Base System Architecture (SBSA)
2: https://www.qemu.org/docs/master/system/arm/sbsa.html
Signed-off-by: Patrick Rudolph
Cc: Peter Robinson
Cc: Simon Glass
Cc: Tom Rini
---
Changelog v3:
- Add GIC and GIC-ITS to devicetree
- Select GICv3 driver
- Drop acpi_fill_madt and use dr
are used for SGIs
- ID16-ID31 are used for PPIs
TEST: Booted on QEMU raspb4 using GICV2 driver model generated MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
Changelog v6:
- Update header order
Changelog v9:
- Map SPI interrupts to ID32+
- Map PPI interrupts to ID16+
---
arch
Allow to use BLOBLIST_TABLES on arm to store ACPI or other tables.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Tom Rini
---
Changelog v9:
- default to BLOBLIST_ALLOC on arm
- Move default for BLOBLIST_SIZE_RELOC up
Changelog v10:
- Revert changes done in v9 and use revision v8
upts" property doesn't contain a phandle as "interrupts-extended"
does, so implement a new method to locate the interrupt-parent called
irq_get_interrupt_parent().
TEST: Read the interrupts from the GIC node for ACPI MADT generation.
Signed-off-by: Patrick Rudolph
Reviewed-
mainboard code.
TEST: Booted on QEMU sbsa-ref using GICV3 driver model generated MADT.
Booted on QEMU raspb4 using GICV2 driver model generated MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
Changelog v4:
- Read everything from the DT
- Export
reused on other CPU drivers that are
compatible with armv8.
TEST: Booted on QEMU sbsa and verify the driver binds to CPU nodes.
Confirmed with FWTS that all ACPI processor devices are present.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
-ref that has a GICV3.
Signed-off-by: Patrick Rudolph
Reviewed-by: Moritz Fischer
---
Changelog v9:
- Require at least 3 interrupt-cells
- Map SPI interrupts to ID32+
- Map PPI interrupts to ID16+
---
arch/arm/lib/gic-v3-its.c | 24
1 file changed, 24 insertions(+)
diff
The code accesses the gic-v3 node, but not the gic-v3-its node,
thus rename the objects to clarify which node it operates on.
The following commit will make use of the gic-v3-its node for real.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
arch/arm/lib/gic-v3-its.c | 10
to use the new Kconfig name as well.
TEST: Booted on QEMU sbsa using the generic-ahci node.
Signed-off-by: Patrick Rudolph
Reviewed-by: Stefan Roese
Cc: Tom Rini
Cc: Stefan Roese
---
MAINTAINERS | 2 +-
configs/clearfog_defconfig
Add support for the generic XHCI driver that contains no SoC
specific code. It can be used on platforms that simply work out
of the box, like on emulated platforms.
TEST: Booted on QEMU sbsa machine using the generic xhci driver.
Signed-off-by: Patrick Rudolph
Reviewed-by: Marek Vasut
Cc: Tom
Add a new method to write the processor device identified by _HID
ACPI0007, that is preferred over the Processor OpCode since ACPI 6.0.
Fixes booting arm using ACPI only since the Processor OpCode isn't
found valid by the Linux kernel.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glas
ables in memory.
TEST: Booted QEMU SBSA (no QFW) using EFI and ACPI only.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Tom Rini
---
Changelog v8:
- Only use bloblist to store tables on arm
---
lib/acpi/acpi_table.c
4GiB, like QEMU sbsa,
the RSDT cannot be used. Allow both RSDT and XSDT to be null and only
fill those tables that are present in acpi_add_table().
TEST: Fixes a crash on QEMU sbsa and allows to boot on QEMU sbsa.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Tom Rini
The SoC can implement acpi_fill_iort to update the IORT table.
Add a helper function to fill out the NAMED_COMPONENT node.
TEST=Run FWTS V24.03.00 on RPi4 and round no problems.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 213
The FADT structure found in U-Boot represents FADT revision 6 and the
GICC and GICD structures defined in U-Boot are based on ACPI revision
6.3.
Bump the table revision to fix FWTS failures seen on aarch64.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Bin Meng
Return the ACPI table revision in acpi_get_table_revision() for
PPTT and GTDT. Match both to ACPI 6.2.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 2 ++
lib/acpi/acpi_table.c | 4
2 files changed, 6 insertions(+)
diff --git
Allow other architectures to use acpi_create_mcfg_mmconfig as well
by moving the function prototype to common code.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
arch/x86/include/asm/acpi_table.h | 2 --
include/acpi/acpi_table.h | 13 +
2
Add a new method to acpi_ops to let drivers fill out ACPI MADT.
The code is unused for now until drivers implement the new ops.
TEST: Booted on QEMU sbsa using driver model generated MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
Changelog v4:
- Drop __weak
From: Maximilian Brune
Write the FADT in common code since it's used on all architectures.
Since the FADT is mandatory all SoCs or mainboards must implement the
introduced function acpi_fill_fadt() and properly update the FADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc:
Write MADT in common code and let the SoC fill out the body by
calling acpi_fill_madt() which must be implemented at SoC level.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Bin Meng
---
Changelog v3:
- Pass ACPI context to acpi_fill_madt
---
arch/sandbox/lib
Add the interrupt flag used in ACPI GTDT table as define.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index a1bdab7305
From: Maximilian Brune
When ACPI is enabled on arm it will use the getinfo function to fill
the SPCR ACPI table.
Signed-off-by: Maximilian Brune
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Tom Rini
---
boot/bootflow.c | 8 ++--
drivers/serial/serial_pl01x.c | 24
Rename ACPI tables MADR to MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index c356df72ba
From: Maximilian Brune
This moves the SPCR and DBG2 table generation into common code, so that
they can be used by architectures other than x86.
Signed-off-by: Maximilian Brune
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Bin Meng
---
Changelog v2:
- Do not
une (3):
acpi: x86: Move SPCR and DBG2 into common code
acpi: x86: Write FADT in common code
serial: serial_pl01x: Implement .getinfo() for PL01
Patrick Rudolph (32):
acpi: x86: Move MADT to common code
acpi: Fix typo
acpi: Add define for GTDT
arm: acpi: Add generic ACPI methods
ac
Hi Simon,
On Tue, Oct 22, 2024 at 2:16 PM Simon Glass wrote:
>
> Hi Peter,
>
> On Mon, 21 Oct 2024 at 19:57, Peter Robinson wrote:
> >
> > > > > > Allow to use BLOBLIST_TABLES on arm to store ACPI or other tables.
> > > > > >
> > >
Hi Simon,
On Fri, Oct 18, 2024 at 1:18 AM Simon Glass wrote:
>
> Hi Patrick,
>
> On Wed, 16 Oct 2024 at 00:16, Patrick Rudolph
> wrote:
> >
> > Allow to use BLOBLIST_TABLES on arm to store ACPI or other tables.
> >
> > Signed-off-by: Patrick Rudolph
>
Add QEMU's SBSA ref board to azure pipelines and gitlab CI to run tests on it.
TEST: Run on Azure pipelines and confirmed that tests succeed.
Signed-off-by: Patrick Rudolph
Reviewed-by: Tom Rini
---
Changelog v6:
- Add gitlab CI support
---
.azure-pipelines.yml | 8
.gitlab-c
Allows to build the RPi4 with ACPI enabled.
TEST: - Boots on qemu-system-aarch64 -machine raspi4b
- Boots on real hardware with arm_64bit=1 in config.txt
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
Cc: Simon Glass
Cc: Matthias Brugger
Cc: Peter
Initialize addr to zero which allows to build on the CI
which is more strict.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
common/bloblist.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/bloblist.c b/common/bloblist.c
index 2008ab4d25..cf1a3b8b62
spi4b
- APs on real hardware do not enter Linux, but continue spinning in
their ACPI parking protocol spinloop. To be investigated.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Matthias Brugger
Cc: Peter Robinson
Cc: Tom Rini
---
arch/arm/mach-bcm283x/Kconfig
he APs are released from reset
and will enter U-Boot after it has been relocated as well.
By default ARMV8_MULTIENTRY is not selected, keeping existing behaviour.
TEST: All APs enter U-Boot when run on qemu-system-aarch64 and on
real hardware.
Signed-off-by: Patrick Rudolph
Reviewed-by: S
Implement read_mpidr() on armv7 to make use of it in generic
code that compiles on both armv7 and armv8.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
arch/arm/include/asm/system.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/system.h b/arch
extended to
other platforms, like ARMv7.
TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Tom Rini
---
Changelog v2:
- Use shorter function names
- Drop the use of atomics, they do not work on real ha
mailbox with the OS to
release the CPU.
TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
arch/arm/cpu/armv8/start.S | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu
9.0 without
modifications, since it doesn't emulate PCIe yet.
Signed-off-by: Simon Glass
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Matthias Brugger
Cc: Peter Robinson
---
Changelog v5:
- Drop CPU device from DSDT
- Add Extern to CPU devices in SSDT
---
functions that needs to be implemented.
When ACPI is not enabled the added code does nothing, keeping existing
behaviour.
TEST: Booted on RPi4 with only ACPI enabled, providing no FDT to the OS.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Matthias Brugger
Cc: Peter
From: Simon Glass
These header files presumably duplicate things already in the U-Boot
devicetree. For now, bring them in to get the ASL code and ACPI table
code to compile.
Signed-off-by: Simon Glass
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Acked-by: Matthias Brugger
Cc
d accessed the GIC in C code without crash.
1: https://datasheets.raspberrypi.com/bcm2711/bcm2711-peripherals.pdf
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Acked-by: Matthias Brugger
Cc: Matthias Brugger
Cc: Peter Robinson
---
arch/arm/mach-bcm283x/init.c | 2 +-
1 file
dora 40
1: Server Base System Architecture (SBSA)
2: https://www.qemu.org/docs/master/system/arm/sbsa.html
Signed-off-by: Patrick Rudolph
Cc: Peter Robinson
Cc: Simon Glass
Cc: Tom Rini
---
Changelog v3:
- Add GIC and GIC-ITS to devicetree
- Select GICv3 driver
- Drop acpi_fill_madt and use dr
Allow to use BLOBLIST_TABLES on arm to store ACPI or other tables.
Signed-off-by: Patrick Rudolph
Cc: Tom Rini
---
Changelog v9:
- default to BLOBLIST_ALLOC on arm
- Move default for BLOBLIST_SIZE_RELOC up
---
common/Kconfig | 2 ++
lib/Kconfig| 15 +--
2 files changed, 11
are used for SGIs
- ID16-ID31 are used for PPIs
TEST: Booted on QEMU raspb4 using GICV2 driver model generated MADT.
Signed-off-by: Patrick Rudolph
---
Changelog v6:
- Update header order
Changelog v9:
- Map SPI interrupts to ID32+
- Map PPI interrupts to ID16+
---
arch/arm/Kconfig | 7
mainboard code.
TEST: Booted on QEMU sbsa-ref using GICV3 driver model generated MADT.
Booted on QEMU raspb4 using GICV2 driver model generated MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
Changelog v4:
- Read everything from the DT
- Export
upts" property doesn't contain a phandle as "interrupts-extended"
does, so implement a new method to locate the interrupt-parent called
irq_get_interrupt_parent().
TEST: Read the interrupts from the GIC node for ACPI MADT generation.
Signed-off-by: Patrick Rudolph
---
Changelo
-ref that has a GICV3.
Signed-off-by: Patrick Rudolph
---
Changelog v9:
- Require at least 3 interrupt-cells
- Map SPI interrupts to ID32+
- Map PPI interrupts to ID16+
---
arch/arm/lib/gic-v3-its.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/lib/gic-v3
to use the new Kconfig name as well.
TEST: Booted on QEMU sbsa using the generic-ahci node.
Signed-off-by: Patrick Rudolph
Reviewed-by: Stefan Roese
Cc: Tom Rini
Cc: Stefan Roese
---
MAINTAINERS | 2 +-
configs/clearfog_defconfig
The code accesses the gic-v3 node, but not the gic-v3-its node,
thus rename the objects to clarify which node it operates on.
The following commit will make use of the gic-v3-its node for real.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
arch/arm/lib/gic-v3-its.c | 10
reused on other CPU drivers that are
compatible with armv8.
TEST: Booted on QEMU sbsa and verify the driver binds to CPU nodes.
Confirmed with FWTS that all ACPI processor devices are present.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
Add support for the generic XHCI driver that contains no SoC
specific code. It can be used on platforms that simply work out
of the box, like on emulated platforms.
TEST: Booted on QEMU sbsa machine using the generic xhci driver.
Signed-off-by: Patrick Rudolph
Reviewed-by: Marek Vasut
Cc: Tom
Add a new method to write the processor device identified by _HID
ACPI0007, that is preferred over the Processor OpCode since ACPI 6.0.
Fixes booting arm using ACPI only since the Processor OpCode isn't
found valid by the Linux kernel.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glas
ables in memory.
TEST: Booted QEMU SBSA (no QFW) using EFI and ACPI only.
Signed-off-by: Patrick Rudolph
Cc: Simon Glass
Cc: Tom Rini
---
Changelog v8:
- Only use bloblist to store tables on arm
---
lib/acpi/acpi_table.c| 66 +++-
test/py/
4GiB, like QEMU sbsa,
the RSDT cannot be used. Allow both RSDT and XSDT to be null and only
fill those tables that are present in acpi_add_table().
TEST: Fixes a crash on QEMU sbsa and allows to boot on QEMU sbsa.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Tom Rini
Allow other architectures to use acpi_create_mcfg_mmconfig as well
by moving the function prototype to common code.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
arch/x86/include/asm/acpi_table.h | 2 --
include/acpi/acpi_table.h | 13 +
2
The SoC can implement acpi_fill_iort to update the IORT table.
Add a helper function to fill out the NAMED_COMPONENT node.
TEST=Run FWTS V24.03.00 on RPi4 and round no problems.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 213
Return the ACPI table revision in acpi_get_table_revision() for
PPTT and GTDT. Match both to ACPI 6.2.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 2 ++
lib/acpi/acpi_table.c | 4
2 files changed, 6 insertions(+)
diff --git
The FADT structure found in U-Boot represents FADT revision 6 and the
GICC and GICD structures defined in U-Boot are based on ACPI revision
6.3.
Bump the table revision to fix FWTS failures seen on aarch64.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Bin Meng
Add a new method to acpi_ops to let drivers fill out ACPI MADT.
The code is unused for now until drivers implement the new ops.
TEST: Booted on QEMU sbsa using driver model generated MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
Changelog v4:
- Drop __weak
Add generic ACPI code to generate
- MADT GICC
- MADT GICD
- MADT GICR
- MADT GIC ITS
- PPTT processor
- PPTT cache
as commonly used on arm platforms.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
---
Changelog v2:
- Add full comments to exported
Add the interrupt flag used in ACPI GTDT table as define.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index a1bdab7305
From: Maximilian Brune
When ACPI is enabled on arm it will use the getinfo function to fill
the SPCR ACPI table.
Signed-off-by: Maximilian Brune
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Tom Rini
---
boot/bootflow.c | 8 ++--
drivers/serial/serial_pl01x.c | 24
Rename ACPI tables MADR to MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index c356df72ba
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