We configured the drive strength and security of EMMC in
arch_cpu_init().
Signed-off-by: Nico Cheng
---
Changes in v3:
Replace configuration parameters of SGRF_SOC_CON4 with macro
definitions.
Changes in v2:
We use the rk_clrreg function instead of the writel to set eMMC sdmmc0 to
secure
Enable sdhci and sdmmc0 node in rk3568-u-boot.dtsi
Signed-off-by: Nico Cheng
---
(no changes since v1)
arch/arm/dts/rk3568-u-boot.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 1570f13fc7
Enable SPL support in Kconfig and add some related option in
rk3568_common.h
Signed-off-by: Nico Cheng
Signed-off-by: Jason Zhu
---
(no changes since v1)
arch/arm/mach-rockchip/Kconfig | 2 ++
configs/evb-rk3568_defconfig| 25 -
include/configs/rk3568_common.h
eMMC sdmmc0 to
secure.
Modify comments to make them more explicit.
Nico Cheng (3):
rockchip: Kconfig: Enable SPL support for rk3568
arm: dts: rockchip: rk3568: Enable sdhci and sdmmc0 node
rockchip: rk3568: add arch_cpu_init()
arch/arm/dts/rk3568-u-boot.dtsi| 17
arch
Enable sdhci and sdmmc0 node in rk3568-u-boot.dtsi
Signed-off-by: Nico Cheng
---
(no changes since v1)
arch/arm/dts/rk3568-u-boot.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 1570f13fc7
We configured the drive strength and security of EMMC in
arch_cpu_init().
Signed-off-by: Nico Cheng
---
Changes in v2:
We use the rk_clrreg function instead of the writel to set eMMC sdmmc0 to
secure.
Modify comments to make them more explicit.
arch/arm/mach-rockchip/rk3568/rk3568.c | 19
Enable SPL support in Kconfig and add some related option in
rk3568_common.h
Signed-off-by: Nico Cheng
Signed-off-by: Jason Zhu
---
(no changes since v1)
arch/arm/mach-rockchip/Kconfig | 2 ++
configs/evb-rk3568_defconfig| 25 -
include/configs/rk3568_common.h
This series adds support for the rk3568 SOC, SPL load next-stage image from
eMMC will be supported after this series of patches.
Changes in v2:
We use the rk_clrreg function instead of the writel to set eMMC sdmmc0 to
secure.
Modify comments to make them more explicit.
Nico Cheng (3
We configured the drive strength and security of EMMC in
arch_cpu_init().
Signed-off-by: Nico Cheng
---
arch/arm/mach-rockchip/rk3568/rk3568.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c
b/arch/arm/mach-rockchip/rk3568/rk3568
Enable sdhci and sdmmc0 node in rk3568-u-boot.dtsi
Signed-off-by: Nico Cheng
---
arch/arm/dts/rk3568-u-boot.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 1570f13fc7..5a80dda275 100644
--- a
Enable SPL support in Kconfig and add some related option in
rk3568_common.h
Signed-off-by: Nico Cheng
Signed-off-by: Jason Zhu
---
arch/arm/mach-rockchip/Kconfig | 2 ++
configs/evb-rk3568_defconfig| 25 -
include/configs/rk3568_common.h | 4
3 files
This series adds support for the rk3568 SOC, SPL load next-stage image from
eMMC will be supported after this series of patches.
Nico Cheng (3):
rockchip: Kconfig: Enable SPL support for rk3568
arm: dts: rockchip: rk3568: Enable sdhci and sdmmc0 node
rockchip: rk3568: add arch_cpu_init
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