the non-removable property point to sdcard before, it is wrong,
it must point to emmc, correct it.
Signed-off-by: Lin Huang
---
drivers/mmc/rockchip_dw_mmc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index aeaec6c
the non-removable property point to sdcard before, it is wrong,
it must point to emmc, correct it.
Signed-off-by: Lin Huang
---
drivers/mmc/rockchip_dw_mmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
the non-removable property point to sdcard before, it is wrong,
it must point to emmc, correct it.
Signed-off-by: Lin Huang
---
drivers/mmc/rockchip_dw_mmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
set the mmc specific addresss and range as power on
write protection, you can't earse and write this range
of data if you enable it after mmc power on.
Signed-off-by: Lin Huang
---
Changes in v2:
- Adviced by Simon:
- use standard way of doing function comments
Changes in v1:
- Adviced by
Signed-off-by: Lin Huang
---
Changes in v1:
- Adviced by Simon:
- use real error in errno.h to return
- add full function comments for new function
drivers/mmc/mmc.c | 87 +++
include/mmc.h | 37 +++
2 files changed
Hi all,
i am sorry send wrong patch, please ignore these patchs.
2015-12-07 11:04 GMT+08:00 Lin Huang :
> From: Stephane Ayotte
>
> This patch adds an option to skip the registration of LCD stdio output for
> boards that want to show different text on LCD than on seria
kylin board use rk3036 SOC, 512M sdram, 8G emmc.
This add some basic files required to allow the board
to output serial message and can run command(mmc info etc).
Signed-off-by: Lin Huang
---
arch/arm/mach-rockchip/rk3036/Kconfig | 4 +++
board/kylin/kylin_rk3036/Kconfig| 15
only rank large than 1, we will use cs1_row, so check rank, when
rank larger than 1, we set the cs1_row.
Signed-off-by: Lin Huang
---
arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036
From: Stephane Ayotte
This patch adds an option to skip the registration of LCD stdio output for
boards that want to show different text on LCD than on serial output (or
the active stdout selected by the environment variable).
Signed-off-by: Stephane Ayotte
---
common/lcd.c | 13 +
From: Otavio Salvador
Add SPI NOR support:
=> sf probe
SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB
Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 29 +
include/configs/c
From: Marek Vasut
Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not
enabled in SPL, it takes 2 seconds to init the pool and has no obvious
benefit. Reduce the size to 1 MiB.
Signed-off-by: Marek Vasut
Cc: Stefano Babic
Cc: Tim Harvey
Tested-by: Stefano Babic
Acked-by: Tim
set the mmc specific addresss and range as power on
write protection, and can't earse and write this range
if you enable it after mmc power on.
Signed-off-by: Lin Huang
---
drivers/mmc/mmc.c | 89 +++
include/mmc.h | 10 ++-
2
we can use this config to disable rockchip serial driver in SPL stage,
since some rockchip soc sram size is small(rk3036 etc), so we don't
want rockchip serial driver build in SPL, but we still want use common
debug driver in SPL.
Signed-off-by: Lin Huang
---
arch/arm/mach-rockchip/Kconfig
enable this config so we use common uart function in SPL stage
Signed-off-by: Lin Huang
---
arch/arm/mach-rockchip/rk3036-board-spl.c | 6 ++
configs/evb-rk3036_defconfig | 5 +
include/configs/rk3036_common.h | 1 +
3 files changed, 8 insertions(+), 4 deletions
emmc and sdcard have different register address, use non-removeable property
to distinguish them.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
Changes in v6: None
Changes in v7:
- Adviced by Simon:
- use
From: Jeffy Chen
Our chips may have different max spl size and spl header, so
we need to add configs for that.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5:
- Adviced by Simon:
- move CONFIG_RO
From: Jeffy Chen
The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes
show how to packet rk3036 uboot image and boot from SD
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4:
- fix some spell error
Changes in v5:
- Adviced by Simon:
- add evb rk3036 board to supported boards
Changes in v6
This add some basic files required to allow the board to dispaly
serial message and can run command(mmc info etc)
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- get sdram info from evb_rk3036.c
Changes in v3:
- delete some
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
add rk3036 sdram driver so we can set up sdram in SPL
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix some code style error
Changes in v4:
- modify code advice by Simon Glass
Changes in v5:
- Advice by Simon:
- move some global variables to local
add early uart driver so we can print debug message in
SPL stage
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- pass uart base address to rk_uart_init() function
Changes in v4: None
Changes in v5: None
Changes in v6:
- Adviced by
rk3036 mmc do not have internal dma, so we use fifo mode when read
and write data, we get the fifo mode and fifo depth property from
dts, pass to dw_mmc driver.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
emmc and sdcard have different register address, use non-removeable property
to disginuish them.
Signed-off-by: Lin Huang
---
drivers/mmc/rockchip_dw_mmc.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
the data transfer seem to long in the dwmci_send_cmd function,
so move this block as a separate funciton.
Signed-off-by: Lin Huang
---
drivers/mmc/dw_mmc.c | 65 ++--
1 file changed, 37 insertions(+), 28 deletions(-)
diff --git a/drivers/mmc
some soc(rk3036 etc) use dw_mmc but do not have internal dma,
so we implement fifo mode to read and write data.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
Changes in v6:
- move data fifo mode to
Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3:
- fix some coding style error
Changes in v4: None
Changes in v5: None
Changes in v6:
- remove
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build reset_rk3036.c in NON-SPL stage
Changes in v3: None
Changes in v4: None
Changes
Add a driver that provides access to system controllers
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build syscon_rk3036.c on NON-SPL stage
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm/mach
GRF is the gereral register file. Add header files with register definitions.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to grf_rk3036.h
Changes in v3: None
Changes in v4: None
Changes in v5: None
Changes in
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3: None
Changes in
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to cru_rk3036.h
Changes in v3: None
Changes in v4: None
some rockchips soc will not use uclass in SPL stage,
so define config to decide whether to build common.c
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
Changes in v6: None
arch/arm/mach
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix compile error
Changes in v4: None
Changes in v5: None
Changes in v6: None
configs
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- modify code suggest by Simon
Changes in v3: None
Changes in v4: None
Changes in v5: None
Changes in v6: None
drivers/serial/serial_rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
since different rockchip soc need different spl file,
so rename board-spl.c.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
Changes in v6: None
arch/arm/mach-rockchip/Makefile
since different rockchip SOC have different size of SRAM,
So the size SYS_MALLOC_F_LEN may different, so move this
config to rk3288 own Kconfig
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- add udelay function
Changes in v3:
- fix some coding style
Changes in v4
Chen (2):
rockchip: Add max spl size & spl header configs
rockchip: Add support for rk's second level loader
Lin Huang (21):
rockchip: add timer driver
rockchip: move SYS_MALLOC_F_LEN to rk3288 own Kconfig
rockchip: rename board-spl.c to rk3288-board-spl.c
rockchip: add conf
From: Jeffy Chen
The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes
show how to packet rk3036 uboot image and boot from SD
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4:
- fix some spell error
Changes in v5:
- Adviced by Simon:
- add evb rk3036 board to supported boards
doc/README.rockchip | 11
From: Jeffy Chen
Our chips may have different sram size limits and chip tag, so
we need to add configs for that.
Signed-off-by: Jeffy Chen
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5:
- Adviced by Simon:
- move CONFIG_ROCKCHIP_MAX_INIT_SIZE
This add some basic files required to allow the board to dispaly
serial message and can run command(mmc info etc)
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- get sdram info from evb_rk3036.c
Changes in v3:
- delete some config
Changes in v4: None
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.
Signed-off-by: Lin Huang
---
Changes in v1
rk3036 mmc do not have internal dma, so we use fifo mode when read
and write data, we get the fifo mode and fifo depth property from
dts, pass to dw_mmc driver.
Signed-off-by: Lin Huang
---
arch/arm/dts/rk3036.dtsi | 1 +
drivers/mmc/rockchip_dw_mmc.c | 28 ++--
2
add rk3036 sdram driver so we can set up sdram in SPL
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix some code style error
Changes in v4:
- modify code advice by Simon Glass
Changes in v5:
- Advice by Simon:
- move some global variables to local
add early uart driver so we can print debug message in
SPL stage
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- pass uart base address to rk_uart_init() function
Changes in v4: None
Changes in v5: None
arch/arm/include/asm/arch-rockchip/uart.h | 44
some soc(rk3036 etc) use dw_mmc but do not have internal dma,
so we implement fifo mode to read and write data.
Signed-off-by: Lin Huang
---
drivers/mmc/dw_mmc.c | 81 +++-
include/dwmmc.h | 5
2 files changed, 72 insertions(+), 14
Add a driver that provides access to system controllers
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build syscon_rk3036.c on NON-SPL stage
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm/mach
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build reset_rk3036.c in NON-SPL stage
Changes in v3: None
Changes in v4: None
Changes in
Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3:
- fix some coding style error
Changes in v4: None
Changes in v5: None
drivers/pinctrl/Kconfig
GRF is the gereral register file. Add header files with register definitions.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to grf_rk3036.h
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3: None
Changes in
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to cru_rk3036.h
Changes in v3: None
Changes in v4: None
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- modify code suggest by Simon
Changes in v3: None
Changes in v4: None
Changes in v5: None
drivers/serial/serial_rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_rockchip.c
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix compile error
Changes in v4: None
Changes in v5: None
configs/chromebook_jerry_defconfig | 2 ++
configs/firefly
since different rockchip SOC have different size of SRAM,
So the size SYS_MALLOC_F_LEN may different, so move this
config to rk3288 own Kconfig
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
Chen (2):
rockchip: Add max init size & chip tag configs
rockchip: Add support for rk's second level loader
Lin Huang (19):
rockchip: add timer driver
rockchip: move SYS_MALLOC_F_LEN to rk3288 own Kconfig
rockchip: rename board-spl.c to rk3288-board-spl.c
rockchip: add conf
some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- add udelay function
Changes in v3:
- fix some coding style
Changes in v4
some rockchips soc will not use uclass in SPL stage,
so define config to decide whether to build common.c
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm/mach-rockchip/Makefile | 2
since different rockchip soc need different spl file,
so rename board-spl.c.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
arch/arm/mach-rockchip/Makefile | 2 +-
arch/arm/mach
From: Jeffy Chen
The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.
Signed-off-by: Jeffy Chen
---
Changes in v1: None
Changes in
show how to packet rk3036 uboot image and boot from SD
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4:
- fix some spell error
doc/README.rockchip | 7 +++
1 file changed, 7 insertions(+)
diff --git a/doc/README.rockchip b/doc
This add some basic files required to allow the board to dispaly
serial message and can run command(mmc info etc)
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- get sdram info from evb_rk3036.c
Changes in v3:
- delete some config
Changes in v4: None
From: Jeffy Chen
Our chips may have different sram size limits and chip tag, so
we need to add configs for that.
Signed-off-by: Jeffy Chen
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
include/configs/rk3288_common.h | 3 +++
tools/Makefile
add rk3036 sdram driver so we can set up sdram in SPL
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix some code style error
Changes in v4:
-modify code advice by Simon Glass
arch/arm/include/asm/arch-rockchip/sdram_rk3036.h | 341 ++
arch/arm
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.
Signed-off-by: Lin Huang
---
Changes in v1
add early uart driver so we can print debug message in
SPL stage
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- pass uart base address to rk_uart_init() function
Changes in v4: None
arch/arm/include/asm/arch-rockchip/uart.h | 44
rk3036 mmc driver is similar to dw_mmc, but use external dma,
this patch implment fifo mode, need to do dma mode in future.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- modify code suggest by Simon:
- use get_time() to do timeout
Changes in v3
Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3:
- fix some coding style error
Changes in v4: None
drivers/pinctrl/Kconfig | 18 ++
drivers/pinctrl
Add a driver that provides access to system controllers
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build syscon_rk3036.c on NON-SPL stage
Changes in v3: None
Changes in v4: None
arch/arm/mach-rockchip/rk3036/Makefile| 2 +-
arch
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build reset_rk3036.c in NON-SPL stage
Changes in v3: None
Changes in v4: None
arch/arm/mach-rockchip/rk3036
GRF is the gereral register file. Add header files with register definitions.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to grf_rk3036.h
Changes in v3: None
Changes in v4: None
arch/arm/include/asm/arch-rockchip/grf_rk3036.h
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to cru_rk3036.h
Changes in v3: None
Changes in v4: None
arch/arm/include/asm/arch
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3: None
Changes in v4: None
arch/arm/dts
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2:
- modify code suggest by Simon
Changes in v3: None
Changes in v4: None
drivers/serial/serial_rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c
index
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix compile error
Changes in v4: None
configs/chromebook_jerry_defconfig | 2 ++
configs/firefly-rk3288_defconfig | 2
since different rockchip soc need different spl file,
so rename board-spl.c.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
arch/arm/mach-rockchip/Makefile | 2 +-
arch/arm/mach-rockchip/board-spl.c| 277
some rockchips soc will not use uclass in SPL stage,
so define config to decide whether to build common.c
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
arch/arm/mach-rockchip/Makefile | 2 +-
include/configs/rk3288_common.h | 3
Chen (2):
rockchip: Add max init size & chip tag configs
rockchip: Add support for rk's second level loader
Lin Huang (18):
rockchip: add timer driver
rockchip: move SYS_MALLOC_F_LEN to rk3288 own Kconfig
rockchip: rename board-spl.c to rk3288-board-spl.c
rockchip: add conf
some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- add udelay function
Changes in v3:
- fix some coding style
Changes in v4
since different rockchip SOC have different size of SRAM,
So the size SYS_MALLOC_F_LEN may different, so move this
config to rk3288 own Kconfig
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
arch/arm/mach-rockchip/Kconfig| 3
From: Jeffy Chen
Our chips may have different sram size limits and chip tag, so
we need to add configs for that.
Signed-off-by: Jeffy Chen
---
include/configs/rk3288_common.h | 3 +++
tools/Makefile | 6 ++
tools/rkcommon.c| 2 +-
tools/rkcommon.h
show how to packet rk3036 uboot image and boot from SD
Signed-off-by: Lin Huang
---
doc/README.rockchip | 7 +++
1 file changed, 7 insertions(+)
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 87ce9d2..893f256 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
From: Jeffy Chen
The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.
Signed-off-by: Jeffy Chen
---
tools/rkcommon.c | 24 +++
add early uart driver so we can print debug message in
SPL stage
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- pass uart base address to rk_uart_init() function
arch/arm/include/asm/arch-rockchip/uart.h | 44
arch/arm/mach
add rk3036 sdram driver so we can set up sdram in SPL
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: fix some code style error
arch/arm/include/asm/arch-rockchip/sdram_rk3036.h | 336 ++
arch/arm/mach-rockchip/rk3036/Makefile| 2
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.
Signed-off-by: Lin Huang
---
Changes in v1
This add some basic files required to allow the board to dispaly
serial message and can run command(mmc info etc)
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- get sdram info from evb_rk3036.c
Changes in v3:
- delete some config
arch/arm/dts
rk3036 mmc driver is similar to dw_mmc, but use external dma,
this patch implment fifo mode, need to do dma mode in future.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- modify code suggest by Simon:
- use get_time() to do timeout
Changes in v3
Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3:
- fix some coding style error
drivers/pinctrl/Kconfig | 18 ++
drivers/pinctrl/rockchip/Makefile
Add a driver that provides access to system controllers
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build syscon_rk3036.c on NON-SPL stage
Changes in v3: None
arch/arm/mach-rockchip/rk3036/Makefile| 2 +-
arch/arm/mach-rockchip
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build reset_rk3036.c in NON-SPL stage
Changes in v3: None
arch/arm/mach-rockchip/rk3036/Makefile | 10
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3: None
arch/arm/dts/rk3036.dtsi
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2:
- modify code suggest by Simon
Changes in v3: None
drivers/serial/serial_rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c
index 0e7bbfc..21836bb
GRF is the gereral register file. Add header files with register definitions.
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to grf_rk3036.h
Changes in v3: None
arch/arm/include/asm/arch-rockchip/grf_rk3036.h | 493
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to cru_rk3036.h
Changes in v3: None
arch/arm/include/asm/arch-rockchip/cru_rk3036.h
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix compile error
configs/chromebook_jerry_defconfig | 2 ++
configs/firefly-rk3288_defconfig | 2 ++
configs
some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2:
- add udelay function
Changes in v3:
- fix some coding style
arch/arm/include/asm/arch-rockchip
since different rockchip SOC have different size of SRAM,
So the size SYS_MALLOC_F_LEN may different, so move this
config to rk3288 own Kconfig
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
arch/arm/mach-rockchip/Kconfig| 3 ---
arch/arm/mach
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