easier to
understand the flow of the two separate functions.
Signed-off-by: Laurence Withers
Cc: Tom Rini
Cc: Hadli, Manjunath
Cc: Heiko Schocher
---
Changes in v2:
- Re-ordered patch series to tidy up clock IDs before tidying up users
(set_cpu_clk_info()).
---
arch/arm/cpu/arm926ejs/davinci/cp
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).
Signed-off-by: Laurence Withers
Cc: Tom Rini
Cc: Prabhakar Lad
---
Changes
Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.
Signed-off-by: Laurence Withers
Cc: Tom Rini
Cc: Prabhakar Lad
---
Changes in v2:
- Re
On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.
Signed-off-by: Laurence Withers
Cc: Tom Rini
Cc: Prabhakar Lad
---
Changes in v2:
llows
three bugs to be identified and resolved:
- on the DA850, UART2's clock may come from ASYNC3, unlike the DA830;
- the DA830 doesn't have a DDR2/mDDR PHY, or a PLL controller for it;
- the DSP speed reported by bdinfo was not being initialised on the DA8xx
family.
Laur
On Mon, Jul 30, 2012 at 04:30:15PM +, Laurence Withers wrote:
> Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
> definition. In addition, don't request this clock ID on DA830 hardware,
> which does not have a DDR2/mDDR PHY (or associated PLL controller).
>
s a little and added a constant for the DDR2
clock ID as you suggested. It made sense that this would be a separate set
of patches:
http://lists.denx.de/pipermail/u-boot/2012-July/129444.html
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197
On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.
Signed-off-by: Laurence Withers
Cc: Prabhakar Lad
---
arch/arm/include/asm/arch-da
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).
Signed-off-by: Laurence Withers
Cc: Prabhakar Lad
---
arch/arm/cpu/arm926ejs/da
Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.
Signed-off-by: Laurence Withers
Cc: Prabhakar Lad
---
arch/arm/include/asm/arch-davinci
easier to
understand the flow of the two separate functions.
Signed-off-by: Laurence Withers
Cc: Tom Rini
Cc: Hadli, Manjunath
Cc: Heiko Schocher
---
arch/arm/cpu/arm926ejs/davinci/cpu.c | 21 +
1 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm/cpu
Signed-off-by: Laurence Withers
---
drivers/gpio/pca953x.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index 359fdee..64c7797 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -287,7 +287,7
Use the standard CMD_RET_* constants to clearly report errors from the
pca953x command. In addition, print error messages when I2C communication
fails.
Signed-off-by: Laurence Withers
---
drivers/gpio/pca953x.c | 49 ++-
1 files changed, 35
ose following along, a program to talk to
the boot ROM over the UART and download some code that the boot ROM can burn
into SPI flash).
What is the advantage in allowing the SPL to flash U-Boot also?
Many thanks, and bye for now,
--
Laurence Withers, http://www.guralp.com/
Direc
On Sun, Mar 04, 2012 at 11:58:27AM +, Laurence Withers wrote:
> +#define INIT_FUNC(fn, init_name, deps) \
> +static int ##fn (void); \
^^
Excuse the macro catenation operator; that shouldn't be there. Hopefully the
example made it clear.
Bye for now,
-
nt x)
{
return x + 1;
}
#define INIT_FUNC(fn) \
static void fn(int)
INIT_FUNC(f1);
gcc immediately throws the following error:
t2.c:9: error: conflicting types for ‘f1’
t2.c:1: note: previous definition of
ot; #init_name "}\n";
> +
> +#define REPLACE_INIT(old_func, new_func) \
> + static const char __replace_init_ ## old_func[] __used \
> + __attribute__((__section__(".initfuncs"))) = \
> + "[" #old_func "," #new_func "
ck pointer */
> print_num("sp start ", gd->start_addr_sp);
> print_num("FB base ", gd->fb_base);
> + /*
> + * TODO: Currently only support for davinci SOC's is added.
> + * Remove this check once all the board implement this.
&g
ou cloned from. I guess a "normal"
workflow would be:
git checkout
git fetch
git rebase /master
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
Gene
I note this patch uses some constants introduced by your previous patch that
Mike Frysinger has NAKed, so I guess it will require some rework once you
have addressed his comments.
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643
r
> Cc: Joe Hershberger
> Cc: Kim Phillips
Tested-by: Laurence Withers
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: CMG-DCM CMG-EAM CMG-NAM
_
On Tue, Oct 11, 2011 at 10:50:12PM -0500, Joe Hershberger wrote:
> Common GPIO API used by cmd_gpio should be available to any arch
>
> Signed-off-by: Joe Hershberger
> Cc: Joe Hershberger
> Cc: Kim Phillips
Tested-by: Laurence Withers
Bye for now,
--
Laurence Withers,
On Mon, Sep 26, 2011 at 04:02:30PM +, Laurence Withers wrote:
> In nand_davinci_readecc(), select the correct NANDFECC register based
> on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
> This allows 1-bit hardware ECC to work with chip select other than CS2.
>
working cache functions, so that DA8xx boards (and
presumably other DaVinci processors) can run with Ethernet and cache enabled.
There have been a few proposals floating around to do this, but I'm not sure
whether they've stalled or are continuing quietly along.
Bye for now,
--
Laurence Withe
figs for the
EVMs? If the latter, it might be better to change the patch subject.
Otherwise it flags these patches as being relevant to anyone using the DA850
processor, which actually isn't the case from a quick read.
Bye for now,
--
Laurence Withers, http://www.guralp.com/
D
be better to simply drop this patch from the patch series
altogether, leaving the caches explicitly disabled, until such a time as the
EMAC driver is fixed (I guess we are mainly waiting to see if anyone wants to
tackle cache ops for the ARM926EJS) and the code has been verified with
caches enabl
On Wed, Oct 05, 2011 at 03:08:24PM +0200, Stefano Babic wrote:
> Drop direct access to SOC's registers and use
> the function of the GPIO driver for da8xx.
Dear Stefano,
The da8xx GPIO driver also configures the pinmux for you.
Bye for now,
--
Laurence Withers,
board/davinci/ea20/ea20.c| 30
> +-
> 2 files changed, 33 insertions(+), 1 deletions(-)
There are generic GPIO functions (asm/gpio.h) for DaVinci; you should
probably use those instead of directly programming the registers.
Bye for now,
--
Laure
bove. If ubifs_sb is null, then
free(ubis_sb->...) will be a null pointer dereference.
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: CMG-DCM CMG-EAM CMG-NAM
eem to resolve the
situation so it would appear there are some bugs in the TI EMAC driver. I
also note it doesn't reset the PHY properly as if I reboot from Linux with
the PHY forced to 10BASE-T then U-Boot is no longer able to get the link up.
Bye for now,
--
Laurence Withers,
The generated file asm-offsets.s may be found at various depths in the
arch subdirectories, so simply ignore it throughout the tree.
Signed-off-by: Laurence Withers
---
.gitignore |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/.gitignore b/.gitignore
index 2a82cd9
27;t find any posted patches to fix the EMAC driver (though I
would be very glad if I was wrong about this!).
If so, we haven't actually "fixed EMAC issue with cache coherency" - the
driver is still broken if caches are enabled, and the commit message should
reflect that. Th
ike, please feel free to add:
Tested-by: Laurence Withers
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: CMG-DCM CMG-EAM CMG-NAM
_
nfigurable with a #define, as it would seem wasteful
to allocate memory for 31 phy_t structures when I doubt there are any boards
that could truly take advantage of that).
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643
committed)
#
# arch/arm/cpu/arm926ejs/davinci/asm-offsets.s
nothing added to commit but untracked files present (use "git add" to track)
We could ignore all files named asm-offsets.s , or perhaps all files under
arch ?
Bye for now,
--
Laurence Withers, http://w
look a few lines further down, under
/* DA850-specific peripherals */ .
This was added in commit 732590b3.
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queri
with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.
Signed-off-by: Laurence Withers
---
Changes for v2:
Add Signed-off-by to commit message.
---
drivers/mtd/nand/davinci_nand.c | 26 +-
1 files changed, 13 insertions(+), 13
with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.
Signed-off-by: Laurence Withers
---
Changes for v2:
Add Signed-off-by to commit message.
---
drivers/mtd/nand/davinci_nand.c | 26 +-
1 files changed, 13 insertions(+), 13
On Wed, Sep 28, 2011 at 12:58:45PM +0400, Sergei Shtylyov wrote:
>You need to sign off your patch. Add this line to the changelog:
>
> Signed-off-by: Laurence Withers
Thanks, I have reposted v2. Please ignore the posting with the unaltered
subject line; I only realised after sendi
In nand_davinci_readecc(), select the correct NANDFECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.
Note this now matches the usage in nand_davinci_enable_hwecc(), which
already had the
respect to the cache, although I have not attempted that change myself. I
have seen some patches start to flow that make changes in drivers to work
correctly with caches enabled, such as
http://lists.denx.de/pipermail/u-boot/2011-August/098484.html .
Bye for now,
--
Laurence Withers,
ver issues are the reason for disabling the caches then the commit
message should reflect this.
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: CMG-DCM CMG-EAM C
dated patch set.
Many thanks, and bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General support queries: CMG-DCM CMG-EAM CMG-NAM
___
U-B
On Sat, Jul 16, 2011 at 11:11:15AM +0200, Albert ARIBAUD wrote:
> This is a rename, so use 'git mv...' and 'git format-patch -C' to let
> git and readers know it is.
Hi Albert,
Thanks for the tip. I reposted a v2 with this.
Bye for now,
--
Laurence Wit
On Sat, Jul 16, 2011 at 11:06:50AM +0200, Albert ARIBAUD wrote:
> Maybe as it touches at least indirectly DA8x boards you could CC: the
> board maintainers?
Hi Albert,
Thanks for the pointer, I have reposted with CCs in place.
Bye for now,
--
Laurence Withers,
Some general cleanup patches for the DaVinci/DA8xx CPUs made in preparation
for porting to a new board based on the DA850.
This is an unchanged repost from my original, with DaVinci/DA8xx board
maintainers CCed.
Laurence Withers (4):
DaVinci EMAC: declare function for all DA8xx CPUs
DA8xx
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.
Signed-off-by: Laurence Withers
---
arch/arm/include/asm/arch-davinci
.
Signed-off-by: Laurence Withers
---
arch/arm/include/asm/arch-davinci/davinci_misc.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/davinci_misc.h
b/arch/arm/include/asm/arch-davinci/davinci_misc.h
index 347aa89..211b769 100644
--- a
Signed-off-by: Laurence Withers
---
arch/arm/include/asm/arch-davinci/hardware.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index df3f549..d5d4211 100644
--- a/arch/arm
There are two main sets of LPSC constants, depending on the processor
family. The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.
Signed-off-by: Laurence Withers
---
arch/arm
In preparation for a generic GPIO driver for the DA8xx processors,
rename to and fix up all files
which include it.
Signed-off-by: Laurence Withers
---
Changes for v2:
- Use git format-patch -C to properly denote rename.
---
.../asm/arch-davinci/{gpio_defs.h => gpio.h} |0
bo
function to GPIO.
Signed-off-by: Laurence Withers
---
Changes for v2:
- None.
---
arch/arm/include/asm/arch-davinci/gpio.h |8 +
drivers/gpio/Makefile|1 +
drivers/gpio/da8xx_gpio.c| 281 ++
3 files changed, 290 insertions
This adds a generic GPIO driver fulfilling the interface for the
TI DaVinci DA8xx CPU.
Laurence Withers (2):
DaVinci: rename gpio_defs.h to gpio.h
DA8xx: add generic GPIO driver
.../asm/arch-davinci/{gpio_defs.h => gpio.h} |8 +
board/davinci/dm355leopard/dm355leopar
function to GPIO.
Signed-off-by: Laurence Withers
---
arch/arm/include/asm/arch-davinci/gpio.h |8 +
drivers/gpio/Makefile|1 +
drivers/gpio/da8xx_gpio.c| 281 ++
3 files changed, 290 insertions(+), 0 deletions(-)
create
In preparation for a generic GPIO driver for the DA8xx processors,
rename to and fix up all files
which include it.
Signed-off-by: Laurence Withers
---
arch/arm/include/asm/arch-davinci/gpio.h | 66 +
arch/arm/include/asm/arch-davinci/gpio_defs.h | 66
This adds a generic GPIO driver fulfilling the interface for the
TI DaVinci DA8xx CPU.
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Signed-off-by: Laurence Withers
---
arch/arm/include/asm/arch-davinci/hardware.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index df3f549..d5d4211 100644
--- a/arch/arm
There are two main sets of LPSC constants, depending on the processor
family. The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.
Signed-off-by: Laurence Withers
---
arch/arm
.
Signed-off-by: Laurence Withers
---
arch/arm/include/asm/arch-davinci/davinci_misc.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/davinci_misc.h
b/arch/arm/include/asm/arch-davinci/davinci_misc.h
index 347aa89..211b769 100644
--- a
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.
Signed-off-by: Laurence Withers
---
arch/arm/include/asm/arch-davinci
Some general cleanup patches for the DaVinci/DA8xx CPUs made in preparation
for porting to a new board based on the DA850.
___
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In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strncpy()
instead.
Signed-off-by: Laurence Withers
Cc: Andy Fleming
---
On Fri, Jul 15, 2011 at 09:21:45AM +, Laurence Withers wrote:
> In miiphy_register() the new device's name was initialised by passing a
> string parameter as the format string to sprintf(). As this would cause
> problems if it ever contained a '%' symbol, switch to u
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strncpy()
instead.
Signed-off-by: Laurence Withers
Cc: Andy Fleming
---
code did have a check for the name
overflowing but BUG_ON() is IMO clearer so I switched to using it instead. I
kept strncpy() in v3, rather than just strcpy(), because it makes the code
robust against future edits. Thanks for the feedback.
Bye for now,
--
Laurence Withers,
h, but turning of dcache doesn't really have any side effects
that cause problems for me.
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643 Software Engineer
General suppo
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strncpy()
instead.
Signed-off-by: Laurence Withers
Cc: Andy Fleming
---
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strcpy()
instead.
Signed-off-by: Laurence Withers
Cc: Andy Fleming
---
comm
arious Davinci LPSC modules as much as possible.
I'm willing to give this a go, but I am unable to physically test the results
on any of the Davinci family except the DA850.
Bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+444086
e.g.:
DAVINCI_LPSC_MMC_SD,/* actually MMC_SD0 on DA8xx */
DAVINCI_LPSC_MMC_SD1,
It seems a little inconsistent to me, but I'm happy to do it if preferred.
Or, I can do what I have done, and change only the DA8xx names.
Which is the preferred option? Or something else entirely?
Many thanks, an
h were not used anywhere in the code. I
also verified that a "./MAKEALL -s davinci" gave the same results before
and after.
Many thanks for the feedback, and bye for now,
--
Laurence Withers, http://www.guralp.com/
Direct tel:+447753988197 or tel:+44408643
changes.
Signed-off-by: Laurence Withers
Cc: Sandeep Paulraj
---
Changes for v2:
- Fixed formatting of commit message.
---
arch/arm/include/asm/arch-davinci/hardware.h | 29 +-
1 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/arch
The DA8xx chips have two modules PSC0 and PSC1 for the local power and sleep
controllers (LPSC). Each LPSC has up to 32 submodules over which it has control,
which are enumerated by the DAVINCI_LPSC_* symbols.
This commit fixes the definitions of a number of symbols to be consistent with
both the
a reply to this mail I've attached my first attempt at a patch for u-boot,
which addresses this issue.
Any feedback (esp. wrt formatting and use of the git tools etc.) is gratefully
received.
Laurence Withers (1):
DA8xx: fix LPSC numbering
arch/arm/include/asm/arch-davinci/ha
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