r you.
Which config header are you using? Naturally, I am using the sam9m10g45ek
header, but since you have a slightly different board, which doesn't
appear to have a header, how did you proceed?
Best regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-4920
Email: awater...@dawnin
>Why 'volatile'? Also, there shouldn't be an empty line before it but there
> should be one after it...
I used a volatile to prevent the compiler from optimizing out the (normally)
useless loop. Is there a cleaner way to do this?
Best regards,
Alex
--
Alex Water
it has yet to actually get to the mailing list. Is a delay normal or should I
try
and email it again or something else entirely?
Best regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-4920
Email: awater...@dawning.com
___
U-Boot mailing
Moves to using newer defines and adds possible support for the
second bank of RAM (if so desired).
Also, some coding clean up: removed the needless define to 1s for
defines that just act as flags.
Signed-off-by: Alex Waterman
---
include/configs/at91sam9m10g45ek.h | 188
Moves the at91sam9g45_matrix.h header file to use the new
ATMEL_BASE_MATRIX define.
Signed-off-by: Alex Waterman
---
.../arm/include/asm/arch-at91/at91sam9g45_matrix.h | 84 ++--
1 files changed, 42 insertions(+), 42 deletions(-)
diff --git a/arch/arm/include/asm/arch-at91
Add the default generic at91sam9m10g45ek_config target to the new
config system. Not all possible configurations of u-boot for the
at91sam9m10g45ek are included yet. Add them as needed.
Signed-off-by: Alex Waterman
---
boards.cfg |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff
Adds a short busy loop wait to the atmel_usart.c serial_init()
function.
Signed-off-by: Alex Waterman
---
drivers/serial/atmel_usart.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index e326b2b..e355706
Some boards use AT91_SLOW_CLOCK and other use
CONFIG_SYS_AT91_SLOW_CLOCK. This patch makes it so the arm926ejs
clock code will return which ever is set.
Signed-off-by: Alex Waterman
---
arch/arm/cpu/arm926ejs/at91/clock.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git
, etc) is available on boot.
Signed-off-by: Alex Waterman
---
.../cpu/arm926ejs/at91/at91sam9m10g45_devices.c| 26 ++--
1 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
b/arch/arm/cpu/arm926ejs/at91
file.
If I am not alone in having trouble with the existing at91bootstrap
projects, maybe we could merge my bootstrapper into (or the preexisting
at91bootstrapper proejcts) into the NAND SPL (for NAND booting boards)
section of U-Boot?
Alex Waterman (8):
Remove old config stuff from Mak
Fixes the compile errors in the board specific initializations for
the at91sam9m10g45ek specific files.
Signed-off-by: Alex Waterman
---
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 128 +++
board/atmel/at91sam9m10g45ek/led.c |6 +-
2 files changed, 67
Start the process of pushing the at91sam9m10g45ek* boards to
the new builds.cfg configuration style. At the moment just the
generic config is available, add the rest as necessary.
Signed-off-by: Alex Waterman
---
Makefile | 21 -
1 files changed, 0 insertions(+), 21
hing work? For me, I
have all of my hardware up and running (including the second bank of RAM
which seemed like it was not supported before).
4 I presume your booting into Linux after U-Boot?
Best regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-4920
Email: awater.
ugh. I could
repost it if you are interested.
Best regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-4920
Email: awater...@dawning.com
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>From 99efc91f7a3d55bcf0e839ae30c286fd08166010 Mon Sep 17 00:00:00 2001
From: Alex Waterman
Date: Thu, 19 May 2011 15:08:36 -0400
Subject: [PATCH] NAND: Add 16bit NAND support for the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two con
-off-by: Alex Waterman
---
.../cpu/arm926ejs/at91/at91sam9m10g45_devices.c| 26 +++---
arch/arm/cpu/arm926ejs/at91/clock.c|2 +-
arch/arm/cpu/arm926ejs/at91/timer.c| 13 +++
.../arm/include/asm/arch-at91/at91sam9g45_matrix.h | 84
when a 16 bit chip is being used.
Signed-off-by: Alex Waterman
Cc: Scott Wood
Cc: Stefan Roese
---
README |8
drivers/mtd/nand/ndfc.c | 33 +
nand_spl/nand_boot.c| 11 ---
3 files changed, 45 insertions(+), 7
FC-specific file.
Oh, yeah, I see. This should not have been swapped to a preprocessor
condition. Could we make a general define for 16 bit NAND not just limited
to the NDFC? Or would you rather just have the extra if condition despite
the extra code space it takes up?
Regards,
Alex
--
Alex
u-boot] Error 1
>
> Any thoughts?
It looks like the .bootpg code segment is too big. It could be that recent
changes to the NAND spl used by PPC chips is causing this. I will try to
recreate your error.
Regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 21
>From dc3cda4054bc94c2ae3c1d104b5162681a16e7ac Mon Sep 17 00:00:00 2001
From: Alex Waterman
Date: Thu, 19 May 2011 15:08:36 -0400
Subject: [PATCH v2] NAND: Add 16bit NAND support for the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two con
aller code
size. That's probably more useful overall.
Regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-4920
Email: awater...@dawning.com
___
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I know there has been a lot of activity related to other things in the U-Boot
source, but has anyone had a chance to review this patch?
Regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-4920
Email: awater...@dawning.com
___
U-Boot
From: Alex Waterman
Date: Thu, 19 May 2011 15:08:36 -0400
Subject: [PATCH] [NAND] Fixes 16bit NAND support with the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two config entries were added:
CONFIG_SYS_NDFC_16- Setting this tells the
>From ad2238044b9abc5a2094096219a1256a8ad091b0 Mon Sep 17 00:00:00 2001
From: Alex Waterman
Date: Thu, 19 May 2011 15:08:36 -0400
Subject: [PATCH] [NAND] Fixes 16bit NAND support with the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two con
s to me that if its doing an 8 bit check for
0x or 0x then it doesn't matter the endianness at all. Maybe that
code is trying to make up for other code incorrectly writing only a single
byte for the bad block marker?
Regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-
matter. Is that something that we can do? Just choose
to use 0x? Will that not potentially mess up JFFS support or what not
from the Linux kernel that gets booted?
Regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-4920
Email: awater...@dawning.com
___
Scott,
On 05/17/2011 01:05 PM, Scott Wood wrote:
> On Tue, 17 May 2011 10:11:14 -0400
> Alex Waterman wrote:
>
>> I have seen issues with the nand_read_byte16() function in nand_base.c; it
>> seems like the cpu_to_le16() should be the other way around: le16_to_cpu().
d the sequoia.c file (which I renamed to
tiger.c). Also the linker script differs slightly. How would we go about making
those board files common (init.S, chip_config.c)?
Regards,
Alex
--
Alex Waterman
Computer Engineer
Phone: 215-896-4920
Email: awater...@dawning.com
__
se much of our board specific support files are copies from the sequoia
code. Would it be better to symlink to the ones that are not modified? Or is it
OK to just copy the relevant source files into our own board directory and make
minor adjustments as needed?
Regards,
Alex
--
Alex Waterma
This patch decreases the code size of the nand_spl by turning multiple function
pointer dereferences in a single function into a single local function pointer.
Signed-off-by: Alex Waterman
Cc: Scott Wood
Cc: Stefan Roese
---
This works on my local board but I haven't tested it on anything
Scott,
> Or we could apply both and save even more space, delaying the next time we
> run into trouble. :-)
Since the spl is so limited in space, would it be worth making every function
in the spl use a local function pointer instead of lots of dereferences?
- Alex
Stefan,
> The 2nd patch fixes the size problem as well. So no need for your patch any
> more.
Ahh, I saw the first but missed the second I guess.
> BTW: What platform/SoC are you using?
I am using a custom board based on the AMCC sequoia board. At some point I
plan to try and mainline our po
>From b59f1e5b0bc3684615756c12fd5c5f9fcaa4c812 Mon Sep 17 00:00:00 2001
From: Alex Waterman
Date: Tue, 3 May 2011 15:00:23 -0400
Subject: [PATCH] Decreases code size of the nand_spl
The canyonland boards nand_spl size is just under the maximum 4KByte size. This
patch decreases the size of
Sorry, I screwed up the settings in Thunderbird, hopefully I fixed the
white space/name issues now.
About the patch not applying, I used git format-patch and git apply to
test the stuff locally, was that wrong?
Here is a revised patch, I hope this is better.
- Alex
From: Alex Waterman
Date
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