On Thu, Oct 24, 2024 at 07:03:24AM +0200, Heinrich Schuchardt wrote:
> Am 22. Oktober 2024 15:18:45 MESZ schrieb Andy Shevchenko
> :
> >On Tue, Oct 22, 2024 at 08:02:46AM +0200, Heinrich Schuchardt wrote:
> >> On 10/21/24 16:40, Ilias Apalodimas wrote:
> >> > On Mon, 21 Oct 2024 at 17:06, Andy She
Hi Bryan
On 23/10/24 20:09, Bryan Brattlof wrote:
On October 21, 2024 thus sayeth Santhosh Kumar K:
As R5 is a 32 bit processor, the RAM banks' base and size calculation
is restricted to 32 bits, which results in wrong values if bank's base
is greater than 32 bits or bank's size is greater than
> -Original Message-
> From: Tim Harvey
> Sent: Thursday, October 24, 2024 5:29 AM
> To: Heiko Schocher ; Tom Rini ; Peng Fan
> ; Jaehoon
> Chung ; u-boot@lists.denx.de
> Cc: linux-ker...@vger.kernel.org; Tim Harvey
> Subject: [PATCH 2/4] imx: power-domain: Convert to use livetree API
On Tue, Oct 22, 2024 at 01:05:21PM -0700, Raymond Mao wrote:
> Motivations for changes:
> Current SMBIOS library and command-line tool is not fully matching with
> the requirements:
> 1. Missing support for other mandatory types (#7, #9, #16, #17, #19).
> 2. Only a few platforms support SMBIOS nod
> -Original Message-
> From: Tim Harvey
> Sent: Thursday, October 24, 2024 5:29 AM
> To: Heiko Schocher ; Tom Rini ; Peng Fan
> ; Jaehoon
> Chung ; u-boot@lists.denx.de
> Cc: linux-ker...@vger.kernel.org; Tim Harvey
> Subject: [PATCH 4/4] mmc: fsl_esdhc: Convert to use livetree API fo
On 23/10/2024 15:09, Martin Stolpe wrote:
The functions fdt_simplefb_add_node and fdt_simplefb_enable_and_mem_rsv
are only available if CONFIG_FDT_SIMPLEFB is enabled.
Signed-off-by: Martin Stolpe
Acked-by: Matthias Brugger
---
board/raspberrypi/rpi/rpi.c | 12 +++-
1 file c
On Tue, Oct 22, 2024 at 08:13:40PM +0200, Simon Glass wrote:
> Hi Andy,
>
> On Tue, 22 Oct 2024 at 15:23, Andy Shevchenko
> wrote:
> >
> > On Mon, Oct 21, 2024 at 06:32:21PM +0200, Simon Glass wrote:
> > > On Mon, 21 Oct 2024 at 16:27, Andy Shevchenko
> > > wrote:
> > > >
> > > > looking at the
On Mon, Oct 21, 2024 at 07:07:43PM +0200, Heinrich Schuchardt wrote:
> On 10/21/24 18:32, Simon Glass wrote:
> > Hi Andy,
> >
> > On Mon, 21 Oct 2024 at 16:27, Andy Shevchenko
> > wrote:
> > >
> > > Hi!
> > >
> > > looking at the redness of the output of `make W=1` here is the question:
> > > i
On Tue, Oct 22, 2024 at 07:00:44PM +0200, Simon Glass wrote:
> Hi Tom,
>
> On Tue, 22 Oct 2024 at 17:01, Tom Rini wrote:
> >
> > On Tue, Oct 22, 2024 at 02:16:52PM +0200, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Sat, 19 Oct 2024 at 18:30, Tom Rini wrote:
> > > >
> > > > On Sat, Oct 19, 20
Hi
On Sun, Oct 20, 2024 at 7:02 AM Marek Vasut wrote:
>
> On 10/18/24 11:47 PM, Lothar Rubusch wrote:
> > On Mon, Oct 14, 2024 at 8:42 PM Marek Vasut wrote:
> >
> > [...]
> >
> >>> diff --git a/board/enclustra/mercury_aa1/fpga.its
> >>> b/board/enclustra/mercury_aa1/fpga.its
> >>> new file mode
Hi All,
I see the error ""scanning bus 1 for devices... EHCI timed out on TD -
token=0x80008d80"
>From the denx site, I found the below patch. But it is for 2016 and 2017
>u-boot version
https://lists.denx.de/pipermail/u-boot/2020-March/401784.html
Could you please provide me the patch which ca
Convert to using livetree API functions.
Without this if livetree is enabled (OF_LIVE) the imx8m-power-domain
driver will (silently) fail to probe its children leaving you with
no power domain support causing issues with certain devices.
Signed-off-by: Tim Harvey
---
drivers/power/domain/imx8m-
Convert to using livetree API functions.
Without this if livetree is enabled (OF_LIVE) the mxc-i2c
driver will fail to support scl-gpios and sda-gpios for
i2c bus recovery.
Signed-off-by: Tim Harvey
---
drivers/i2c/mxc_i2c.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-
Convert to using livetree API functions.
Without this if livetree is enabled (OF_LIVE) the fsl_esdhc_imx
driver will fail to read vendor-specific properties from the dt.
Signed-off-by: Tim Harvey
---
drivers/mmc/fsl_esdhc_imx.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(
Convert to using livetree API functions.
Without this if livetree is enabled (OF_LIVE) the imx8mq-pinctrl
driver will (silently) fail to probe causing issues with multiple
devices.
Signed-off-by: Tim Harvey
---
drivers/pinctrl/nxp/pinctrl-imx.c | 25 -
1 file changed, 12
On Wed, Oct 23, 2024 at 05:39:07AM +0200, Simon Glass wrote:
> Hi Tom,
>
> On Tue, 22 Oct 2024 at 19:54, Tom Rini wrote:
> >
> > On Tue, Oct 22, 2024 at 07:00:35PM +0200, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Tue, 22 Oct 2024 at 16:02, Tom Rini wrote:
> > > >
> > > > On Tue, Oct 22, 20
Hi,
On 2024-10-23 10:52, Jianfeng Liu wrote:
> Orange Pi 3B uses board_fit_config_name_match in rk_board_late_init to
> decide which kernel dtb to load. To make it work with system using grub,
> we have to enable CONFIG_MULTI_DTB_FIT.
>
> Tested with opensuse using grub2, without CONFIG_MULTI_DTB
On Wed, Oct 23, 2024 at 12:55:02PM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the following watchdog related patches:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Hi,
> -Original Message-
> From: Marek Vasut
> Sent: Wednesday, October 23, 2024 8:48 PM
> To: Abbarapu, Venkatesh ; u-boot@lists.denx.de
> Cc: Andre Przywara ; Ashok Reddy Soma
> ; Jagan Teki ;
> Michael Walle ; Simek, Michal ;
> Patrice Chotard ; Patrick Delaunay
> ; Pratyush Yadav ; Qu
lmb_alloc_flags() & lmb_alloc_base_flags() are just a wrappers for
_lmb_alloc_base(). Since the only difference is the max address of the
allowed allocation which _lmb_alloc_base() already supports with the
LMB_ALLOC_ANYWHERE flag, remove one of them.
Keep the lmb_alloc_base_flags() which also pri
Hi all,
Apologies for the noise, I'll send a v2, since this is correct, but I
also need to move some LMB defines to it's header file
Thanks
/Ilias
On Wed, 23 Oct 2024 at 17:37, Ilias Apalodimas
wrote:
>
> lmb_alloc_flags() & lmb_alloc_base_flags() are just a wrappers for
> _lmb_alloc_base(). Si
We never call lmb_map_update_notify() without checking the result of
lmb_should_notify(). Instead of running that function everytime fold it
in there and add the additional flags parameter
Signed-off-by: Ilias Apalodimas
---
lib/lmb.c | 37 ++---
1 file changed, 1
The function description says this should return 0 or -1 on failures.
When regions coalesce though this returns the number of coalescedregions
which is confusing and requires special handling of the return code.
On top of that no one is using the number of coalesced regions.
So let's just return 0
On 10/23/24 4:37 PM, Abbarapu, Venkatesh wrote:
[...]
Tried the test " sf probe && sf update 0x400 0 0x16"
Zynq> sf probe && sf update 0x400 0 0x16
SF: Detected mx66l1g45g with page size 256 Bytes, erase size 64 KiB, total 128
MiB device 0 offset 0x0, size 0x16
0 bytes writ
On 10/23/24 4:14 PM, Abbarapu, Venkatesh wrote:
Hi,
-Original Message-
From: Marek Vasut
Sent: Wednesday, October 23, 2024 6:15 PM
To: Abbarapu, Venkatesh ; u-boot@lists.denx.de
Cc: Andre Przywara ; Ashok Reddy Soma
; Jagan Teki ;
Michael Walle ; Simek, Michal ;
Patrice Chotard ; Patri
On Wed, Oct 23, 2024 at 09:52:09AM +0200, Alexander Dahl wrote:
> Am Tue, Oct 22, 2024 at 04:23:07PM +0300 schrieb Andy Shevchenko:
> > On Mon, Oct 21, 2024 at 06:32:21PM +0200, Simon Glass wrote:
> > > On Mon, 21 Oct 2024 at 16:27, Andy Shevchenko
> > > wrote:
> > > >
> > > > looking at the redne
On October 21, 2024 thus sayeth Santhosh Kumar K:
> From: Neha Malcom Francis
>
> Set CONFIG_NR_DRAM_BANKS to 2 as we have two banks described in the
> memory/ node for lower and higher addressible DDR regions.
>
> This allows use of FDT functions from fdt_support.c to set up and fixup
> the mem
On October 21, 2024 thus sayeth Santhosh Kumar K:
> From: Neha Malcom Francis
>
> Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
> only when the config has been enabled.
>
> Signed-off-by: Neha Malcom Francis
> ---
> drivers/ram/Kconfig | 10 ++
> 1 file cha
On October 21, 2024 thus sayeth Santhosh Kumar K:
> As R5 is a 32 bit processor, the RAM banks' base and size calculation
> is restricted to 32 bits, which results in wrong values if bank's base
> is greater than 32 bits or bank's size is greater than or equal to 4GB.
>
> So, add k3_ddrss_ddr_bank
Hi,
> -Original Message-
> From: Abbarapu, Venkatesh
> Sent: Wednesday, October 23, 2024 7:55 PM
> To: Marek Vasut ; u-boot@lists.denx.de
> Cc: Andre Przywara ; Ashok Reddy Soma
> ; Jagan Teki ;
> Michael Walle ; Simek, Michal ;
> Patrice Chotard ; Patrick Delaunay
> ; Pratyush Yadav ; Que
lmb_alloc_flags() & lmb_alloc_base_flags() are just a wrappers for
_lmb_alloc_base(). Since the only difference is the max address of the
allowed allocation which _lmb_alloc_base() already supports with the
LMB_ALLOC_ANYWHERE flag, remove one of them.
Keep the lmb_alloc_base_flags() flags which al
Hi,
> -Original Message-
> From: Marek Vasut
> Sent: Wednesday, October 23, 2024 7:49 PM
> To: Abbarapu, Venkatesh ; u-boot@lists.denx.de
> Cc: Andre Przywara ; Ashok Reddy Soma
> ; Jagan Teki ;
> Michael Walle ; Simek, Michal ;
> Patrice Chotard ; Patrick Delaunay
> ; Pratyush Yadav ; Qu
On 10/23/24 4:14 PM, Abbarapu, Venkatesh wrote:
Hi,
-Original Message-
From: Marek Vasut
Sent: Wednesday, October 23, 2024 6:15 PM
To: Abbarapu, Venkatesh ; u-boot@lists.denx.de
Cc: Andre Przywara ; Ashok Reddy Soma
; Jagan Teki ;
Michael Walle ; Simek, Michal ;
Patrice Chotard ; Patri
On FDT platforms the APs are brought out of reset using the spin-table
as defined in the DT. On ACPI enabled platforms there's no FDT, thus
enable the ARMV8_MULTIENTRY and BLOBLIST to use the ACPI parking
protocol instead.
TEST: - APs enter Linux when run on qemu-system-aarch64 -machine raspi4b
Hi,
> -Original Message-
> From: Marek Vasut
> Sent: Wednesday, October 23, 2024 6:15 PM
> To: Abbarapu, Venkatesh ; u-boot@lists.denx.de
> Cc: Andre Przywara ; Ashok Reddy Soma
> ; Jagan Teki ;
> Michael Walle ; Simek, Michal ;
> Patrice Chotard ; Patrick Delaunay
> ; Pratyush Yadav ; Qu
On 10/23/24 3:20 PM, Christoph Niedermaier wrote:
From: Marek Vasut
Sent: Wednesday, October 23, 2024 2:41 PM
On 10/23/24 2:18 PM, Christoph Niedermaier wrote:
[...]
You do not, the following automatically reserves space on stack when
called and frees it up upon function return:
function fo
Cover the "ARM local MMIO" range as well in the default MMU mapping in
order to allow future code to access the GIC-400 without crashing. For
now the GIC is not touched in u-boot, thus this change is a noop.
See [1](BCM2711 ARM Peripherals) for reference.
TEST: Enabled CONFIG_GICV2 and accessed t
On 10/23/24 15:27, Ezra Buehler wrote:
From: Ezra Buehler
The default value of 0x80 (8 MB) is somewhat limiting for us, as our
compressed kernel may grow up to around 4 MB. By choosing the commonly
used value of 0x200 (32 MB), we are definitely on the safe side.
This rather large amount
Add generic ACPI code to generate
- MADT GICC
- MADT GICD
- MADT GICR
- MADT GIC ITS
- PPTT processor
- PPTT cache
as commonly used on arm platforms.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
---
Changelog v2:
- Add full comments to exported function
Add QEMU's SBSA ref board to azure pipelines and gitlab CI to run tests on it.
TEST: Run on Azure pipelines and confirmed that tests succeed.
Signed-off-by: Patrick Rudolph
Reviewed-by: Tom Rini
---
Changelog v6:
- Add gitlab CI support
---
.azure-pipelines.yml | 8
.gitlab-ci.yml
Initialize addr to zero which allows to build on the CI
which is more strict.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
common/bloblist.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/bloblist.c b/common/bloblist.c
index 2008ab4d25..cf1a3b8b62 1006
Allows to build the RPi4 with ACPI enabled.
TEST: - Boots on qemu-system-aarch64 -machine raspi4b
- Boots on real hardware with arm_64bit=1 in config.txt
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
Cc: Simon Glass
Cc: Matthias Brugger
Cc: Peter Robinso
Generate SoC specific ACPI tables for BCM2711:
- FADT
- PPTT
- GTDT
Board specific tables like DSDT and SSDT are added in a separate patch.
MADT is already properly generated from the FDT.
When ACPI is enabled for a different SoC compliation will fail by
design, indicating the required functions
When ACPI is enabled over FDT the APs cannot be brought out of reset
by the OS using the "FDT spin-table" mechanism, as no FDT is provided
to the OS. The APs must be released out of reset in u-boot and then
brought up in an ACPI compliant fashion.
When ARMV8_MULTIENTRY is specified, the APs are re
Implement read_mpidr() on armv7 to make use of it in generic
code that compiles on both armv7 and armv8.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
arch/arm/include/asm/system.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/system.h b/arch/ar
Update the generic entry point code to support the ACPI parking protocol.
The ACPI parking protocol can be used when PSCI is not available to bring
up secondary CPU cores.
When enabled secondary CPUs will enter U-Boot proper and spin in their own
4KiB reserved memory page, which also acts as mailb
On Arm platforms that use ACPI they cannot rely on the "spin-table"
CPU bringup usually defined in the FDT. Thus implement the
'ACPI Multi-processor Startup for ARM Platforms', also referred to as
'ACPI parking protocol'.
The ACPI parking protocol works similar to the spin-table mechanism, but
the
From: Simon Glass
Add the necessary DSDT files copied from tianocore to boot the RPi4.
In addition generate a board specific SSDT to dynamically enable/disable
ACPI devices based on FDT. This is required to support the various variants
and boot options. It also allows to test the code on QEMU 9.0
From: Simon Glass
These header files presumably duplicate things already in the U-Boot
devicetree. For now, bring them in to get the ASL code and ACPI table
code to compile.
Signed-off-by: Simon Glass
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Acked-by: Matthias Brugger
Cc: Matt
Add support for Arm sbsa [1] v0.3+ that is supported by QEMU [2].
Unlike other Arm based platforms the machine only provides a minimal
FDT that contains number of CPUs, ammount of memory and machine-version.
The boot firmware has to provide ACPI tables to the OS.
Due to this design a full DTB is a
Add a generic GICV2 driver that:
- parses the DT and generates the ACPI MADT subtables
- implement of_xlate() and allows irq_get_by_index() to return the
correct interrupt mappings
Map DT interrupts to ARM GIC interrupts as follows:
- Interrupt numbers ID32-ID1019 are used for SPIs
- ID0-ID15 a
Allow to use BLOBLIST_TABLES on arm to store ACPI or other tables.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Tom Rini
---
Changelog v9:
- default to BLOBLIST_ALLOC on arm
- Move default for BLOBLIST_SIZE_RELOC up
Changelog v10:
- Revert changes done in v9 and use revision v8
-
Support reading the "interrupts" property from the devicetree in case
the "interrupts-extended" property isn't found. As the "interrupts"
property is commonly used, this allows to parse all existing FDT and
makes irq_get_by_index() more useful.
The "interrupts" property doesn't contain a phandle a
Fill the MADT table in the GIC driver and armv8 CPU driver to
drop SoC specific code. While the GIC only needs devicetree
data, the CPU driver needs additional information stored in
the cpu_plat struct.
While on it update the only board making use of the existing
drivers and writing ACPI MADT in m
Add a generic driver that binds to armv8 CPU nodes. The generic driver allows
- to enumerate CPUs present in a system, even when no other driver binds it
- generates ACPI SSDT code for each CPU
- Fill the ACPI MADT table (implemented in a follow up patch)
The newly introduced code could also be re
Translate IRQs by implementing of_xlate() as required by
irq_get_by_index() to parse interrupt properties.
Map DT interrupts to ARM GIC interrupts as follows:
- Interrupt numbers ID32-ID1019 are used for SPIs
- ID0-ID15 are used for SGIs
- ID16-ID31 are used for PPIs
TEST: Booted on qemu sbsa-re
The code accesses the gic-v3 node, but not the gic-v3-its node,
thus rename the objects to clarify which node it operates on.
The following commit will make use of the gic-v3-its node for real.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
---
arch/arm/lib/gic-v3-its.c | 10 +
Rename 'ahci_mvebu' to 'ahci_generic' and select it by default.
The AHCI driver contains no SoC specific code and only expects the
base address to be passed, thus rename it to ahci_generic and add the
DT compatible string "generic-ahci".
Update existing defconfigs to use the new Kconfig name as we
Add support for the generic XHCI driver that contains no SoC
specific code. It can be used on platforms that simply work out
of the box, like on emulated platforms.
TEST: Booted on QEMU sbsa machine using the generic xhci driver.
Signed-off-by: Patrick Rudolph
Reviewed-by: Marek Vasut
Cc: Tom R
Add a new method to write the processor device identified by _HID
ACPI0007, that is preferred over the Processor OpCode since ACPI 6.0.
Fixes booting arm using ACPI only since the Processor OpCode isn't
found valid by the Linux kernel.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc:
Allocate memory for ACPI tables in generic acpi code. When ACPI wasn't
installed in other places, install the ACPI table using BLOBLISTs.
This allows non x86 platforms to boot using ACPI only in case the
EFI loader is being used, since EFI is necessary to advertise the location
of the ACPI tables
Since ACPI 2.0 the RSDT is deprecated and the XSDT should be preferred.
Until now the RSDT and XSDT entries were keept in sync as all platforms
that installed ACPI tables placed them below 4GiB and thus the address
would fit into the 32bit RSDT.
On platforms that do not have usable DRAM below 4GiB
The SoC can implement acpi_fill_iort to update the IORT table.
Add a helper function to fill out the NAMED_COMPONENT node.
TEST=Run FWTS V24.03.00 on RPi4 and round no problems.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 213 +++
The FADT structure found in U-Boot represents FADT revision 6 and the
GICC and GICD structures defined in U-Boot are based on ACPI revision
6.3.
Bump the table revision to fix FWTS failures seen on aarch64.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Bin Meng
-
Return the ACPI table revision in acpi_get_table_revision() for
PPTT and GTDT. Match both to ACPI 6.2.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 2 ++
lib/acpi/acpi_table.c | 4
2 files changed, 6 insertions(+)
diff --git
Allow other architectures to use acpi_create_mcfg_mmconfig as well
by moving the function prototype to common code.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
arch/x86/include/asm/acpi_table.h | 2 --
include/acpi/acpi_table.h | 13 +
2 fil
Add a new method to acpi_ops to let drivers fill out ACPI MADT.
The code is unused for now until drivers implement the new ops.
TEST: Booted on QEMU sbsa using driver model generated MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
Changelog v4:
- Drop __weak a
From: Maximilian Brune
Write the FADT in common code since it's used on all architectures.
Since the FADT is mandatory all SoCs or mainboards must implement the
introduced function acpi_fill_fadt() and properly update the FADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon
Write MADT in common code and let the SoC fill out the body by
calling acpi_fill_madt() which must be implemented at SoC level.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Bin Meng
---
Changelog v3:
- Pass ACPI context to acpi_fill_madt
---
arch/sandbox/lib/Mak
Add the interrupt flag used in ACPI GTDT table as define.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index a1bdab7305..c6a3e44a
From: Maximilian Brune
When ACPI is enabled on arm it will use the getinfo function to fill
the SPCR ACPI table.
Signed-off-by: Maximilian Brune
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Tom Rini
---
boot/bootflow.c | 8 ++--
drivers/serial/serial_pl01x.c | 24
Rename ACPI tables MADR to MADT.
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
---
include/acpi/acpi_table.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index c356df72ba..a1
From: Maximilian Brune
This moves the SPCR and DBG2 table generation into common code, so that
they can be used by architectures other than x86.
Signed-off-by: Maximilian Brune
Signed-off-by: Patrick Rudolph
Reviewed-by: Simon Glass
Cc: Simon Glass
Cc: Bin Meng
---
Changelog v2:
- Do not a
Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testin
From: Ezra Buehler
The default value of 0x80 (8 MB) is somewhat limiting for us, as our
compressed kernel may grow up to around 4 MB. By choosing the commonly
used value of 0x200 (32 MB), we are definitely on the safe side.
This rather large amount should be fine, as we have 128 MB of RAM
From: Reid Tonking
The j7200 SOC has a single DDR controller and hence no need for
configuring the MSMC interleaver. Hence we do not have an explicit node
for MSMC in j7200 DT, unlike j721s2/j784s4.
Also, MSMC clk id is described under A72SS0_CORE0 Device in TISCI
documentation [0].
Considering
From: Marek Vasut
Sent: Wednesday, October 23, 2024 2:41 PM
> On 10/23/24 2:18 PM, Christoph Niedermaier wrote:
>
> [...]
>
>>> You do not, the following automatically reserves space on stack when
>>> called and frees it up upon function return:
>>>
>>> function foo() {
>>> u8 array[12];
>>>
The functions fdt_simplefb_add_node and fdt_simplefb_enable_and_mem_rsv
are only available if CONFIG_FDT_SIMPLEFB is enabled.
Signed-off-by: Martin Stolpe
---
board/raspberrypi/rpi/rpi.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/board/raspberrypi/rpi/rpi.c
If CONFIG_FDT_SIMPLEFB is not set fdt_simplefb.c will not be compiled which
results in a compilation error if CONFIG_OF_BOARD_SETUP is enabled. This patch
will fix this error by not trying to setup a framebuffer node in this case.
Martin Stolpe (1):
rpi: Only add frame buffer node if CONFIG_F
Watchdog driver for DaVinci DM644x/DM646x processors.
Signed-off-by: Marcus Folkesson
---
MAINTAINERS| 5 ++
drivers/watchdog/Kconfig | 9 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/davinci_wdt.c | 151 +
4 files chan
On 21/10/2024 13:42, Simon Glass wrote:
This returns a devicetree and updates a parameter with an error code.
Swap it, since this fits better with the way U-Boot normally works. It
also (more easily) allows leaving the existing pointer unchanged.
No yaks were harmed in this change, but there
Orange Pi 3B uses board_fit_config_name_match in rk_board_late_init to
decide which kernel dtb to load. To make it work with system using grub,
we have to enable CONFIG_MULTI_DTB_FIT.
Tested with opensuse using grub2, without CONFIG_MULTI_DTB_FIT grub will
load rk3566-orangepi-3b.dtb in u-boot, wh
From: Reid Tonking
Adds the default config for K3_OPP_LOW in J7200
Signed-off-by: Reid Tonking
Signed-off-by: Aniket Limaye
---
arch/arm/mach-k3/Kconfig | 6 ++
configs/j7200_evm_r5_defconfig | 1 +
2 files changed, 7 insertions(+)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/m
From: Reid Tonking
k3_avs driver checks opp_ids when probing and overwrites the voltage
values in vd_data for the respective board. The new k3_check_opp() can
be called from board files to check the efuse data and returns 0 if
valid.
Also add the same check in k3_avs_program_voltage() to error o
From: Reid Tonking
J7200 SOC supports OPP_LOW and OPP_NOM as two Operating Performance
Points as per (7.5 Operating Performance Points) section in the
Datasheet [0].
- A72SS/MSMC at 2 GHz/1GHz operation must use OPP_NOM.
- A72SS/MSMC at 1 GHz/500 MHz operation can use OPP_NOM or OPP_LOW
voltage
From: Reid Tonking
The default j7200 devicetree and k3_avs driver set 2GHz/1GHz frequency
for A72/MSMC clks and the OPP_NOM voltage.
J7200 SOCs may support OPP_LOW Operating Performance Point:
1GHz/500MHz clks for A72/MSMC and OPP_LOW AVS voltage read from efuse.
Hence, add a config check to se
This series adds OPP_LOW spec data in k3_avs driver and enables a config
option to select the OPP_LOW performance point.
J7200 SOC supports OPP_LOW and OPP_NOM as two Operating Performance
Points as per (7.5 Operating Performance Points) section in the
Datasheet [0].
- A72SS/MSMC at 2 GHz/1GHz ope
On 10/23/24 11:07 AM, Abbarapu, Venkatesh wrote:
Hi,
Tested with the non-stacked default single configuration on ZynqMP zcu102 board
and didn’t see any issue.
ZynqMP> sf probe 0 0 0
SF: Detected mt25qu512a with page size 256 Bytes, erase size 64 KiB, total 64
MiB
ZynqMP> sf erase 0x0 0x400
Hi Jonas，
Thanks for your review.
At 2024-10-21 15:01:18, "Jonas Karlman" wrote:
>Hi Andy,
>
>On 2024-10-19 12:47, Andy Yan wrote:
>> Add support for Cool Pi GenBook, it works as a carrier board
>> connect with CM5 SOM.
>>
>> Specification:
>> - Rockchip RK3588
>> - LPDDR5X 8/32 GB
>> - eM
On 10/23/24 2:18 PM, Christoph Niedermaier wrote:
[...]
You do not, the following automatically reserves space on stack when
called and frees it up upon function return:
function foo() {
u8 array[12];
...
stuff(array);
...
}
Sorry, I expressed myself incorrectly here. Of cour
On Wed, Oct 23, 2024 at 08:53:50AM -0300, Hiago De Franco wrote:
> From: Hiago De Franco
>
> Remove FASTBOOT_BUF_SIZE from verdin-imx8mm_defconfig and
> verdin-imx8mp_defconfig to use the default value of 0x700, aligning
> with other Toradex boards.
>
> Update FASTBOOT_BUF_ADDR to 0x4420
On Wed, 23 Oct 2024 at 15:48, Conor Dooley wrote:
>
> From: Conor Dooley
>
> The U-Boot copy of the mpfs devicetree has, in general, been neglected
> somewhat in comparison to the one in Linux. Moving to OF_UPSTREAM to
> keep both in sync should serve to eliminate that discrepancy.
>
> Additional
Hi Marcus,
On 10/23/24 13:39, Marcus Folkesson wrote:
Watchdog driver for DaVinci DM644x/DM646x processors.
Signed-off-by: Marcus Folkesson
---
MAINTAINERS| 5 ++
drivers/watchdog/Kconfig | 9 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/davinc
From: Marek Vasut
Sent: Tuesday, October 22, 2024 1:57 PM
> On 10/22/24 11:31 AM, Christoph Niedermaier wrote:
>> From: Marek Vasut
>> Sent: Tuesday, October 22, 2024 1:01 AM
>>> On 10/21/24 5:38 PM, Christoph Niedermaier wrote:
>>>
>>> [...]
>>>
> If yes, then there is no need for any static
From: Hiago De Franco
Remove FASTBOOT_BUF_SIZE from verdin-imx8mm_defconfig and
verdin-imx8mp_defconfig to use the default value of 0x700, aligning
with other Toradex boards.
Update FASTBOOT_BUF_ADDR to 0x4420, consistent with the value in
previous downstream NXP U-Boot releases. This wi
Hi Tom,
please pull the following watchdog related patches:
- watchdog: gpio_wdt: add support for stoppable devices (Rasmus)
- watchdog: Add DaVinci's watchdog support (Bastien)
- cyclic: disentangling cyclic API from schedule() (R
On 10/7/24 19:47, Rasmus Villemoes wrote:
Currently, enabling WDT_GPIO on a board which uses SPL, but does not
have SPL_WDT, SPL_DM_GPIO or SPL_OF_CONTROL enabled, breaks the build.
Make it possible to use the WDT_GPIO driver on such boards by
introducing a separate symbol controlling whether th
After the recent dts/upstream subtree merge, the sdhi compatible string
used in the device tree for RZ/G2L family SoCs is "renesas,rzg2l-sdhi"
not "renesas,rcar-gen3-sdhi". This broke the ability to access the eMMC
and SD card devices on RZ/G2L boards.
Fix this by adding the new compatible string
On 10/3/24 23:27, Rasmus Villemoes wrote:
These patches are part of a longer-term plan to properly deal with the
HW_WATCHDOG vs WATCHDOG dichotomy, and getting rid of the legacy
HW_WATCHDOG concept completely. As part of that, clean up which
headers include other headers.
While schedule(), the a
On 10/3/24 10:42, Bastien Curutchet wrote:
Add support for the DaVinci's watchdog timer
Signed-off-by: Bastien Curutchet
Applied to u-boot-watchdog/master
Thanks,
Stefan
---
drivers/watchdog/Kconfig | 7 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/davinci_wdt.c
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