Hi,
On Tue, 10 Sep 2024 11:50:09 +0200, Neil Armstrong wrote:
> This iass Add Support for the Host Controller driver for UFS HC
> present on Qualcomm Snapdragon SoCs.
>
> It adds 2 ops to allow more control on the UFS device.
>
> It has been successfully tested on SDM845, SM8250, SM8550 ant SM86
Hi,
On Fri, 20 Sep 2024 09:46:48 +0530, Venkatesh Yadav Abbarapu wrote:
> Enable UFS DWC controller driver support and add AMD UFS
> platform driver support.
>
> NOTE: These changes are rebased on top of this series
> [PATCH 00/13] ufs: enhancements to support Qualcomm UFS controllers
>
> Change
Hi,
On Tue, 10 Sep 2024 11:20:17 +0200, Neil Armstrong wrote:
> This serie regroups all the fixes and base enhancements required to
> support the Qualcomm UFS controllers in U-Boot.
>
> This syncs headers & defines from Linux, and includes 2 set of
> fixes that were sent separately:
> - ufs: core
Hi,
On Mon, 30 Sep 2024 14:44:22 +0200, Neil Armstrong wrote:
> This serie regroups all the fixes and base enhancements required to
> support the Qualcomm UFS controllers in U-Boot.
>
> This syncs headers & defines from Linux, and includes 2 set of
> fixes that were sent separately:
> - ufs: core
Hi,
On Tue, 28 May 2024 10:36:21 +0200, Neil Armstrong wrote:
> The link_startup_again logic was added in Linux to handle device
> that were set in LinkDown state, which should not be the case since U-boot
> doesn't set LinkDown state are init, and Linux sets the device active
> in ufshcd_init() f
Hi,
On Fri, 19 Jul 2024 13:00:09 +0200, Neil Armstrong wrote:
> We experience huge problems with cache handling on Qualcomm
> systems, and it appears the dcache handling in the UFS core
> is quite wrong and causes all those issues.
>
> This serie fixes the dcache operations, and fixes a big data
On Sun, 13 Oct 2024 at 23:21, Tom Rini wrote:
>
> On Sun, Oct 13, 2024 at 04:25:09PM +0530, Sughosh Ganu wrote:
>
> > Add a flag LMB_NONOTIFY that can be passed to the LMB API's for
> > reserving memory. This will then result in no notification being sent
> > from the LMB module for the changes to
On 12/10/2024 15:57, Caleb Connolly wrote:
Enable all the necessary options for capsule updates to work, as well as
a few additional EFI features.
Capsule updates themselves are only enabled for the RB3 Gen 2, since the
exact details on where to flash U-Boot (or how to handle multiple boot
metho
On 12/10/2024 15:57, Caleb Connolly wrote:
Qualcomm boards flash U-Boot a variety of partitions, implement support
for determining which slot U-Boot is running from, finding the correct
partition for that slot and configuring the appropriate DFU string.
Initially, we only support the RB3 Gen 2 w
On Sun, 13 Oct 2024 at 21:00, Tom Rini wrote:
>
> On Sun, Oct 13, 2024 at 04:25:11PM +0530, Sughosh Ganu wrote:
> > Add a Kconfig symbol to enable getting updates on any memory map
> > changes that might be done by the LMB module. This notification
> > mechanism can then be used to have a synchron
Hi Peng!
On 14.10.24 08:29, Peng Fan wrote:
Hi Heiko,
With the two applied, with latest U-Boot, uuu works
well on i.MX8MP-EVK
https://lore.kernel.org/all/20241012093410.9069-1-peng@oss.nxp.com/
https://lore.kernel.org/all/20241011105827.7729-1-peng@oss.nxp.com/
Thanks for verifying! S
Hi Heiko,
With the two applied, with latest U-Boot, uuu works
well on i.MX8MP-EVK
https://lore.kernel.org/all/20241012093410.9069-1-peng@oss.nxp.com/
https://lore.kernel.org/all/20241011105827.7729-1-peng@oss.nxp.com/
Would you share your commit hash and boot log?
Regards,
Peng.
> Subje
Hi Francesco,
On 13.10.24 14:42, Francesco Dolcini wrote:
On Thu, Oct 10, 2024 at 10:28:31AM +0200, Heiko Schocher wrote:
trying to load current flash.bin with uuu tool
leads in not booting U-Boot as missing some bytes.
Align flash.bin in this case to 0x800 bytes, to
make uuu and ROM api happy
Hello Marek,
On 12.10.24 23:24, Marek Vasut wrote:
On 10/10/24 10:28 AM, Heiko Schocher wrote:
trying to load current flash.bin with uuu tool
leads in not booting U-Boot as missing some bytes.
Align flash.bin in this case to 0x800 bytes, to
make uuu and ROM api happy.
Signed-off-by: Heiko Sch
TI's J7200 SoC has a single instance of PCIe Controller namely PCIe1 which
is a Cadence PCIe Controller. To support PCIe functionality with the PCIe1
instance of PCIe, enable the corresponding configs.
Signed-off-by: Siddharth Vadapalli
---
v2:
https://patchwork.ozlabs.org/project/uboot/patch/20
Add support for the Cadence PCIe Controller present on TI's K3 SoCs.
This driver is an adaptation of the Linux driver.
Signed-off-by: Siddharth Vadapalli
---
v2:
https://patchwork.ozlabs.org/project/uboot/patch/20241011130258.3452687-2-s-vadapa...@ti.com/
Changes since v2:
- Addressed Tom's feed
n the
J7200 SoC. A minor set of changes will be sufficient to support other K3
SoCs as well with plans to implement it in the near future.
Series is based on commit
580fb57736 Merge tag 'u-boot-imx-master-20241013' of
https://gitlab.denx.de/u-boot/custodians/u-boot-imx
of the master branch
Hi Andrew
On 11/10/24 01:59, Andrew Davis wrote:
On 10/10/24 1:50 PM, Simon Glass wrote:
Hi Neha,
On Thu, 10 Oct 2024 at 01:09, Neha Malcom Francis wrote:
The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
modify the message to show exactly what is meant:
"DRAM: 2 Gi
Hi Simon
+ Vignesh
On 11/10/24 00:20, Simon Glass wrote:
Hi Neha,
On Thu, 10 Oct 2024 at 01:09, Neha Malcom Francis wrote:
The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
modify the message to show exactly what is meant:
"DRAM: 2 GiB (available for U-Boot out of t
Hi Tom
On 10/10/24 23:28, Tom Rini wrote:
On Thu, Oct 10, 2024 at 12:39:09PM +0530, Neha Malcom Francis wrote:
The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
modify the message to show exactly what is meant:
"DRAM: 2 GiB (available for U-Boot out of total 32 GiB)"
Hi Udit
On 10/10/24 21:25, Kumar, Udit wrote:
On 10/10/2024 12:39 PM, Neha Malcom Francis wrote:
The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
modify the message to show exactly what is meant:
"DRAM: 2 GiB (available for U-Boot out of total 32 GiB)"
Still confus
On Sun, Oct 13, 2024 at 01:33:23PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Fri, 11 Oct 2024 at 16:32, Tom Rini wrote:
> >
> > On Fri, Sep 27, 2024 at 12:02:23AM +0200, Simon Glass wrote:
> >
> > > Add a simple test of booting with the EFI bootmeth, which runs the app
> > > and checks that it c
(Also posted in pine64 forum
https://forum.pine64.org/showthread.php?tid=19460)
In an attempt to troubleshoot failing to get generic alpine linux to
run on PA64-2G-LTS, I've tried to reduce the problem to the smallest
steps that are legible to me.
When booting the kernel, I get "Bad ARM64 Image
From: Lothar Rubusch
Remove arguments in the function call. The call's argument list differs
from its definition, which breaks compilation. The removed arguments are
obtained from device-tree declaration.
Signed-off-by: Lothar Rubusch
Signed-off-by: Lothar Rubusch
---
arch/arm/mach-socfpga/mi
Update node-names according to DTspec. Add labels for compatibility
and/or add missing nodes in order to make the file compatible with the
corresponding counterpart in dts/upstream. Eventually the u-boot local
file then can be replaced by the dts/upstream, and eventually removed.
Signed-off-by: Lo
The atsha204a crypto chip is not only on the Turris Omnia board. Extend
the description of the atsha204a kconfig to cover also other boards. As
an example the Enclustra Mercury+ AA1 SoM.
Signed-off-by: Lothar Rubusch
---
drivers/misc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Several Enclustra devices store MAC address in a secure eeprom device. In
most cases this is the atsha204a (alternatively DS28). The atsha204a device
is preconfigured accordingly. Reading then is based on u-boot's atsha204a
driver. Add such support for Enclustra's AA1 SoMs.
Signed-off-by: Lothar R
Add bootscripts to boot Enclustra SoMs from MicroSD card or QSPI flash.
MicroSD card as bood device here covers the cases of sdmmc or emmc as
such boot media.
Signed-off-by: Lothar Rubusch
---
board/enclustra/bootscripts/qspi-aa1.cmd | 12
board/enclustra/bootscripts/sd-aa1.cmd |
Provide an initial environment for boot scripts to operate.
Signed-off-by: Andreas Buerkler
Signed-off-by: Lothar Rubusch
---
include/configs/socfpga_mercury_aa1.h | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/include/configs/socfpga_mercury_aa1.h
b/include/c
Introduce u-boot specific device-tree files for Enclustra Mercury+ AA1
SoMs (Intel/arria10).
Generic device-tree fragments for linux and U-boot shall be provided in
dts/upstream. The selection of the generic device-tree fragments depends
on a selected boot-mode and a selected carrier board.
On In
Some of Enclustra's Intel SoMs need gpio muxing for setting up
the boot media. This can be done by switching dip switches and also in
software. The image in this case can be loaded from SD card, and flashed
to the eMMC or QSPI. After, the dip switches can set the boot select
accordingly. With alter
Introduce support for the Enclustra SoMs: Mercury+ AA1 (Intel/Arria10)
Cover general board files for SD/MMC and QSPI boot modes. Integrate the
boards to kconfig. All build variants will depend on Quartus handoff
files, thus they depend on the particular Quartus design. The approach is
covered in t
Start documentation section for Enclustra. Cover Enclustra Intel SoMs and
related carrier board setups. The section covers the Mercury+ AA1 SoM
(Intel/arria10).
Signed-off-by: Lothar Rubusch
---
doc/board/enclustra/index.rst | 9 ++
doc/board/enclustra/mercury-aa1.rst | 204 +
Introduce the support for three variants of Enclustra's Intel Mercury AA1 (with
Intel Arria10) SoMs and additional configs. This is supposed to be the first
step to upstream several of Enclustras SoC FPGA Modules. There are still things
to be modified. So, this is supposed to start the discussion a
On Fri, Oct 11, 2024 at 12:23:17PM +0200, Patrick Rudolph wrote:
> Allows to build the RPi4 with ACPI enabled.
>
> TEST: - Boots on qemu-system-aarch64 -machine raspi4b
> - Boots on real hardware with arm_64bit=1 in config.txt
>
> Signed-off-by: Patrick Rudolph
> Reviewed-by: Simon Glass
On Sun, Oct 13, 2024 at 01:33:32PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Fri, 11 Oct 2024 at 16:28, Tom Rini wrote:
> >
> > On Fri, Oct 11, 2024 at 04:16:28PM -0600, Simon Glass wrote:
> >
> > > Hi Heinrich, Tom,
> > >
> > > On Tue, 1 Oct 2024 at 16:18, Heinrich Schuchardt
> > > wrote:
> >
G_SPL_BUILD" (2024-10-11
> 12:23:25 -0600)
>
> are available in the Git repository at:
>
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
> tags/u-boot-imx-master-20241013
>
> for you to fetch changes up to 19c0e50a6951b22cfe175986cc54bbbd2e85f30b:
>
> From: Tom Rini
> Sent: Saturday, October 12, 2024 1:34 AM
> To: ChiaWei Wang
>
> On Fri, Sep 27, 2024 at 11:07:22AM +0800, Chia-Wei Wang wrote:
>
> > Aspeed AST2700 SoCs integrates the Caliptra secure IP, where an
> > ECDSA384 signature verification HW interface is exported for SoC crypto
> n
> Subject: [PATCH] imx9: Improve boot device auto-selection
>
> From: Benjamin Szőke
>
> Improve "mmcautodetect=yes" boot device auto-selection to able to
> use it if CONFIG_ENV_IS_NOWHERE is enabled for i.MX9 SoC and
> i.MX93 EVK board.
Would you please give more background on this, I not got
Hi Tom,
please pull the first sunxi changes for this cycle:
This switches all boards with the Allwinner H616/H618/H313/H700 SoCs over to
use OF_UPSTREAM. We are doing it for this SoC family only since the DTs
between the U-Boot and the kernel repo are exactly identical, whereas other
families hav
The following changes since commit 47e544f576699ca4630e20448db6a05178960697:
Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD" (2024-10-11
12:23:25 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-sh.git master
for you to fetch cha
On Sun, Oct 13, 2024 at 06:55:58PM +0300, Svyatoslav Ryhel wrote:
> Dear Tom,
>
> The following changes since commit 93b9cd792089e536f2bfa85d9903fd4798209f76:
>
> mtd: simplify CONFIG_DM_SPI_FLASH dependencies (2024-10-09 14:52:44 -0600)
>
> are available in the Git repository at:
>
> http
On 10/11/24 4:38 PM, Neil Armstrong wrote:
On Qualcomm systems, the setup buffer and even buffers are in
a bad state at interrupt handling, so invalidate the dcache lines
for the setup_buf and event buffer to make sure we read correct
data written by the hardware.
This fixes the following error:
On 10/13/24 6:35 PM, Neil Armstrong wrote:
Hi,
Le 12/10/2024 à 05:37, Marek Vasut a écrit :
On 10/11/24 4:38 PM, Neil Armstrong wrote:
The current flush operation will omit doing a flush/invalidate on
the first and last bytes if the base address and size are not aligned
with CACHELINE_SIZE.
T
On 10/13/24 11:32 AM, Alex Shumsky wrote:
Modern Linux requires 32 byte seed to initialize random pool, but u-boot
currently provides only 8 bytes. Increase rng-seed size to make Linux happy and
initialize rng pool instantly.
Boot with 8 byte rng-seed:
# dmesg | grep crng
[ 12.089286
On Sun, Oct 6, 2024 at 8:12 PM Marek Vasut wrote:
>
> Update the MAINTAINERS file glob to cover all of i.MX6 DHSOM related files.
>
> Signed-off-by: Marek Vasut
Applied both, thanks.
On Wed, Oct 9, 2024 at 9:43 PM Gilles Talis wrote:
>
> Device tree for this board can be deleted. Device tree location
> now points to the freescale/ directory.
>
> Use absolute path to PMIC node entry and its regulators as
> device tree in kernel does not provide corresponding labels
>
> Signed-o
On Wed, Oct 9, 2024 at 4:25 AM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> The SCU API alreay has been converted to return Linux error code,
> using SCU error code is not correct here, although SC_ERR_NONE is value
> as 0.
>
> Signed-off-by: Peng Fan
Applied, thanks.
On Sat, Oct 5, 2024 at 8:26 PM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words
> data responsed. However this special index does not apply others.
> So restrict the check to i.MX8ULP to avoid problem when reading from
> fuse word
On Tue, Oct 8, 2024 at 11:17 PM Simon Glass wrote:
>
> On Tue, 1 Oct 2024 at 07:58, Brian Ruley wrote:
> >
> > Using the PKI tree with SRKs as intermediate CA isn't necessary or even
> > desirable in some situations (boot time, for example). Add the possibility
> > to use the "fast authentication
On Sat, Oct 5, 2024 at 8:13 PM Peng Fan (OSS) wrote:
>
> From: Ye Li
>
> The MU parameter register can provide the TR and RR number.
> For i.MX95 which has 8 RR is different with i.MX93 and i.MX8ULP,
> so update the driver to read the PAR for exact TR and RR number.
>
> Also update compatible str
s://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
tags/u-boot-imx-master-20241013
for you to fetch changes up to 19c0e50a6951b22cfe175986cc54bbbd2e85f30b:
clk: imx8mp: Add i.MX8MP Dummy clk (2024-10-13 09:46:05 -0300)
u-boot-imx-master-20241013
CI: https://source.denx.
Hi Patrick,
On Fri, 11 Oct 2024 at 04:34, Patrick Rudolph
wrote:
>
> Allocate memory for ACPI tables in generic acpi code. When ACPI wasn't
> installed in other places, install the ACPI table using either BLOBLISTs
> or EFI allocate pages.
>
> This allows non x86 platforms to boot using ACPI only
On Fri, 11 Oct 2024 at 04:35, Patrick Rudolph
wrote:
>
> Add support for Arm sbsa [1] v0.3+ that is supported by QEMU [2].
>
> Unlike other Arm based platforms the machine only provides a minimal
> FDT that contains number of CPUs, ammount of memory and machine-version.
> The boot firmware has to
On Fri, 11 Oct 2024 at 11:09, Peter Robinson wrote:
>
> For a lot of usecases, such as display, camera, media
> the Raspberry Pi needs a lot more CMA than distros
> configure as default so we should pass this parameter
> through so things work as expected. Fix a spelling
> mistake while we're at i
Hi Tom,
On Fri, 11 Oct 2024 at 16:28, Tom Rini wrote:
>
> On Fri, Oct 11, 2024 at 04:16:28PM -0600, Simon Glass wrote:
>
> > Hi Heinrich, Tom,
> >
> > On Tue, 1 Oct 2024 at 16:18, Heinrich Schuchardt wrote:
> [snip]
> > > The relevant error message is:
> > >
> > > E Exception: Bad pattern
Hi Tom,
On Fri, 11 Oct 2024 at 16:32, Tom Rini wrote:
>
> On Fri, Sep 27, 2024 at 12:02:23AM +0200, Simon Glass wrote:
>
> > Add a simple test of booting with the EFI bootmeth, which runs the app
> > and checks that it can call 'exit boot-services' (to check that all the
> > device-removal code d
The TS433 doesn't provide display output, but the gpu nevertheless can be
used for compute tasks for example.
So there is no reason not to enable it.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-14-he...@sntech.de
[ upstream c
The device contains two i2c-connected eeproms holding some product-
specific values. One sitting on the mainboard and one on the statically
connected backplane.
While the eeprom chips themself have a size of 512 byte, the eeprom data
only uses 256 byte each, probably to stay compatible with other
Contrary to the vendor-kernel the pmu-io-domains are not enabled by
default. This resulted in the value not being set according to the
regulator, which in turn made the gmac0 interface that is connected
to the vccio4 supply inoperable.
Fixes: 64b7f16fb394 ("arm64: dts: rockchip: add 2 pmu_io_domai
The Qnap TS433 is a 4-bay NAS based around the RK3568.
Two SATA bays are connected to the RK3568's own SATA controllers while
the other two are connected to a JMicron SATA controller living on the
PCIe bus.
It provides one 2.5Gb and one 1Gb ethernet port as well as 3 usb ports.
Signed-off-by: He
Add the two supplies for the pmu-io-domains that are defined in the
vendor devicetree for the TS433.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-15-he...@sntech.de
[ upstream commit: 64b7f16fb3947e5d08d9e9b860ce966250e45d52 ]
The TS433 seems to use a silergy,syr827 regulator for the cpu supply.
At least that is the compatible used in the vendor devicetree, though
it could very well also be another fan53555 clone.
Define the needed regulator node and hook up the cpu-supply to the
cpu cores.
Tested-by: Uwe Kleine-König
The TS433 has 3 buttons, power and copy in the front as well as a reset
pinhole button on the back. The power-button is connected to the embedded
controller while the other two buttons are just gpio connected.
Add the gpio-keys definition for the two buttons we can handle right now.
Tested-by: Uw
Fill in the missing pieces for RK809 pmic used on the TS433.
The regulator setup comes from the vendor-devicetree, so without proper
schematics its accuracy is somewhat unclear, but it looks really similar
to all the other rk3568 boards, so follows the reference design it seems.
The one caveat is
From: Uwe Kleine-König
While it requires to have the right phy driver loaded (i.e. motorcomm)
to make the phy asserting the right delays, this is generally the
preferred way to define the MAC <-> PHY connection.
Signed-off-by: Uwe Kleine-König
Reviewed-by: Andrew Lunn
Link: https://lore.kernel
Currently QNAP builds a series of RK3568- (and RK3588-) based NAS systems.
This series provides support for the 4-bay variant called TS433.
The whole series of devices is pretty similar so adding support for the
other variants will be pretty easy, once device-specific devicetrees land.
The cherry
Enable the tsadc node to allow for temperature measurements of the soc.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-10-he...@sntech.de
[ upstream commit: 2df9d20306fd0d04b88fcbbf36d76fb67f11 ]
(cherry picked from commit d
Add the 4 gpio-controlled LEDs to the Qnap-TS433.
They are meant for individual disk activitivy, but I haven't found a
way for how to connect them to their individual sata slot yet.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-
As most Rockchip boards do, the TS433 also uses uart2 for its serial
output. Set the correct chosen entry for it.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-6-he...@sntech.de
[ upstream commit: e1cb5d8a92e41171bf4d5ddc459bd96
The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-7-he...@
Uart0 is connected to an MCU on the board that handles system control
like the fan-speed. So far no driver for it is available though.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-4-he...@sntech.de
[ upstream commit: 07ef8be476
Add the aliases for the internal network interface as well as the emmc
on the board and make sure the dedicated RTC is always the first one.
The TS433 actually has two rtc devices. One coming from the rk809 pmic
without added functionality and also a dedicated RTC from Mycrocrystal
that is battery
Add the vcc3v3-supply regulator and its link to the pcie controllers.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-2-he...@sntech.de
[ upstream commit: e0ec6d48226fb3d4df18895b56f0b7a94c0fe474 ]
(cherry picked from commit 5993
The TS433 uses both pcie controllers for sata and the 2nd network
interface. Set the needed data-lanes in the pcie3 phy and enable
the second pcie controller, as well as remove the bifurcation comment.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/2024
Enable usb controllers and phys and add regulator infrastructure for the
usb ports on the TS433.
Of course there are no schematics available for the device, so the
regulator information comes from the vendor-devicetree with unknown
accuracy.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stueb
On Sun, Oct 13, 2024 at 04:25:09PM +0530, Sughosh Ganu wrote:
> Add a flag LMB_NONOTIFY that can be passed to the LMB API's for
> reserving memory. This will then result in no notification being sent
> from the LMB module for the changes to the LMB's memory map.
>
> Signed-off-by: Sughosh Ganu
From: Benjamin Szőke
Improve "mmcautodetect=yes" boot device auto-selection to able
to use it if CONFIG_ENV_IS_NOWHERE is enabled for i.MX9 SoC
and i.MX93 EVK board.
Signed-off-by: Benjamin Szőke
---
arch/arm/mach-imx/imx9/soc.c | 6 +-
board/freescale/imx93_evk/imx93_evk.c | 2 +-
Le 11/10/2024 à 17:51, Mattijs Korpershoek a écrit :
Hello, 2 small fixes for Khadas VIM3 and VIM3L to boot Android.
Recently, some effort has been made to use the
upstream android-mainline kernel on these boards [1].
To use android-mainline kernel, we should:
* Increase the boot/recovery parti
Hi,
Le 12/10/2024 à 05:37, Marek Vasut a écrit :
On 10/11/24 4:38 PM, Neil Armstrong wrote:
The current flush operation will omit doing a flush/invalidate on
the first and last bytes if the base address and size are not aligned
with CACHELINE_SIZE.
This causes operation failures Qualcomm platf
On Sat, Oct 12, 2024 at 05:22:30PM -0600, Simon Glass wrote:
> Running "tools/qconfig.py -s" will re-sync files with #include in them
> and so un-#include them.
>
> Ignore these and mark them as failures.
>
> Signed-off-by: Simon Glass
> Fixes: https://source.denx.de/u-boot/custodians/u-boot-dm
:n Sat, Oct 12, 2024 at 05:22:29PM -0600, Simon Glass wrote:
> Sometimes it is useful to process just one or two defconfigs and it is
> convenient to do this just by listing them in the arguments. Add a -D
> option for this.
>
> Update the docs to avoid mentioning boards which have been removed.
Dear Tom,
The following changes since commit 93b9cd792089e536f2bfa85d9903fd4798209f76:
mtd: simplify CONFIG_DM_SPI_FLASH dependencies (2024-10-09 14:52:44 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-tegra.git staging
for you to fetch chang
On Sun, Oct 13, 2024 at 04:25:11PM +0530, Sughosh Ganu wrote:
> Add a Kconfig symbol to enable getting updates on any memory map
> changes that might be done by the LMB module. This notification
> mechanism can then be used to have a synchronous view of allocated and
> free memory.
>
> Signed-off-
From: Ion Agorria
In the older USB controllers like for example in ChipIdea controller
used by the Tegra 2 the "USBADRA: Device Address Advance" bitflag
does not exist, so the new device address set during SET_ADDRESS
can't be deferred by hardware, which causes the host to not recognize
the devic
In the older USB controllers like for example in ChipIdea controller
used by the Tegra 2 the "USBADRA: Device Address Advance" bitflag
does not exist, so the new device address set during SET_ADDRESS
can't be deferred by hardware, which causes the host to not recognize
the device and give an error.
Without this patch, there will be error indicating that
"Cannot use 64 bit addresses with SDMA", and the booting
process will stuck.
please see full boot log below
U-Boot 2022.04-g18185931 (Sep 11 2024 - 13:15:30 +0800)
SoC: LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
CPU0(A72):150
On Thu, Oct 10, 2024 at 10:28:31AM +0200, Heiko Schocher wrote:
> trying to load current flash.bin with uuu tool
> leads in not booting U-Boot as missing some bytes.
>
> Align flash.bin in this case to 0x800 bytes, to
> make uuu and ROM api happy.
Are you sure that the issue is on this? Can you c
The variable overlap_only_ram is used to specify that the new memory
region that is being created needs to come from the free memory pool
-- this is done by carving out the memory region from the free
memory. The name is a bit confusing though, as other allocated memory
regions, like boot-services
The EFI memory allocations are now being done through the LMB
module. With this change, there is no need to get the EFI memory map
and set aside EFI allocated memory.
Signed-off-by: Sughosh Ganu
Reviewed-by: Ilias Apalodimas
---
Changes since V2: None
lib/lmb.c | 35 ---
The EFI_CONVENTIONAL_MEMORY type, which is the usable RAM memory is
now being managed by the LMB module. Remove the addition of this
memory type to the EFI memory map. This memory now gets added to the
EFI memory map as part of the LMB memory map update event handler.
Signed-off-by: Sughosh Ganu
The EFI_CONVENTIONAL_MEMORY type is now being managed through the LMB
module. Add a separate function, lmb_arch_add_memory() to add the RAM
memory to the LMB memory map. The efi_add_known_memory() function is
now used for adding any other memory type to the EFI memory map.
Signed-off-by: Sughosh G
The EFI memory allocations are now being done through the LMB module,
and hence the memory map is maintained by the LMB module. Use the
lmb_arch_add_memory() API function to add the usable RAM memory to the
LMB's memory map.
Signed-off-by: Sughosh Ganu
---
Changes since V2: None
arch/arm/cpu/ar
Some architectures have special or unique aspects which need
consideration when adding memory ranges to the list of available
memory map. Enable this config in such scenarios which allow
architectures and boards to define their own memory map.
Signed-off-by: Sughosh Ganu
---
Changes since V2: Non
The efi_add_known_memory() function for the stm32mp platforms is adding
the EFI_CONVENTIONAL_MEMORY type. This memory is now being handled
through the LMB module -- the lmb_add_memory() adds this memory to the
memory map. Remove the definition of the now superfluous
efi_add_known_memory() function.
The efi_add_known_memory() function for the TI K3 platforms is adding
the EFI_CONVENTIONAL_MEMORY type. This memory is now being handled
through the LMB module -- the lmb_add_memory() adds this memory to the
memory map. Remove the definition of the now superfluous
efi_add_known_memory() function.
The memory region occupied by U-Boot is reserved by LMB, and gets
added to the EFI memory map through a call from the LMB module. Remove
this superfluous addition to the EFI memory map.
Signed-off-by: Sughosh Ganu
---
Changes since V2: New patch
lib/efi_loader/efi_memory.c | 10 --
1 fi
In U-Boot, LMB and EFI are two primary modules who provide memory
allocation and reservation API's. Both these modules operate with the
same regions of memory for allocations. Use the LMB memory map update
event to notify other interested listeners about a change in it's
memory map. This can then b
Add a function to check if a given address falls within the RAM
address used by U-Boot. This will be used to notify other modules if
the address gets allocated, so as to not get re-allocated by some
other module.
Signed-off-by: Sughosh Ganu
---
Changes since V2: None
common/board_r.c | 5 +
Add a Kconfig symbol to enable getting updates on any memory map
changes that might be done by the LMB module. This notification
mechanism can then be used to have a synchronous view of allocated and
free memory.
Signed-off-by: Sughosh Ganu
---
Changes since V2: None
lib/Kconfig | 17 ++
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