From: Ye Li
Since System Manager will protect sentinel area, FSB can't be accessed.
So when System Manager is used, directly read fuse from ELE.
Signed-off-by: Ye Li
Signed-off-by: Alice Guo
Reviewed-by: Peng Fan
---
drivers/misc/imx_ele/fuse.c | 4 ++--
1 file changed, 2 insertions(+), 2 de
From: Peng Fan
Add release AUX core ELE API which is used to replace RTC enable
on iMX95 to release TROUT.
Signed-off-by: Peng Fan
Signed-off-by: Alice Guo
Reviewed-by: Ye Li
---
arch/arm/include/asm/mach-imx/ele_api.h | 7 +++
drivers/misc/imx_ele/ele_api.c | 26 ++
From: Peng Fan
The SCU API alrdeay has been converted to return Linux error code,
using SCU error code is not correct here, although SC_ERR_NONE is value
as 0.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8/ahab.c | 8
arch/arm/mach-imx/imx8/cpu.c | 34 +-
From: Han Xu
Add SPI NOR flash id for mt35xu01gbba which supports 4 bytes address with
octal mode read.
Signed-off-by: Han Xu
Signed-off-by: Alice Guo
Reviewed-by: Peng Fan
---
drivers/mtd/spi/spi-nor-ids.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/d
From: Peng Fan
Make CONFIG_IMX8_ROMAPI could be configured in defconfig.
Signed-off-by: Peng Fan
Signed-off-by: Alice Guo
Reviewed-by: Ye Li
---
arch/arm/mach-imx/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconf
From: Ye Li
When OSCCA is enabled, FSB fuse shadow (offset 0x8000)
access is disabled for SOC. So update the driver to read fuse
from ELE API. The ELE has supported to read all shadow fuses like
FSB, reuse the table of FSB for the word index used by ELE API.
Add ELE shadow fuse read and write to
From: Ye Li
There is a bug when checking fuse word with redundancy fuse in FSB
table. The redundancy fuses are combined into 4 words, so we can't
directly use word index to do the check, otherwise the high 4 words
will fail to match.
And When calling ELE API, res parameter will pass to ELE API t
From: Ye Li
Add ELE APIs to support read and write shadow fuses
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/ele_api.h | 4 ++
drivers/misc/imx_ele/ele_api.c | 66 +
2 files changed, 70 insertions(+)
d
From: Peng Fan
On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words
data responsed. However this special index does not apply others.
So restrict the check to i.MX8ULP to avoid problem when reading from
fuse word 1 for others, such as i.MX93.
Also update header order
Signed-off
From: Peng Fan
When OS is doing ELE API call, before OS get the response, OS is force
reseted, then it is possible that MU RR has data during initialization
in SPL stage. So clear the RR registers, otherwise SPL ELE API call will
work abnormal.
Cc: Alice Guo
Cc: Marek Vasut
Signed-off-by: Peng
From: Ye Li
The MU parameter register can provide the TR and RR number.
For i.MX95 which has 8 RR is different with i.MX93 and i.MX8ULP,
so update the driver to read the PAR for exact TR and RR number.
Also update compatible string for i.MX95 ELE MU.
Cc: Alice Guo
Cc: Marek Vasut
Reviewed-by:
From: Ye Li
The MU parameter register can provide the TR and RR number.
For i.MX95 which has 8 RR is different with i.MX93 and i.MX8ULP,
so update the driver to read the PAR for exact TR and RR number.
Also update compatible string for i.MX95 ELE MU.
Cc: Alice Guo
Cc: Marek Vasut
Reviewed-by:
On Sat, Oct 05, 2024 at 07:45:02PM +0200, Marek Vasut wrote:
> The SSCG is active with MDSEL[12] is not set. Previous commit
> 99c7e031196d ("clk: renesas: rcar-gen3: Replace SSCG caching
> with MDSEL/PE caching") inverted the conditional assignment
> of priv->sscg = !(cpg_mode & BIT(12)) during c
le in the Git repository at:
>
> g...@source.denx.de:u-boot/custodians/u-boot-nand-flash.git
> u-boot-nand-20241005
>
> for you to fetch changes up to abd7258222188be745b6f3f698dd983d6ffc5755:
>
> These are a number of assorted upstream Linux fixes to the
> BRCMNAN
source.denx.de/u-boot/custodians/u-boot-dfu into next (2024-10-03
> 16:09:40 -0600)
>
> are available in the Git repository at:
>
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
> tags/u-boot-imx-next-20241005
>
> for you to fetch changes up to ef815d75514da91d
On Sat, Oct 05, 2024 at 01:56:21AM +0200, Marek Vasut wrote:
> Update the MAINTAINERS file glob to cover all of STM32MP DHSOM related files.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: PGP signature
Move do_irqinfo() prototype to a header file, otherwise compiler is not
happy:
arch/x86/lib/interrupts.c:130:5: warning: no previous prototype for
‘do_irqinfo’ [-Wmissing-prototypes]
Signed-off-by: Andy Shevchenko
---
cmd/irq.c | 3 ---
include/irq_func.h | 3 +++
2 files changed, 3
Most of the copies of the print_cpuinfo() call the default method.
Remove all of those in order to have only the default one when
no `cpu` command is compiled.
This also helps avoiding compiler warning, e.g.:
arch/x86/cpu/tangier/tangier.c:23:5: warning: no previous prototype for
‘print_cpuinf
Without asm/cpu_x86.h inclusion a compiler is not happy:
arch/x86/cpu/cpu_x86.c:14:5: warning: no previous prototype for
‘cpu_x86_bind’ [-Wmissing-prototypes]
arch/x86/cpu/cpu_x86.c:29:5: warning: no previous prototype for
‘cpu_x86_get_vendor’ [-Wmissing-prototypes]
arch/x86/cpu/cpu_x86.c:
The compiler is not happy to have no prototypes for the functions that
are not defined static. Add them. This helps avoiding the compiler warnings:
arch/x86/cpu/cpu.c:197:13: warning: no previous prototype for
‘board_final_init’ [-Wmissing-prototypes]
arch/x86/cpu/cpu.c:205:13: warning: no pr
Some functions are not used anywhere except the same file
where they are defined. Mark them static. This helps avoiding
the compiler warnings:
arch/x86/cpu/cpu.c:343:6: warning: no previous prototype for
‘detect_coreboot_table_at’ [-Wmissing-prototypes]
arch/x86/cpu/mtrr.c:90:6: warning: no p
Some fixes to avoid compiler warnings with `make W=1`. The idea to
continue this for at least some of the x86 related code.
Andy Shevchenko (4):
x86: cpu: Use default print_cpuinfo() for all
x86: cpu: Mark a few functions static
x86: cpu: Add a few prototypes to the header file
x86: cpu: A
On 10/5/24 7:45 PM, Marek Vasut wrote:
The SSCG is active with MDSEL[12] is not set. Previous commit
99c7e031196d ("clk: renesas: rcar-gen3: Replace SSCG caching
with MDSEL/PE caching") inverted the conditional assignment
of priv->sscg = !(cpg_mode & BIT(12)) during conversion from
(priv->sscg ?
The SSCG is active with MDSEL[12] is not set. Previous commit
99c7e031196d ("clk: renesas: rcar-gen3: Replace SSCG caching
with MDSEL/PE caching") inverted the conditional assignment
of priv->sscg = !(cpg_mode & BIT(12)) during conversion from
(priv->sscg ? 16 : 0) to priv->cpg_mode & BIT(core->off
Hi
On Mon, Sep 30, 2024 at 2:54 PM Linus Walleij wrote:
>
> On Sat, Sep 28, 2024 at 2:51 AM Michael Nazzareno Trimarchi
> wrote:
>
> > I have already seen all of them and I follow the thread
> >
> > We will pick them up
>
> Thanks Michael, I will send out the remaining patches adding BCMBCA
> su
Hi Tom
The following changes since commit af69289d61876d8e62449ee2da2dc6683bcb8198:
Update directories for new name of TF-A directories (2024-10-04
09:00:47 -0600)
are available in the Git repository at:
g...@source.denx.de:u-boot/custodians/u-boot-nand-flash.git
u-boot-nand-20241005
for
Hi Stefan,
On 04/10/2024 09:43, Stefan Roese wrote:
Sure, please pull it in if this makes sense for you.
Applied to u-boot-imx/next, thanks.
On Fri, Oct 4, 2024 at 9:54 AM Fabio Estevam wrote:
>
> From: Fabio Estevam
>
> The LXR2 board has a DA9063 that can provide watchdog functionality.
>
> The DA9063 watchdog can cause a full POR reset, which is preferred
> over the built-in i.MX6 watchdog.
>
> Signed-off-by: Fabio Estevam
Applie
On Wed, Oct 2, 2024 at 4:53 PM Marek Vasut wrote:
>
> This shows up in 'help' output and introdues bogus gap:
> "
> mfgprot - Manufacturing Protection
>
> mii - MII utility commands
> "
> Drop the newline to fix this.
>
> Signed-off-by: Marek Vasut
Applied to u-boot-imx/next, thanks.
On Tue, Oct 1, 2024 at 1:03 PM Ying-Chun Liu (PaulLiu)
wrote:
>
> From: "Ying-Chun Liu (PaulLiu)"
>
> The eMMC device on imx8mm-cl-iot-gate seems not support hs400.
> When booting 6.1.0 kernel we got the following error.
>
> mmc2: mmc_select_hs400es failed, error -110
> mmc2: error -110 w
On Tue, Oct 1, 2024 at 1:02 PM Vitor Soares wrote:
>
> From: Vitor Soares
>
> With the introduction of downstream Linux 6.6, the iMX8MP VPU block
> control node in DTS was renamed "blk-ctl@3833" and will not match
> the ones found in `node_path_imx8mp` resulting in the node not being
> disabl
On Tue, Oct 1, 2024 at 9:04 AM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> With partition reset supported for i.MX8QM/QXP/95 and etc, when linux
> mmc runtime suspended, the mmc clks are gated off. While at same time
> system controller reset Cortex-A cores because of various reasons(
> WDOG tim
On Sat, Sep 28, 2024 at 10:33 PM wrote:
>
> From: Ye Li
>
> So we can disable to build ADP5585 in SPL to save size
>
> Signed-off-by: Ye Li
> Signed-off-by: Alice Guo
> Reviewed-by: Peng Fan
> ---
> Changes for v2:
> - added my Signed-off-by
Applied to u-boot-imx/next, thanks.
On Sat, Sep 28, 2024 at 8:54 PM Marek Vasut wrote:
>
> Add support for DH electronics i.MX8M Plus DHCOM SoM on PicoITX carrier board.
> This system is populated with serial console, EQoS ethernet, eMMC, SD, SPI
> NOR,
> LEDs and USB 3.0 host used in USB 2.0 mode on PicoITX.
>
> Matching Linux ker
On Wed, Sep 25, 2024 at 1:07 PM Marek Vasut wrote:
>
> Add support for DH electronics i.MX8MP DHCOM SoM on DRC02 carrier board.
> This system is populated with two ethernet ports, two CANs, RS485 and RS232,
> USB, capacitive buttons and an OLED display.
>
> Matching Linux kernel patch has been pos
in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
tags/u-boot-imx-next-20241005
for you to fetch changes up to ef815d75514da91dd98f9e3278d810439fd1f1ea:
lxr2: Add DA9063 watchdog support (2024-10-04 09:55:26 -0300)
u-boot-imx-next-20241005
Hi Dinesh
On Thu, Sep 19, 2024 at 5:56 AM wrote:
>
> From: Dinesh Maniyam
>
> This patch is add support for spl nand to load binary image from NAND
> to RAM.
>
> Signed-off-by: Dinesh Maniyam
> ---
> drivers/mtd/nand/raw/cadence_spl.c | 96 ++
> 1 file changed, 96 i
On Sat, Oct 05, 2024 at 05:16:33PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi
>
> On Thu, Sep 19, 2024 at 5:56 AM wrote:
> >
> > From: Dinesh Maniyam
> >
> > This patch is to enable configs for nand boot.
> >
> > Signed-off-by: Dinesh Maniyam
> > ---
> > configs/socfpga_agilex5_nand2_defco
Hi
On Thu, Sep 19, 2024 at 5:56 AM wrote:
>
> From: Dinesh Maniyam
>
> This patch is to enable configs for nand boot.
>
> Signed-off-by: Dinesh Maniyam
> ---
> configs/socfpga_agilex5_nand2_defconfig | 169
> 1 file changed, 169 insertions(+)
> create mode 100644 conf
On 10/4/24 7:04 AM, Heiko Schocher wrote:
Hi Marek!
On 03.10.24 22:47, Marek Vasut wrote:
On 10/3/24 10:37 PM, Marek Vasut wrote:
This driver depends on i2c emulator via DT phandle. Make sure the
dependency is probed before this driver is probed, not when it is
first used during transfer. This
This phandle was missing in the sandbox DT, add it, otherwise sandbox-i2c
driver cannot look up the emulator via i2c_emul_find(). This fixes the
following i2c_emul_find() error:
"
$ ./u-boot -Dc ""
...
i2c_emul_find() No emulators for device 'sandbox_pmic'
sandbox_pmic_write() write error
Thanks Neil,
On Fri, Sep 20, 2024 at 03:33:33PM +0200, Neil Armstrong wrote:
> Add support for the Libre Computer aml-a311d-cc "Alta" board:
> https://libre.computer/products/aml-a311d-cc/
>
> The Alta board has a Credit Card form factor, similar to the
> the prvevious "Le Potato" card, but with
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