On 2024/8/1 05:12, Jonas Karlman wrote:
The CM3588 NAS by FriendlyElec pairs the CM3588 compute module, based
on the Rockchip RK3588 SoC, with the CM3588 NAS Kit carrier board.
Features tested on a CM3588 NAS Kit with 8GB RAM 64GB eMMC module:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
On 2024/8/1 05:12, Jonas Karlman wrote:
From: Sebastian Kropatsch
The CM3588 NAS by FriendlyElec pairs the CM3588 compute module, based on
the Rockchip RK3588 SoC, with the CM3588 NAS Kit carrier board.
To reflect the hardware setup, add device tree sources for the SoM and
the NAS daughter bo
Hi Chris,
On Fri, 2 Aug 2024 at 04:29, Chris Morgan wrote:
>
> From: Chris Morgan
>
> The Anbernic RG35XX series of devices are based around an Allwinner
> H700 SoC with 1GB of RAM, 2 SD cards, and multiple input buttons.
>
> This bootloader has been tested on the Anbernic RG35XX-2024 and
> RG35
Hi Jonas,
On 2024/8/1 03:41, Jonas Karlman wrote:
Hi Heiko,
On 2024-07-31 12:26, Heiko Stuebner wrote:
The Rock 5 ITX is board in ITX form factor using the RK358 SoC
It can be powered either by 12V, ATX power-supply or PoE.
Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key
On 2024/7/31 18:26, Heiko Stuebner wrote:
The ROCK 5 ITX as the name suggests is made in the ITX form factor and
actually built in a form to be used in a regular case even providing
connectors for regular front-panel io.
It can be powered either by 12V, ATX power-supply or PoE.
Notable periph
On 2024/7/31 18:26, Heiko Stuebner wrote:
From: Alexey Charkov
This includes the necessary device tree data to allow thermal
monitoring on RK3588(s) using the on-chip TSADC device, along with
trip points for automatic thermal management.
Each of the CPU clusters (one for the little cores and
On 2024/7/30 22:51, Jonas Karlman wrote:
Add LED=y and LED_GPIO=y to support the onboard leds.
Add ROCKCHIP_IODOMAIN=y to configure correct io voltage domains.
Add DM_MDIO=y now that the DT contain a Ethernet phy node.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
On 2024/7/30 22:51, Jonas Karlman wrote:
With the emmc and uart0 DT nodes updated to v6.11-rc1 in dts/upstream
there is no longer any need to keep overrides in board u-boot dtsi.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3308-rock-pi-s-u-boo
On 2024/7/30 22:51, Jonas Karlman wrote:
Update WiFi SDIO and BT UART related props to better reflect details
about the optional onboard RTL8723DS WiFi/BT module.
Also correct the compatible used for bluetooth to match the WiFi/BT
module used on the board.
Fixes: bc3753aed81f ("arm64: dts: ro
On 2024/7/30 22:51, Jonas Karlman wrote:
The VCCIO4 io-domain used for WiFi/BT is using 1v8 IO signal voltage.
Add io-domains node with the VCCIO supplies connected on the board.
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240521211029.1236094-13-jo...@kwiboo.se
Signed-off
On 2024/7/30 22:51, Jonas Karlman wrote:
Be explicit about the Ethernet port and define mdio and ethernet-phy
nodes in the device tree for ROCK Pi S.
Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals")
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240
On 2024/7/30 22:51, Jonas Karlman wrote:
UAR0 CTS/RTS is not wired to any pin and is not used for the default
serial console use of UART0 on ROCK Pi S.
Override the SoC defined pinctrl props to limit configuration of the
two xfer pins wired to one of the GPIO pin headers.
Fixes: 2e04c25b1320
On 2024/7/30 22:51, Jonas Karlman wrote:
Add cap-mmc-highspeed to allow use of high speed MMC mode using an eMMC
to uSD board. Use disable-wp to signal that no physical write-protect
line is present. Also add vcc_io used for card and IO line power as
vmmc-supply.
Fixes: 2e04c25b1320 ("arm64: d
On 2024/7/30 22:51, Jonas Karlman wrote:
Add a disabled RK3308 IO voltage domains node to SoC DT.
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240521211029.1236094-12-jo...@kwiboo.se
Signed-off-by: Heiko Stuebner
[ upstream commit: d1829ba469d5743734e37d59fece73e3668ab084
On 2024/7/31 03:48, Jonas Karlman wrote:
Radxa ROCK S0 is a single-board computer based on the Rockchip RK3308B
SoC in an ultra-compact form factor. Add a board target for the board.
Features tested on a ROCK S0 v1.2 with 512 MiB RAM and 8 GiB eMMC:
- SD-card boot
- eMMC boot
- Ethernet
- USB
On 2024/7/31 03:48, Jonas Karlman wrote:
Radxa ROCK S0 is a single-board computer based on the Rockchip RK3308B
SoC in an ultra-compact form factor.
Add initial support for eMMC, SD-card, Ethernet, WiFi/BT and USB.
Signed-off-by: Jonas Karlman
Link: https://lore.kernel.org/r/20240521212247.1
On 2024/7/24 14:55, Jonas Karlman wrote:
Hosts capable of 8-bit can also do 4 bits, fix use of 4-bit mode when
8-bit mode is supported.
This fixes use of 1-bit mode with SD NAND on ROCK Pi S using the DT in
v6.11-rc1 that chage to use 8-bit bus to also support eMMC. With this
4-bit mode is use
Hi Simon,
On Thu, Aug 1, 2024 at 4:42 PM Simon Glass wrote:
>
> Can we rename the gadget uclass to usb_gadget or similar, then update
> the aliases?
>
You mean split patch no.4 into 2 parts, first rename the class to usb_gadget
before doing the alias job ?
> I think it makes sense to show the s
I have attached a bad LZMA file generated by modifying a valid LZMA's size
to 0 as described. The attached `create_bad_lzma.py` was used for this.
I have also attached a dummy proof-of-concept that mimic's U-Boots calls to
LzmaDecode().
When ran on linux, this segfaults off the page within the me
Hi Simon,
> -Original Message-
> From: Simon Glass
> Sent: Thursday, August 1, 2024 10:42 PM
> To: Z.Q. Hou
> Cc: u-boot@lists.denx.de; tr...@konsulko.com; Peng Fan
> ; feste...@gmail.com; ma...@denx.de;
> lu...@denx.de; sean...@gmail.com; xypron.g...@gmx.de
> Subject: Re: [PATCHv4 10/14
sorry,
On 8/2/24 10:54, FUKAUMI Naoki wrote:
since USB Type-A OTG port is peripheral mode, you can enable USB gadget
functions. could you merge following patch?
it's wrong.
"usb_host0_xhci" dr_mode need to be deleted...
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
since dr_mode of "usb_host0_xhci" is "otg", we can use USB gadget
functions on USB3 Type-A OTG (upper) port. enable it.
Signed-off-by: FUKAUMI Naoki
---
configs/rock-3a-rk3568_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-r
on-board USB 2.0 hub, FE1.1s, has Transaction Translator which can
handle USB 1.x devices via "usb_host0_ehci". so we can omit
"usb_host0_ohci" and make boot faster (a little).
=> usb start
starting USB...
Bus usb@fd00: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@
On Sun, Jul 28, 2024 at 3:25 PM Paul Kocialkowski wrote:
>
> From: Paul Kocialkowski
>
> The SPL text base was defined to the same value in each OMAP3 board
> defconfig. Move the common definition to the Kconfig option
> declaration instead.
Thanks for doing this.
>
> Signed-off-by: Paul Kocialk
Hi,
On 7/22/24 19:56, Maxim Moskalets wrote:
Based on rock-3a-rk3568_defconfig.
Tested on v1.31 revision.
Board Specifications:
- Rockchip RK3566
- 1/2/4GB LPDDR4 2112MT/s
- eMMC socket
- uSD card slot
- M.2 2230 Connector
- GbE LAN with POE
- 3.5mm jack with mic
- HDMI 2.0, MIPI DSI/CSI
- USB
On Tue, 09 Jul 2024 08:28:13 +0200, Michael Trimarchi wrote:
> Print clk name in clk_enable and clk_disable. Make sense to know
> what clock get disabled/enabled before a system crash or system
> hang.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Fri, 03 May 2024 09:20:09 +0200, Alexander Dahl wrote:
> The function returns the rate of the parent clock, the previous text
> made no sense at all.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Sat, 09 Mar 2024 13:27:09 +0100, Jan Kiszka wrote:
> Fix a logical inversion of the printed text.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Fri, 28 Jun 2024 19:40:45 +0200, Christian Marangi wrote:
> This series doesn't currently change anything and it does add all the
> additional OPs to make support of OF_UPSTREAM.
>
> While converting the mt7681/7686/7688/7623/7622 it was notice lots of
> discrepancy between the downstream dtsi
From: Chris Morgan
The Anbernic RG35XX series of devices are based around an Allwinner
H700 SoC with 1GB of RAM, 2 SD cards, and multiple input buttons.
This bootloader has been tested on the Anbernic RG35XX-2024 and
RG35XX-H, but should be suitable for the entire lineup of H700 based
devices.
From: Jernej Skrabec
CSI1 channel (22) is missing and IOMMU (25) has priority flag set in
vendor bootloader. Fix that.
While at it, replace bandwidth flag with priority since original flag has
always value "true".
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/
From: Chris Morgan
Update the sun50i-h616.dtsi file from upstream linux, and include the
fix for selecting the pinctrl for the r_i2c bus from mainline:
7c9ea4ab7617 ("arm64: dts: allwinner: h616: Add r_i2c pinctrl nodes")
Signed-off-by: Chris Morgan
---
arch/arm/dts/sun50i-h616.dtsi
From: Jernej Skrabec
It's safer to start scanning for columns first and then rows. Columns
reside on LSB address pins, which means that second configuration will
already have all needed row pins active.
This is also preparation for introducing DDR4 support, which need scan
for banks and bank gro
From: Jernej Skrabec
When comparing configuration procedure to vendor driver, I noticed that
one command was out of order and that some delays were missing.
Fix that.
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c | 10 +-
1 file chan
From: Jernej Skrabec
Adjust H616 LPDDR4 DRAM settings to be in line with vendor driver.
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c| 35 +--
.../dram_timings/h616_lpddr4_2133.c | 2 +-
2 files changed, 26
From: Jernej Skrabec
It seems that different dies need different PHY pin mapping. Select
alternatives based on "bond ID".
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c | 59 +++---
1 file changed, 44 insertions(+), 15 dele
From: Jernej Skrabec
Adjust H616 LPDDR3 DRAM settings to be in line with vendor driver.
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_sun50i_h616.c | 2 +-
arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c | 2 +-
2 files changed, 2 insertions(+), 2 d
From: Jernej Skrabec
Adjust H616 DDR3 DRAM settings to be in line with vendor driver.
Signed-off-by: Jernej Skrabec
Tested-by: Chris Morgan
---
arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/dram_ti
From: Chris Morgan
Add support for the Anbernic RG35XX-2024.
This device is a handheld gaming console (series) based around the
Anbernic H700 SoC. It comes with 1GB of RAM and multiple face buttons
for input.
Add support for the simplest model for now, and then iterate later to
add board detect
Hi Simon,
On 2024-08-01 15:07, Simon Glass wrote:
> Hi Jonas,
>
> On Thu, 1 Aug 2024 at 02:37, Jonas Karlman wrote:
>>
>> All Rockchip aarch64 boards, beside bob and kevin, use TPL to initialize
>> DRAM and SPL to load FIT with U-Boot proper and TF-A.
>>
>> Bob and kevin currently does not use T
Hi Quentin,
On 2024-08-01 11:26, Quentin Schulz wrote:
> Hi Jonas,
>
> On 7/31/24 4:10 PM, Jonas Karlman wrote:
> > Hi Quentin,
> >
> > On 2024-07-31 14:42, Quentin Schulz wrote:
> >> Hi Jonas,
> >>
> >> On 7/31/24 8:50 AM, Jonas Karlman wrote:
> >> > What model of Radxa ZERO 3W/3E board
Hi,
On 7/31/24 16:28, Jonas Karlman wrote:
The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form
factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community
version based on the RK3568 SoC and an industrial version based on the
RK3568J SoC.
Features tested on ROCK 3
On Thu, Aug 01, 2024 at 10:13:13AM -0300, Fabio Estevam wrote:
> Hi Lukasz,
>
> On Thu, Aug 1, 2024 at 9:54 AM Lukasz Majewski wrote:
>
> > "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
> > "mmcpart=1\0" \
> > "mmcroot=2\0" \
> > + "update_mmc_part=1\0" \
> >
On Wed, Jul 31, 2024 at 10:25:37AM -0700, Raymond Mao wrote:
> Enable MbedTLS as default setting for qemu arm64
>
> Signed-off-by: Raymond Mao
> ---
> Changes in v2
> - None.
> Changes in v3
> - None.
> Changes in v4
> - None.
> Changes in v5
> - Remove unused config MBEDTLS_LIB_TLS.
> - Remove
On Wed, Jul 31, 2024 at 10:25:13AM -0700, Raymond Mao wrote:
> Adapt digest header files to support both original libs and MbedTLS
> by switching on/off MBEDTLS_LIB_CRYPTO.
> Introduce _LEGACY kconfig for legacy hash implementations.
>
> FIXME:
> `IS_ENABLED` or `CONFIG_IS_ENABLED` is not applica
On Wed, Jul 31, 2024 at 10:25:10AM -0700, Raymond Mao wrote:
>
> Integrate MbedTLS v3.6 LTS (currently v3.6.0) with U-Boot.
>
> Motivations:
>
>
> 1. MbedTLS is well maintained with LTS versions.
> 2. LWIP is integrated with MbedTLS and easily to enable HTTPS.
> 3. MbedTLS recently s
Hi Heiko, Alexander,
On 7/31/24 23:54, Heiko Schocher wrote:
> Hello Alexander, On 01. 08. 24 08: 50, Alexander Dahl wrote: > Hei, > > Am
> Thu,
> Jul 04, 2024 at 10: 18: 55AM +0200 schrieb Alexander Dahl: >> Hello Heiko, >>
> >>
> Am Thu, Jul 04, 2024 at 06: 28: 31AM +0200 schrieb Heiko Schoc
Hi Zixun,
On Thu, 1 Aug 2024 at 12:37, Zixun LI wrote:
>
> Hi Simon,
>
> On Thu, Aug 1, 2024 at 4:42 PM Simon Glass wrote:
> >
> > Can we rename the gadget uclass to usb_gadget or similar, then update
> > the aliases?
> >
>
> You mean split patch no.4 into 2 parts, first rename the class to usb_
Hi Sughosh,
On Thu, 1 Aug 2024 at 10:19, Sughosh Ganu wrote:
>
> On Thu, 1 Aug 2024 at 21:42, Simon Glass wrote:
> >
> > Hi Sughosh,
> >
> > On Thu, 1 Aug 2024 at 08:58, Sughosh Ganu wrote:
> > >
> > > On Tue, 30 Jul 2024 at 20:10, Simon Glass wrote:
> > > >
> > > > This function has more spec
Hi Ilias,
On Thu, 1 Aug 2024 at 10:22, Ilias Apalodimas
wrote:
>
> hi Simon,
>
> On Thu, 1 Aug 2024 at 19:14, Simon Glass wrote:
> >
> > Hi Ilias,
> >
> > On Thu, 1 Aug 2024 at 04:14, Ilias Apalodimas
> > wrote:
> > >
> > > Hi Tom
> > >
> > > On Wed, 31 Jul 2024 at 20:17, Tom Rini wrote:
> > >
The EFI_LOADER_BOUNCE_BUFFER feature was added many years ago. It is not
clear whether it is still needed, but 24 boards (lx2160ardb_tfa_stmm,
lx2162aqds_tfa_SECURE_BOOT and the like) use it.
This feature uses EFI page allocation to create a 64MB buffer 'in space'
without any knowledge of where bo
Currently this calls efi_alloc() which reserves a page for each
allocation and this can overwrite memory that will be used for reading
images.
Switch the code to use malloc(), as with other parts of EFI, such as
efi_add_protocol().
Signed-off-by: Simon Glass
---
(no changes since v1)
lib/efi_
This API call is intended for allocating small amounts of memory,
similar to malloc(). The current implementation rounds up to whole pages
which can waste large amounts of memory. It also implements its own
malloc()-style header on each block.
For certain allocations (those of type EFI_BOOT_SERVIC
We have been discussing the state of EFI memory management for some
years so I thought it might be best to send a short series showing some
of the issues we have talked about.
This one just deals with memory allocation. It updates EFI to use
U-Boot memory allocation for the pool where possible. Mo
hi Simon,
On Thu, 1 Aug 2024 at 19:14, Simon Glass wrote:
>
> Hi Ilias,
>
> On Thu, 1 Aug 2024 at 04:14, Ilias Apalodimas
> wrote:
> >
> > Hi Tom
> >
> > On Wed, 31 Jul 2024 at 20:17, Tom Rini wrote:
> > >
> > > On Wed, Jul 31, 2024 at 08:39:23AM -0600, Simon Glass wrote:
> > >
> > > [snip]
> >
On Thu, 1 Aug 2024 at 21:42, Simon Glass wrote:
>
> Hi Sughosh,
>
> On Thu, 1 Aug 2024 at 08:58, Sughosh Ganu wrote:
> >
> > On Tue, 30 Jul 2024 at 20:10, Simon Glass wrote:
> > >
> > > This function has more special cases than it needs. Simplify it to
> > > reduce code size and complexity.
> >
Hi Richard,
On Thu, 1 Aug 2024 at 08:48, Richard Weinberger wrote:
>
> Simon,
>
> Am Donnerstag, 1. August 2024, 16:42:14 CEST schrieb Simon Glass:
> > > + debug("Copying bootstage from %p to %p\n", gd->bootstage, to);
> > > + memcpy(to, gd->bootstage, sizeof(struct bootstage_data));
Hi Ilias,
On Thu, 1 Aug 2024 at 04:14, Ilias Apalodimas
wrote:
>
> Hi Tom
>
> On Wed, 31 Jul 2024 at 20:17, Tom Rini wrote:
> >
> > On Wed, Jul 31, 2024 at 08:39:23AM -0600, Simon Glass wrote:
> >
> > [snip]
> > > > > > so that
> > > > > > step three can be seeing what tweaks may be needed in wh
Hi Sughosh,
On Thu, 1 Aug 2024 at 08:58, Sughosh Ganu wrote:
>
> On Tue, 30 Jul 2024 at 20:10, Simon Glass wrote:
> >
> > This function has more special cases than it needs. Simplify it to
> > reduce code size and complexity.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > lib/lmb.c | 57 ++
On Thu, 1 Aug 2024 at 20:28, Sughosh Ganu wrote:
>
> On Tue, 30 Jul 2024 at 20:10, Simon Glass wrote:
> >
> > This function has more special cases than it needs. Simplify it to
> > reduce code size and complexity.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > lib/lmb.c | 57 +++
On Thu, Aug 01, 2024 at 05:15:34PM +0200, Jerome Forissier wrote:
>
>
> On 8/1/24 16:43, Tom Rini wrote:
> > On Thu, Aug 01, 2024 at 04:40:03PM +0200, Jerome Forissier wrote:
> >>
> >>
> >> On 7/26/24 00:34, Tom Rini wrote:
> >>> On Thu, Jul 25, 2024 at 11:22:20AM -0600, Tom Rini wrote:
> On
On 8/1/24 16:43, Tom Rini wrote:
> On Thu, Aug 01, 2024 at 04:40:03PM +0200, Jerome Forissier wrote:
>>
>>
>> On 7/26/24 00:34, Tom Rini wrote:
>>> On Thu, Jul 25, 2024 at 11:22:20AM -0600, Tom Rini wrote:
On Thu, Jul 25, 2024 at 02:57:21PM +0200, Jerome Forissier wrote:
> This is
On Tue, 30 Jul 2024 at 20:10, Simon Glass wrote:
>
> This function has more special cases than it needs. Simplify it to
> reduce code size and complexity.
>
> Signed-off-by: Simon Glass
> ---
>
> lib/lmb.c | 57 +++
> 1 file changed, 19 inserti
Simon,
Am Donnerstag, 1. August 2024, 16:42:14 CEST schrieb Simon Glass:
> > + debug("Copying bootstage from %p to %p\n", gd->bootstage, to);
> > + memcpy(to, gd->bootstage, sizeof(struct bootstage_data));
> > + data = gd->bootstage = to;
>
> should be a separate line (patman/ch
This change adds support for PCIe connected nvme disk - phyBOARD-Polis
base board.
One needs to call following commands in u-boot:
> pci enum
> nvme scan
> nvme info
And then ones to access proper file system (like fat[ls|load|write],
ext4[ls|load|write]).
Signed-off-by: Lukasz Majewski
---
Cha
On Thu, Aug 01, 2024 at 04:40:03PM +0200, Jerome Forissier wrote:
>
>
> On 7/26/24 00:34, Tom Rini wrote:
> > On Thu, Jul 25, 2024 at 11:22:20AM -0600, Tom Rini wrote:
> >> On Thu, Jul 25, 2024 at 02:57:21PM +0200, Jerome Forissier wrote:
> >>
> >>> This is a rework of a patch series by Maxim Uva
Hi Zhiqiang,
On Wed, 31 Jul 2024 at 20:37, Z.Q. Hou wrote:
>
> Hi Simon,
>
> > -Original Message-
> > From: Simon Glass
> > Sent: Wednesday, July 31, 2024 10:39 PM
> > To: Z.Q. Hou
> > Cc: u-boot@lists.denx.de; tr...@konsulko.com; Peng Fan
> > ; feste...@gmail.com; ma...@denx.de;
> > lu
On Wed, 31 Jul 2024 at 08:55, Sughosh Ganu wrote:
>
> Use the API function list_count_nodes() to count the number of list
> entries.
>
> Signed-off-by: Sughosh Ganu
> ---
>
> Note: To be applied on top of efi-2024-10-rc2
>
> boot/scene.c | 8 +---
> drivers/mtd/ubi/fastmap.c
Hi Zixun,
On Wed, 31 Jul 2024 at 07:43, Zixun LI wrote:
>
> Patch 1 is a tentative fix for duplicate uclass name issue met in
> https://lists.denx.de/pipermail/u-boot/2024-July/560189.html
>
> The idea is to use orignal class name only for sequence alias to keep this
> alias function working and
Hi Zixun,
On Wed, 31 Jul 2024 at 07:43, Zixun LI wrote:
>
> Currently uclass index is used for bind/unbind which ignores alias
> sequence numbering. Use device sequence number instead as it's
> the number explicitly set in the DT.
>
> Signed-off-by: Zixun LI
> ---
> cmd/bind.c | 4 ++--
> 1 fil
Hi Zixun,
On Wed, 31 Jul 2024 at 07:43, Zixun LI wrote:
>
> Currently uclass index is shown in DM tree dump which ignores alias
> sequence numbering. The result could be confusing since these 2 numbers
> could be different. Show device sequence number instead.
I think it makes sense to show the
Hi Richard,
On Wed, 31 Jul 2024 at 10:08, Richard Weinberger wrote:
>
> bootstage_get_size() returns the total size of the data structure
> including associated records.
> When copying from gd->bootstage, only the allocation size of gd->bootstage
> must be used. Otherwise too much memory is copie
Hi Michael,
On Wed, 31 Jul 2024 at 09:33, Michael Walle wrote:
>
> Hi,
>
> > > > - if (ret)
> > > > + if (ret == -ENOENT)
> > > > + return -ENOPKG;
> >
> > We normally use -ENOENT for this sort of thing.
>
> That's the way select
Hi Fabio,
> Hi Lukasz,
>
> On Thu, Aug 1, 2024 at 9:54 AM Lukasz Majewski wrote:
>
> > +CONFIG_CYCLIC_MAX_CPU_TIME_US=1000
>
> Please explain why this option was added.
It must have been slipped in...
Default value is 5000 for this SoM.
IMHO it would be safe to remove it (and use default
On 7/26/24 00:34, Tom Rini wrote:
> On Thu, Jul 25, 2024 at 11:22:20AM -0600, Tom Rini wrote:
>> On Thu, Jul 25, 2024 at 02:57:21PM +0200, Jerome Forissier wrote:
>>
>>> This is a rework of a patch series by Maxim Uvarov: "net/lwip: add lwip
>>> library for the network stack" [1]. The goal is to
Hi Lukasz,
On Thu, Aug 1, 2024 at 9:54 AM Lukasz Majewski wrote:
> +CONFIG_CYCLIC_MAX_CPU_TIME_US=1000
Please explain why this option was added.
On Tue, 07 May 2024 11:42:37 +0200, Philip Oberfichtner wrote:
> Bevor this commit, only clause 22 access was possible. After this commit,
> clause 45 direct access will available as well.
>
> Note that there is a slight change of behavior: Before this commit, the
> C45E bit was set to whatever v
On Fri, 12 Jul 2024 13:47:54 +0400, Mikhail Kshevetskiy wrote:
> Option Acknowledgment (OACK) is an extension of TFTP protocol (see rfc2347).
> Not all tftp servers implements it. For example it does not supported by
> tftpd server from debian-11 (https://packages.debian.org/bullseye/tftpd).
>
>
On Mon, 08 Jul 2024 11:09:58 +0200, A. Sverdlin wrote:
> eth_env_set_enetaddr_by_index() declaration is duplicated in eth_internal.h
> and net.h, but all units including eth_internal.h already include net.h.
> Remove the superfluous declaration.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Wed, Jul 17, 2024 at 02:29:01PM +0200, Philip Oberfichtner wrote:
> This patch series implements the dwc_eth_qos glue driver for Intel SOCs.
> Before doing that, a few general adaptions to the dwc_eth_qos.c main
> driver are required. Most notably, the preparation for PCI based driver
> instanc
Hi everyone,
how can I configure which of the available serial devices U-Boot will
use for its serial console?
Background: I have a device based on a Raspberry Pi CM4, which has 6
UARTs (UART1 is a mini UART, the others PL011) [1]. In the default
configuration (including the mainline Linux broad
Hi Quentin,
> On 8/1/24 12:07 PM, Emil Kronborg wrote:
> > [...]
> > +.. SPDX-License-Identifier: GPL-2.0+:
>
> This isn't a valid identifier (spurious ':') I believe.
>
> Also, I would highly suggest to change it to GPL-2.0-or-later which is
> the current naming scheme for the same license, c.f
Signed-off-by: Emil Kronborg
---
Changes in v3:
- The help text for 'pwm config' in the examples section is more
explicit about 20 us and 14 us for the period and duty cycle,
respectively.
- Fixed 'pwm enable' and 'pwm disable' in the examples section to only
expect 2 arguments.
- Rebased on
On Thu, Aug 01, 2024 at 11:16 GMT, Quentin Schulz wrote:
>
>Did you test this? It doesn't match the synopsis section, the help text
>
>of the command and the source code.
>
>Reading the code, pwm enable only expects two arguments, same for pwm
>disable, so I would assume that the
Hello! I hope this is all the correct contacts for reporting this issue.
I have discovered that there is a vulnerability in the version of 7z LZMA
that U-Boot is using (9.20). I've found this to lead to code execution
when used with `lzmadec`.
I have found no issued CVEs or public disclosures an
Hi Lukasz,
On Thu, Aug 1, 2024 at 9:54 AM Lukasz Majewski wrote:
> "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
> "mmcpart=1\0" \
> "mmcroot=2\0" \
> + "update_mmc_part=1\0" \
> + "update_offset=0x42\0" \
> + "update_filename=flash.bin\0" \
> +
Hi Jonas,
On Thu, 1 Aug 2024 at 02:37, Jonas Karlman wrote:
>
> All Rockchip aarch64 boards, beside bob and kevin, use TPL to initialize
> DRAM and SPL to load FIT with U-Boot proper and TF-A.
>
> Bob and kevin currently does not use TPL and instead initialize DRAM
> in SPL and directly after tri
On Thu, 1 Aug 2024 18:46:33 +0900
"Seung-Woo Kim" wrote:
> Hi,
>
> > -Original Message-
> > From: Andre Przywara
> > Sent: Thursday, August 1, 2024 6:28 PM
> > Subject: Re: [PATCH] tools: imagetool: Remove unnecessary check from
> > toc0_verify_cert_item()
> >
> > On Thu, 1 Aug 2024 1
This change adds support for PCIe connected nvme disk - phyBOARD-Polis
base board.
One needs to call following commands in u-boot:
> pci enum
> nvme scan
> nvme info
And then ones to access proper file system (like fat[ls|load|write],
ext4[ls|load|write]).
Signed-off-by: Lukasz Majewski
---
co
This command allows easy update on SD card (hence the update_mmc_part=1)
of the flash.bin generated during u-boot build.
Signed-off-by: Lukasz Majewski
---
include/configs/phycore_imx8mm.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/configs/phycore_imx8mm.h b/include
Hi Jonas,
On Wed, 31 Jul 2024 at 17:18, Jonas Karlman wrote:
>
> Hi Simon,
>
> On 2024-07-31 23:58, Simon Glass wrote:
> > The code here is confusing due to large blocks which are #ifdefed out.
> > Add a function phase_sdram_init() which returns whether SDRAM init
> > should happen in the current
The code here is confusing due to large blocks which are #ifdefed out.
Add a function phase_sdram_init() which returns whether SDRAM init
should happen in the current phase, using that as needed to control the
code flow.
This increases code size by about 500 bytes in SPL when the cache is on,
sinc
At present gd->ram_size is 0 in SPL, meaning that it is not possible to
enable the cache. Correct this by always populating the RAM size
correctly.
This increases code size by about 500 bytes in SPL, since it must call
the rather large rockchip_sdram_size() function.
Signed-off-by: Simon Glass
R
Hello Michal,
On 01.08.24 12:32, Michal Simek wrote:
On 8/1/24 12:27, Heiko Schocher wrote:
Hello Michal,
On 01.08.24 10:01, Michal Simek wrote:
There is no reason to use goto and just call return. Better is to call
return directly which is done for some if/else parts.
Also make no sense t
Hi Emil,
On 8/1/24 12:07 PM, Emil Kronborg wrote:
Signed-off-by: Emil Kronborg
---
Changes in v3:
- The help text for 'pwm config' in the examples section is more
explicit about 20 us and 14 us for the period and duty cycle,
respectively.
- Fixed 'pwm enable' and 'pwm disable' in the exam
On 8/1/24 12:27, Heiko Schocher wrote:
Hello Michal,
On 01.08.24 10:01, Michal Simek wrote:
There is no reason to use goto and just call return. Better is to call
return directly which is done for some if/else parts.
Also make no sense to setup ret to -ETIMEDOUT and then to 0.
Return timeou
Hello Michal,
On 01.08.24 10:01, Michal Simek wrote:
There is no reason to use goto and just call return. Better is to call
return directly which is done for some if/else parts.
Also make no sense to setup ret to -ETIMEDOUT and then to 0.
Return timeout directly.
Signed-off-by: Michal Simek
-
Hi Lukasz,
Maybe also make it explicit in the commit title that this is for px30
only :)
On 8/1/24 12:26 PM, Quentin Schulz wrote:
Hi Lukasz,
On 7/31/24 11:43 AM, Lukasz Czechowski wrote:
Add dedicated getter and setter for SCLK_UART0_PMU.
This allows the driver to correctly handle UART0 cl
Hi Lukasz,
On 7/31/24 11:43 AM, Lukasz Czechowski wrote:
Add dedicated getter and setter for SCLK_UART0_PMU.
This allows the driver to correctly handle UART0 clocks, and thus
it fixes the issues with UART0 not working in case DEBUG_UART is
disabled.
Unlike other Rockchip SoCs, i.e. rk3399, in th
1 - 100 of 107 matches
Mail list logo
