On 7/2/24 15:30, Caleb Connolly wrote:
Add support for generating version 5 UUIDs, these are determistic and work
by hashing a "namespace" UUID together with some unique data. One intended
usecase is to allow for dynamically generate payload UUIDs for UEFI
capsule updates, so that supported board
On Jul 05, 2024 at 10:20:21 +0530, Chintan Vankar wrote:
> Initialize DRAM size in SPL stage since networking requires DDR
> to be initialized.
>
> Signed-off-by: Kishon Vijay Abraham I
> Signed-off-by: Chintan Vankar
> ---
>
Reviewed-by: Dhruva Gole
Best regards,
Dhruva
> Link to v2:
> htt
On Jul 02, 2024 at 22:42:01 -0700, Daniel Schultz wrote:
> Use our common environment file to implement MMC boot.
>
> Signed-off-by: Daniel Schultz
> ---
Reviewed-by: Dhruva Gole
> board/phytec/phycore_am62x/phycore_am62x.env | 11 +--
> 1 file changed, 1 insertion(+), 10 deletions(-)
>
> On Thu, Jul 4, 2024 at 6:25 AM Heinrich Schuchardt
> wrote:
> >
> > On 7/4/24 07:50, Minda Chen wrote:
> > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > So the codes can be used in visionfive2 and star64 7110 board.
> > >
> > > The driver is almost the same with ker
> +++
> 3 files changed, 68 insertions(+)
FWIW, for the series:
Acked-by: Sumit Garg
-Sumit
> ---
> base-commit: 0f073e022ddc5070e5df1d053e4bdc1874fbcc0f
> change-id: 20240704-tsd-rk3588-nvme-aa133c24cb9e
>
> Best regards,
> --
> Quentin Schulz
>
From: Siddharth Vadapalli
Enable DM services for main_pktdma during R5 SPL stage.
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-10-c-van...@ti.com/
Changes from v2 to v3:
- No changes.
arch/arm/dts/k3-am625
Add "bootph-all" property to CPSW MAC's PHY node phy_gmii_sel.
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-11-c-van...@ti.com/
Changes from v2 to v3:
- Since "phy_gmii_sel" with "bootph-all" property is merged at upstream
Linux for am62x-sk-c
From: Kishon Vijay Abraham I
Enable config options needed to support Ethernet boot on AM62x SK.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-9-c-van...@ti.com/
Changes
From: Kishon Vijay Abraham I
In order to support Ethernet boot on AM62x, probe AM65 CPSW NUSS
driver in board_init_f().
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-7-c-
From: Kishon Vijay Abraham I
In absence of Device Manager (DM) services such as at R5 SPL stage,
driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers.
Existing UDMA driver performed the above mentioned configuration
for UDMA. Add similar configuration for PKTDMA here.
Signed-off-by
From: Kishon Vijay Abraham I
Initialize base address of ring config registers required to natively
setup ring cfg registers in the absence of Device Manager (DM) services
at R5 SPL stage. Since register property is defined as "ring" for PKTDMA
and "cfg" for UDMA, configure base address of ring co
This series enables Ethernet Boot on SK-AM62 device.
This series is based on commit "b4cbd1a257d4" of origin/next branch
of u-boot.
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-1-c-van...@ti.com/
TestLogs:
https://gist.github.com/chintanv133/76de0a51fd532b34fea686f4c7bd75c6
Chan
Initialize DRAM size in SPL stage since networking requires DDR
to be initialized.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-2-c-van...@ti.com/
Changes from v2 to v3:
- No changes.
common/spl/spl.c | 2
From: Kishon Vijay Abraham I
Add configs for enabling ETHBOOT in R5SPL.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Andreas Dannenberg
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.2048012-8-c-van...@ti.com
From: Vignesh Raghavendra
Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to
requested size and not to 0. Fix this.
Signed-off-by: Vignesh Raghavendra
Signed-off-by: Siddharth Vadapalli
Signed-off-by: Chintan Vankar
---
Link to v2:
https://lore.kernel.org/r/20240425120822.204
From: Kishon Vijay Abraham I
RX_FL_CFG message should not be forwarded to TIFS and should be
handled within R5 SPL (when DM services are not available). Add
a no-op function to not handle RX_FL_CFG messages.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Siddharth Vadapalli
Signed-off-by
On 7/3/24 12:08, Simon Glass wrote:
> Hi Mikhail,
>
> On Wed, 3 Jul 2024 at 02:02, Mikhail Kshevetskiy
> wrote:
>> From: Michael Polyntsov
>>
>> The standard property
>>
>> linux,default-trigger = "pattern";
>>
>> used to get an effect. No blinking parameters can be set yet.
>>
>> Signed-of
On Fri, Jul 05, 2024 at 11:05:31AM +1000, Leith Bade wrote:
> Hi,
>
> I have been investigating how to stop the MAC addresses on my Banana
> Pi BPI-R3 from changing on every boot.
>
> It appears the ethaddr and eth1addr environment variables are used for
> this purpose as they are randomly genera
From: Michael Polyntsov
If hardware (or driver) doesn't support leds blinking, it's
now possible to use software implementation of blinking instead.
This relies on cyclic functions.
v2 changes:
* Drop sw_blink_state structure, move its necessary fields to
led_uc_plat structure.
* Add cyclic
From: Michael Polyntsov
The standard property
linux,default-trigger = "pattern";
used to get an effect. No blinking parameters can be set yet.
Signed-off-by: Michael Polyntsov
Signed-off-by: Mikhail Kshevetskiy
---
drivers/led/led-uclass.c | 34 ++
1 file
On Thu, Jul 4, 2024 at 6:25 AM Heinrich Schuchardt wrote:
>
> On 7/4/24 07:50, Minda Chen wrote:
> > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > So the codes can be used in visionfive2 and star64 7110 board.
> >
> > The driver is almost the same with kernel driver.
> >
> > T
Hi Phil,
On Thu, Jul 4, 2024 at 4:27 AM Phil Sutter wrote:
>
> Hi Tony,
>
> On Fri, Jun 28, 2024 at 03:44:01PM -0700, Tony Dinh wrote:
> > On Fri, Jun 28, 2024 at 3:04 PM Tony Dinh wrote:
> > > On Wed, Jun 26, 2024 at 3:31 AM Phil Sutter wrote:
> > > > On Sat, Jun 15, 2024 at 03:06:54PM -0700,
Hi,
I have been investigating how to stop the MAC addresses on my Banana
Pi BPI-R3 from changing on every boot.
It appears the ethaddr and eth1addr environment variables are used for
this purpose as they are randomly generated on first boot, then become
fixed after being saved to the environment
On Tue, 18 Jun 2024 14:56:00 +0100, Jiaxun Yang wrote:
> This series enabled qemu-xtensa board.
>
> For dc232b CPU it needs to be built with toolchain[1].
>
> This is a side product of me investigating architectures
> physical address != virtual address in U-Boot. Now we can
> get it covered und
> Subject: [PATCH] ARM: dts: imx8mp-beacon-kit-u-boot: Drop EQoS
> clock work-around
>
> Since commit ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock"),
> the clocks for the DWMAC driver can be configured, and removing
> them breaks operation.
>
> Fixes: ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC cl
Since commit ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock"),
the clocks for the DWMAC driver can be configured, and removing
them breaks operation.
Fixes: ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock")
Suggested-by: Tim Harvey
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mp-beacon
On Thu, 27 Jun 2024 07:43:20 -0600, Tom Rini wrote:
> Both GitLab and Azure (and other CI systems) have native support for
> displaying JUnitXML test report results. The pytest framework that we
> use can generate these reports. Change our CI tests so that they will
> generate these reports and th
On Tue, 18 Jun 2024 14:23:43 -0600, Tom Rini wrote:
> On tests which require "tftpboot" we need to depend not on cmd_net but
> rather cmd_tftpboot. And on tests which require cmd_pxe we do not need
> to also depend on cmd_net as this should be handled already via Kconfig
> logic.
>
>
Applied to
On Sun, 23 Jun 2024 14:30:19 -0600, Simon Glass wrote:
> This series includes a number of mostly unrelated changes which are in
> service of running U-Boot on a lab using Labgrid.
>
> Changes in v2:
> - Add new patch to update u-boot.cfg with CFG_... options
>
> Simon Glass (14):
> trace: Upda
From: Vitor Soares
Enable USB host as well as USB gadget and DFU support for a53 and r5
configs. Also, enable UUU fastboot support to download files with
the UUU tool from a53.
Additionally, configure usb0 to peripheral mode and add extra
environment for DFU use.
Signed-off-by: Vitor Soares
--
Hi Heinrich
On Sun, 30 Jun 2024 at 15:47, Ilias Apalodimas
wrote:
>
> Hi Heinrich,
>
> On Sun, 30 Jun 2024 at 15:23, Heinrich Schuchardt wrote:
> >
> > On 6/22/24 18:38, Ilias Apalodimas wrote:
> > > On Sat, 22 Jun 2024 at 19:36, Heinrich Schuchardt
> > > wrote:
> > >>
> > >> On 20.06.24 22:15
Hi Simon,
On 04/07/2024 09:48, Simon Glass wrote:
Now that U-Boot has a background-processing feature, it is possible to
reduce the amount of 'foreground' syncing of the display. At present
this happens quite often.
Foreground syncing blocks all other processing, sometimes for 10ms or
more. Whe
Hi Simon,
On 04/07/2024 09:48, Simon Glass wrote:
Now that sandbox is using cyclic for video, it trips the 1us time
limit. Updating the sandbox display often takes 20ms or more.
Increase the limit to 100ms to avoid a warning.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/Kco
Gate and mux does not have .set_rate operation, but they could have
CLK_SET_PARENT_RATE flag set. In that case it's usually possible to find a
parent up the tree which is capable of setting the rate (div, pll, etc).
Add clk_generic_set_rate to allow them to trasverse the clock tree.
Cc: Sam Protse
The tests we currently have expect the firmware update to fail
when OsIndications is not set properly. However, we have a Kconfig flag
that explicitly ignores that variable. Adjust the tests accordingly
Signed-off-by: Ilias Apalodimas
---
Changes since v1:
- v1 was rebased incorrectly and only se
Hi Heinrich
Please ignore this patch I messed up my rebasing.
I'll send the proper one shortly
On Thu, 4 Jul 2024 at 17:37, Ilias Apalodimas
wrote:
>
> The tests we currently have expect the firmware update to fail
> when OsIndications is not set properly. However, we have a Kconfig flag
> that
The tests we currently have expect the firmware update to fail
when OsIndications is not set properly. However, we have a Kconfig flag
that explicitly ignores that variable and trigers the capsule update
regardless. Adjust the tests accordingly
Signed-off-by: Ilias Apalodimas
---
.../py/tests/te
Am Donnerstag, 4. Juli 2024, 14:53:33 CEST schrieb Quentin Schulz:
> From: Quentin Schulz
>
> This enables PCIe support on Tiger as exposed on
> Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI
> Express` connector on the Haikou devkit.
>
> This was tested with a PCIe to NVMe a
On 04/07/2024 08:50, Minda Chen wrote:
> Add cdns USB3 wrapper driver.
>
> Signed-off-by: Minda Chen
> ---
> drivers/usb/cdns3/Kconfig | 7 ++
> drivers/usb/cdns3/Makefile | 2 +
> drivers/usb/cdns3/cdns3-starfive.c | 183 +
> 3 files changed,
On 04/07/2024 08:50, Minda Chen wrote:
> Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
> PHY driver and can be used as USB 3.0 driver.
>
> Signed-off-by: Minda Chen
> ---
> drivers/phy/starfive/Kconfig | 7 +
> drivers/phy/starfive/Makefile | 1 +
> drivers/
Am Donnerstag, 4. Juli 2024, 14:53:32 CEST schrieb Quentin Schulz:
> From: Quentin Schulz
>
> Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane
> PHY on RK3588.
>
> CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since
> it's required only for the M.2 E-KEY
Am Donnerstag, 4. Juli 2024, 14:53:31 CEST schrieb Quentin Schulz:
> From: Heiko Stuebner
>
> The Jaguar SBC provides an M.2 slot connected to the pcie3 controller.
> In contrast to a number of other boards the pcie-refclk is gpio-controlled,
> so the necessary clock and is added to the list of p
On 04/07/2024 08:50, Minda Chen wrote:
> Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
> PHY driver and can be used as USB 3.0 driver.
>
> Signed-off-by: Minda Chen
> ---
> drivers/phy/starfive/Kconfig | 7 +
> drivers/phy/starfive/Makefile | 1 +
> drivers/
On 04/07/2024 08:50, Minda Chen wrote:
> Add Starfive JH7110 USB 2.0 PHY driver, which is generic
> PHY driver.
>
> Signed-off-by: Minda Chen
> ---
> drivers/phy/Kconfig| 1 +
> drivers/phy/Makefile | 1 +
> drivers/phy/starfive/Kconfig | 1
Hi,
On 04/07/2024 08:50, Minda Chen wrote:
> USB PHY maybe need to set PHY mode in different USB
> dr mode. So translate to generic PHY mode and call
> generic_phy_set_mode().
>
> Signed-off-by: Minda Chen
> ---
> drivers/usb/cdns3/core.c | 25 +
> 1 file changed, 25 ins
On 7/4/24 07:50, Minda Chen wrote:
Add Starfive JH7110 Cadence USB driver and related PHY driver.
So the codes can be used in visionfive2 and star64 7110 board.
The driver is almost the same with kernel driver.
Test with Star64 JH7110 board USB 3.0 + USB 2.0 host.
The code can work.
- Star64 u
Dear U-Boot devs/maintainers,
We are running Xilinx MPSoC based MicroTCA mezzanine boards that,
according to the MicroTCA standard, connect to the crate's Ethernet
switch via a 1000BASE-BX interface at the backplane (the interface is
basically equivalent to a SFP module; we actually have a bri
> On 05.06.24 23:38, Conor Dooley wrote:
> On Wed, Jun 05, 2024 at 08:35:15AM -0600, Tom Rini wrote:
> > On Wed, Jun 05, 2024 at 01:56:13AM +, Hal Feng wrote:
> > > > On 04.06.24 04:32, E Shattow wrote:
> > > > Hi Hal,
> > > >
> > > > Instead of manual dt-bindings sync can we please adopt OF_U
From: Quentin Schulz
This enables PCIe support on Tiger as exposed on
Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI
Express` connector on the Haikou devkit.
This was tested with a PCIe to NVMe adapter (e.g.
https://www.amazon.de/dp/B07RZZ3TJG).
Signed-off-by: Quentin Schulz
From: Quentin Schulz
Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane
PHY on RK3588.
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since
it's required only for the M.2 E-KEY slot on the main PCB, but that is
used typically for WiFi+BT modules, or on the
From: Heiko Stuebner
The Jaguar SBC provides an M.2 slot connected to the pcie3 controller.
In contrast to a number of other boards the pcie-refclk is gpio-controlled,
so the necessary clock and is added to the list of pcie3 clocks.
Signed-off-by: Heiko Stuebner
Reviewed-by: Quentin Schulz
Lin
onfig| 4 ++
dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts | 59 +++
3 files changed, 68 insertions(+)
---
base-commit: 0f073e022ddc5070e5df1d053e4bdc1874fbcc0f
change-id: 20240704-tsd-rk3588-nvme-aa133c24cb9e
Best regards,
--
Quentin Schulz
Hi Tom,
On Wed, Jul 3, 2024 at 3:22 PM Tom Rini wrote:
> How is the fdt at 0x4300 not being clobbered if the initramfs at
> 0x4380 is? Is it because it's just enough of a bad spot that we
> relocate the fdt out of the way? With the kernel at 0x4048
> everything else is too low. kerne
From: Fabio Estevam
Booting an initramfs with the current initrd_addr address may lead to
initramfs corruption and boot failure.
Fix the initramfs problem by applying the following layout
suggested by Tom Rini:
loadaddr=0x4048 --> Gets moved to 0x4060 in run-time:
Uncompressing Kern
Hi Tony,
On Fri, Jun 28, 2024 at 03:44:01PM -0700, Tony Dinh wrote:
> On Fri, Jun 28, 2024 at 3:04 PM Tony Dinh wrote:
> > On Wed, Jun 26, 2024 at 3:31 AM Phil Sutter wrote:
> > > On Sat, Jun 15, 2024 at 03:06:54PM -0700, Tony Dinh wrote:
> > > [...]
> > > > diff --git a/board/Synology/ds414/ds4
Hi Weijie,
> I have a better example for reference:
> arch/mips/mach-mtmips
>
> ARCH_MTMIPS is defined for the entire MediaTek MIPS platform, same as
> ARCH_MEDIATEK.
>
> The mtmips then defined its SoC families:
> SOC_MT7620, SOC_MT7621 and SOC_MT7628
>
> Each SoC has its own folder and Kconfig,
Hi Tom,
On jeu., juin 20, 2024 at 08:23, Tom Rini wrote:
> On Thu, Jun 13, 2024 at 12:13:07PM +0200, Mattijs Korpershoek wrote:
>
>> Android boot flow is a bit different than a regular Linux distro.
>> Android relies on multiple partitions in order to boot.
>>
>> A typical boot flow would be:
>
Add entry for the TI boards documentation under ARM TI
Signed-off-by: Dhruva Gole
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 6b32a6d94644..da730c6e4840 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -733,6 +733,7 @@ F: arch/arm/mach-omap2/
Add documentation to briefly explain the role of TIFS Stub in relevant
K3 SoC's.
Signed-off-by: Dhruva Gole
---
doc/board/ti/k3.rst | 5 +
1 file changed, 5 insertions(+)
diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst
index 67b066a07d3a..2f63852b3801 100644
--- a/doc/board/ti/k3.rst
Since AM62x, AM62P and AM62A all use similar boot flows and their low
power mode s/w ARCH is also similar in the way that they make use of the
TIFS Stub, update their documentation to show where TIFS Stub is.
Signed-off-by: Dhruva Gole
---
doc/board/ti/am62ax_sk.rst | 4 ++--
doc/board/ti/am62px
Mention the TIFS Stub in the TISP image format
Signed-off-by: Dhruva Gole
---
doc/board/beagle/am62x_beagleplay.rst | 2 +-
doc/board/ti/img/tifsstub_dm_tispl.bin.svg | 353 +
2 files changed, 354 insertions(+), 1 deletion(-)
create mode 100644 doc/board/ti/img/tifsst
Add the AM62x boot flow to show at which point the TIFS Stub actually
gets loaded.
Signed-off-by: Dhruva Gole
---
doc/board/beagle/am62x_beagleplay.rst |2 +-
doc/board/ti/img/boot_diagram_am62.svg | 1983
2 files changed, 1984 insertions(+), 1 deletion(-)
create m
Add support for packaging the TIFS Stub as it's required for basic Low
Power Modes like Deep Sleep.
Acked-by: Neha Malcom Francis
Signed-off-by: Dhruva Gole
---
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 33 +++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/
This series includes the binman related changes required to package TIFS
Stub to support Low Power Modes on BeaglePlay.
It also documents the boot flow and tispl packaging details regarding
the same.
Changelog:
* Add more documentation around TIFS Stub for AM62, 62A and 62P
* Fix documentation for
Hello Heiko,
Am Thu, Jul 04, 2024 at 06:28:31AM +0200 schrieb Heiko Schocher:
> Hello Alexander,
>
> On 03.07.24 12:12, Alexander Dahl wrote:
> > Hei hei,
> >
> > filesystem handling is different in U-Boot and beyond that UBI/UBIFS is
> > different from other filesystems in U-Boot. There's UBI
With sandbox, when U-Boot is waiting for input it syncs the video
display, since presumably the user has finished typing.
Now that cyclic is used for video syncing, we can drop this. Cyclic
will automatically call the video_idle() function when idle.
Signed-off-by: Simon Glass
---
(no changes s
Now that sandbox is using cyclic for video, it trips the 1us time
limit. Updating the sandbox display often takes 20ms or more.
Increase the limit to 100ms to avoid a warning.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
At present U-Boot flushes the cache after every character written to
ths display. This makes the command-line slower, to the point that
pasting in long strings can fail.
Add a cyclic function to sync the display every 10ms. Enable this by
default.
Allow much longer times for sandbox, since the SD
Rather than using a static variable, use the video device's private
data to remember when the last video sync was completed. This allows
each display to have its own sync and avoids using static data in SPL.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/video/video-uclass.c | 10
The cyclic subsystem is currently enabled either in all build phases
or none. For tools this should not be enabled, but since lib/shc256.c
and other files include watchdog.h in the host build, we must make
sure that it is not enabled there.
Add an SPL symbol so that there is more control of this.
Now that U-Boot has a background-processing feature, it is possible to
reduce the amount of 'foreground' syncing of the display. At present
this happens quite often.
Foreground syncing blocks all other processing, sometimes for 10ms or
more. When pasting commands into U-Boot over the UART, this ty
With the changes to add notifications for any changes to the LMB map,
the size of the image exceeds the limit set. Bump up the image size
limit for now to get the platform to build.
This is not for committing.
Signed-off-by: Sughosh Ganu
---
Changes since V1: None
configs/mx6sabresd_defconfig
With the addition of two events for notification of any changes to
memory that is occupied and is free, the output of the event_dump.py
script has changed. Update the expected event log to incorporate this
change.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Remove the line for EFI mem map
Mark the EFI runtime memory region as reserved memory during board
init so that it does not get allocated by the LMB module on subsequent
memory requests.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
lib/lmb.c | 41 -
1 file changed, 20 ins
The EFI_CONVENTIONAL_MEMORY type, which is the usable RAM memory is
now being managed by the LMB module. Remove the addition of this
memory type to the EFI memory map. This memory now gets added to the
EFI memory map as part of the LMB memory map update event handler.
Signed-off-by: Sughosh Ganu
The EFI_CONVENTIONAL_MEMORY type is now being managed through the LMB
module. Add a separate function, lmb_add_memory() to add the RAM
memory to the LMB memory map. The efi_add_known_memory() function is
now used for adding any other memory type to the EFI memory map.
Signed-off-by: Sughosh Ganu
The EFI memory allocations are now being done through the LMB module,
and hence the memory map is maintained by the LMB module. Use the
lmb_add_memory() API function to add the usable RAM memory to the
LMB's memory map.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
arch/arm/cpu/ar
The efi_add_known_memory() function for the TI K3 platforms is adding
the EFI_CONVENTIONAL_MEMORY type. This memory is now being handled
through the LMB module -- the lmb_add_memory() adds this memory to the
memory map. Remove the definition of the now superfluous
efi_add_known_memory() function.
There are events that would be used to notify other interested modules
of any changes in available and occupied memory. This would happen
when a module allocates or reserves memory, or frees up memory. These
changes in memory map should be notified to other interested modules
so that the allocated
In U-Boot, LMB and EFI are two primary modules who provide memory
allocation and reservation API's. Both these modules operate with the
same regions of memory for allocations. Use the LMB memory map update
event to notify other interested listeners about a change in it's
memory map. This can then b
Add a function to check if a given address falls within the RAM
address used by U-Boot. This will be used to notify other modules if
the address gets allocated, so as to not get re-allocated by some
other module.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Have a common weak function for
Add a Kconfig symbol to enable getting updates on any memory map
changes that might be done by the LMB module. This notification
mechanism can then be used to have a synchronous view of allocated and
free memory.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Change the description to highli
Add an event which would be used for notifying changes in the
LMB modules' memory map. This is to be used for having a
synchronous view of the memory that is currently in use, and that is
available for allocations.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Remove the event for EFI notif
Use the LMB API's for allocating and freeing up memory. With this, the
LMB module becomes the common backend for managing non U-Boot image
memory that might be requested by other modules.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
lib/efi_loader/Kconfig | 1 +
lib/efi_loa
Add a flag LMB_NONOTIFY that can be passed to the LMB API's for
reserving memory. This will then result in no notification being sent
from the LMB module for the changes to the LMB's memory map.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
include/lmb.h | 1 +
1 file changed, 1 i
The LMB module is to be used as a backend for allocating and freeing
up memory requested from other modules like EFI. These memory requests
are different from the typical LMB reservations in that memory
required by the EFI module cannot be overwritten, or re-requested. Add
versions of the LMB API f
The LMB code has been changed to make the memory reservations
persistent and global. Make corresponding change the the
lmb_test_dump_all() function to print the global LMB available and
used memory.
Signed-off-by: Sughosh Ganu
---
Changes since V1:
* Corresponding changes needed to work with alis
With the LMB tests moved under a separate class of unit tests, invoke
these from a separate script which would allow for a system reset once
the tests have been run. This enables clearing up the LMB memory map
after having run the tests.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
Add the LMB unit tests under a separate class of tests. The LMB tests
involve changing the LMB's memory map. With the memory map now
persistent and global, running these tests has a side effect and
impact any subsequent tests. Run these tests separately so that the
system can be reset on completion
The LMB code has been changed so that the memory reservations and
allocations are now persistent and global. With this change, the
design of the LMB tests needs to be changed accordingly. Mark the LMB
tests to be run only manually. The tests won't be run as part of the
unit test suite, but would be
The LMB memory maps are now persistent, with alloced lists being used
to keep track of the available and free memory. Make corresponding
changes in the test functions so that the list information can be
accessed by the tests for checking against expected values. Also
introduce functions to initiali
Instead of a randomly selected address, use an LMB allocated one for
reading the file into memory. With the LMB map now being persistent
and global, the address used for reading the file might be already
allocated as non-overwritable, resulting in a failure. Get a valid
address from LMB and then re
The LMB memory is typically not needed very early in the platform's
boot. Do not add memory to the LMB map before relocation. Reservation
of common areas and adding of memory is done after relocation.
Signed-off-by: Sughosh Ganu
---
Changes since V1: None
board/xilinx/common/board.c | 31 --
The sandbox iommu driver uses the LMB module to allocate a particular
range of memory for the device virtual address(DVA). This used to work
earlier since the LMB memory map was caller specific and not
global. But with the change to make the LMB allocations global and
persistent, adding this memory
Enable the LMB module in the SPL stage. This will allow the LMB code
to be exercised and tested in the SPL stage.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch
configs/sandbox_spl_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/sandbox_spl_defconfig b/configs
Almost all of the current definitions of arch_lmb_reserve() are doing
the same thing. The only exception in a couple of cases is the
alignment parameter requirement. Have a generic weak implementation of
this function, keeping the highest value of alignment that is being
used(16K).
Also, instead o
Use the BIT macro for assigning values to the LMB flags instead of
assigning random values to them.
Signed-off-by: Sughosh Ganu
---
Changes since V1: New patch based on review comment from Heinrich
include/lmb.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/include/
The memory map maintained by the LMB module is now persistent and
global. This memory map is being maintained through the alloced list
structure which can be extended at runtime -- there is one list for
the available memory, and one for the used memory. Allocate and
initialise these lists during th
With the move to make the LMB allocations persistent and the common
memory regions being reserved during board init, there is no need for
an explicit reservation of a memory range. Remove the
lmb_init_and_reserve_range() function.
Signed-off-by: Sughosh Ganu
Reviewed-by: Ilias Apalodimas
Reviewe
The LMB module provides API's for allocating and reserving chunks of
memory which is then typically used for things like loading images for
booting. Reserve the portion of memory that is occupied by the U-Boot
image itself, and other parts of memory that might have been marked as
reserved in the bo
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