Hi,
> -Original Message-
> From: Yang Xiwen
> Sent: Wednesday, April 3, 2024 10:20 AM
> To: Jaehoon Chung ; Peng Fan
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH v2 2/3] mmc: dw_mmc: Don't return error if data busy
> timeout
>
> On 4/3/2024 8:41 AM, Jaehoon Chung wrote:
> > Hi,
> >
Hi,
> -Original Message-
> From: Yang Xiwen
> Sent: Wednesday, April 3, 2024 10:16 AM
> To: Jaehoon Chung ; Peng Fan
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH v2 1/3] mmc: hi6220-dwmmc: handle clocks and resets if
> CONFIG_CLK and
> CONFIG_DM_RESET enabled
>
> On 4/3/2024 8:39 A
On 2024-04-13 20:13, Jonas Karlman wrote:
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation.
Also fix .dtb-file entries in Makefile.
Perhaps the patch subject could be improved a bit to also mention
fixing of the Makefile, but only if there will be v3.
Fixes: 3e15dee38d45
On 2024-04-13 20:13, Jonas Karlman wrote:
Imply BOOTSTD_FULL for all RK356x boards to more closely follow RK3588.
Signed-off-by: Jonas Karlman
Looking good to me.
Reviewed-by: Dragan Simic
---
v2: No change
---
arch/arm/mach-rockchip/Kconfig | 1 +
configs/bpi-r2-pro-rk3568_defconfi
On 2024-04-13 20:13, Jonas Karlman wrote:
Imply support for GbE PHY status parsing and configuration when support
for onboard ethernet is enabled.
s/ethernet/Ethernet/ -- only if there will be v3
Signed-off-by: Jonas Karlman
Reviewed-by: Quentin Schulz
Looking good to me.
Reviewed-by: Dr
Hello Jonas,
Please see a couple of comments below.
On 2024-04-13 20:13, Jonas Karlman wrote:
The RK35xx SoCs contain a crypto engine block that can generate random
numbers.
Enable rng node in soc u-boot.dtsi and enable Kconfig options to take
advantage of the random generator.
Signed-off-by:
Hello Alexander,
On Mon, Apr 15, 2024 at 8:13 AM Alexander Dahl wrote:
>
> Hello Dario,
>
> Am Sun, Apr 14, 2024 at 03:41:38PM +0200 schrieb Dario Binacchi:
> > Hi Alexander,
> >
> > On Wed, Mar 20, 2024 at 10:02 AM Alexander Dahl wrote:
> > >
> > > Hello everyone,
> > >
> > > while working on N
On 2024-04-13 20:13, Jonas Karlman wrote:
Sort imply statements under ROCKCHIP_RK3568 and ROCKCHIP_RK3588
alphabetically.
Signed-off-by: Jonas Karlman
Looking good to me.
Reviewed-by: Dragan Simic
---
v2: No change
---
arch/arm/mach-rockchip/Kconfig | 24
1 file
On 2024-04-13 20:13, Jonas Karlman wrote:
RK3588 boards do not have any pwm-regulator compatible nodes in DT,
drop
the superfluous REGULATOR_PWM Kconfig options.
Signed-off-by: Jonas Karlman
Looking good to me.
Reviewed-by: Dragan Simic
---
v2: No change
---
configs/evb-rk3588_defconfig
On 2024-04-13 20:13, Jonas Karlman wrote:
The commit 8c19275fdb13 ("rockchip: Update the default USB Product ID
value") added default product id for all supported Rockchip SoCs.
Remove USB_GADGET_PRODUCT_NUM options that match default value from
RK35xx boards.
Signed-off-by: Jonas Karlman
Lo
Hello Dario,
Am Sun, Apr 14, 2024 at 03:41:38PM +0200 schrieb Dario Binacchi:
> Hi Alexander,
>
> On Wed, Mar 20, 2024 at 10:02 AM Alexander Dahl wrote:
> >
> > Hello everyone,
> >
> > while working on NAND flash support for a custom board based on the at91
> > SAM9X60 SoC I stumbled over some i
MCR boards are plugged in racks. The position in the rack can be read
in a register.
For MCR3000, that's provided by the FPGA so check it is loaded before
reading the address.
For the other boards, the FPGA is loaded by hardware so it can be
read inconditionnaly.
Signed-off-by: Christophe Leroy
Unlike CMPC885 and CMPCPRO boards, the FPGA of MCR3000 board doesn't
load code automatically but needs to be loaded by software through SPI.
Until now it was loaded later by Linux, but we'd like U-boot to have
access to some information that require the FPGA, like board address
in racks.
So, impl
Instead of cross using cross-directory makefile directives,
add a Makefile in board/cssi/common/ directory in order to
benefit from HAVE_VENDOR_COMMON_LIB logic.
Signed-off-by: Christophe Leroy
---
board/cssi/cmpc885/Makefile | 2 +-
board/cssi/cmpcpro/Makefile | 2 +-
board/cssi/common/Makefile
Set the speed requested through mpc8xx_spi_set_speed() instead
of hardcoding a fixed speed.
Signed-off-by: Christophe Leroy
---
drivers/spi/mpc8xx_spi.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
in
On CPM, the RISC core is a lot more efficiant when doing transfers
in 16-bits chunks than in 8-bits chunks, but unfortunately the
words need to be byte swapped.
So, for large tranfers with an even size, allocate a temporary
buffer and byte-swap data before and after transfer.
This change allows s
Perform multiple transfer of size MAX_BUFFER when the data to be
transferred is longer than MAX_BUFFER.
Signed-off-by: Christophe Leroy
---
drivers/spi/mpc8xx_spi.c | 48
1 file changed, 34 insertions(+), 14 deletions(-)
diff --git a/drivers/spi/mpc8xx_s
SDMA configuration register needs to be set up only once and doesn't
belong to drivers. Also, the value to be used is different on mpc885.
So do the init in cpu_init_f() with 0x40 for mpc885 and 0x1 for others.
Signed-off-by: Christophe Leroy
---
arch/powerpc/cpu/mpc8xx/cpu_init.c | 6 ++
d
All CSSI boards have an LM74 chip as temperature sensor.
Enable it.
Signed-off-by: Christophe Leroy
---
arch/powerpc/dts/cmpc885.dts | 12 +++-
arch/powerpc/dts/cmpcpro.dts | 12 +++-
arch/powerpc/dts/mcr3000.dts | 6 ++
configs/CMPC885_defconfig| 3 +++
configs/CMPCPR
MCR3000 board has some components tied to the SPI bus, like the Texas
Instruments LM74 temperature sensor.
Add support for SPI bus. The SPI chipselects are a bit special in the
way that they are driven by 3 bits in a register of the board's CPLD
where the value writen in those bits exclusively act
LM74 is a SPI temperature sensor.
Implement a driver to read temperature from it.
Signed-off-by: Christophe Leroy
---
drivers/thermal/Kconfig | 6 +
drivers/thermal/Makefile | 1 +
drivers/thermal/ti-lm74.c | 52 +++
3 files changed, 59 insertions(+)
xfer ops can be passed a NULL input or output buffer. At the
time being the driver ignores it and overwrites memory at 0.
Define a dummy buffer and use it when either input or output
buffer is NULL. Bail out when both are NULL as it shouldn't.
Also increase MAX_BUFFER len to 32k as the current is
Since commit 773ad4ebb1d6 ("spi, mpc8xx: Add support for chipselect via
GPIO and fixups"), DM_GPIO is required for 8xx SPI.
Add the missing dependency to avoid build failures.
Fixes: 773ad4ebb1d6 ("spi, mpc8xx: Add support for chipselect via GPIO and
fixups")
Signed-off-by: Christophe Leroy
---
From: Hugo Dubois
CMPC885 board can be pluged on a mother board with fibre interface, so
fibre interface MAC address must be initialised for that case.
Signed-off-by: Hugo Dubois
Reviewed-by: CASAUBON Jean Michel
Signed-off-by: Christophe Leroy
---
board/cssi/cmpc885/cmpc885.c | 4 +++-
1 fi
From: Hugo Dubois
When equipped with the SRSA audio board, MIAE equipment
has an additional port called port F.
Initialise that port just like other ports of the board, so
that it is already configured when starting Linux kernel.
Signed-off-by: Hugo Dubois
Reviewed-by: CASAUBON Jean Michel
Si
From: Jean-Michel CASAUBON
HUSH shell is not always wanted/desirable.
Add missing braces in environment in order to allow use without
HUSH shell.
Signed-off-by: Jean-Michel CASAUBON
Cc: DUBOIS Hugo
Signed-off-by: Christophe Leroy
---
board/cssi/cmpc885/cmpc885.env | 4 ++--
board/cssi/cmpcp
When adding additional SPI peripherals, the reg property needs to
be added, and this leads to the following error:
arch/powerpc/dts/cmpc885.dtb: Warning (reg_format):
/immr@ff00/spi@aa0/temp@1:reg: property has invalid length (4 bytes)
(#address-cells == 1, #size-cells == 1)
arch/powerpc
From: Jean-Michel CASAUBON
Remove a stray semicolon in MCR3000 board environment.
Signed-off-by: Jean-Michel CASAUBON
Reviewed-by: DUBOIS Hugo
Signed-off-by: Christophe Leroy
---
board/cssi/mcr3000/mcr3000.env | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/cssi/mcr
This series contains misc fixes and changes for CSSI boards.
Main changes are:
- Fix and optimise mpc8xx SPI driver
- Add support for LM74 temperature sensor
- Add support for loading FPGA on MCR3000
I will send a pull request later before close of the merge window.
Changes since v1:
- Added tem
Hello John,
On 11.04.24 07:05, John Watts wrote:
UBI required MTD to build correctly, add it as a Kconfig dependency.
Signed-off-by: John Watts
---
While working with UBI on my SPI NAND patch series I found it was
possible to enable it without enabling the MTD subsystem.
Add a Kconfig option t
From: Takahiro Kuwano
The Infineon SEMPER NOR flash family uses 2-bit ECC by default with each
ECC block being 16 bytes. Under this scheme multi-pass programming to an
ECC block is not allowed. Set the writesize to make sure multi-pass
programming is not attempted on the flash.
Signed-off-by: Ta
From: Takahiro Kuwano
default_init() fixup hook should be used to initialize flash parameters
when its information is not provided in SFDP. To support that case, it
needs to take flash_parameter structure like as other hooks.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c |
From: Takahiro Kuwano
Some flashes like the Infineon SEMPER NOR flash family use ECC. Under
this ECC scheme, multi-pass writes to an ECC block is not allowed.
In other words, once data is programmed to an ECC block, it can't be
programmed again without erasing it first.
Upper layers like file sy
From: Takahiro Kuwano
For NOR flashes EC and VID are zeroed out before an erase is issued to
make sure UBI does not mistakenly treat the PEB as used and associate it
with an LEB.
But on some flashes, like the Infineon Semper NOR flash family,
multi-pass page programming is not allowed on the def
From: Takahiro Kuwano
This series is equivalent to the one for Linux MTD submitted by
Pratyush Yadav.
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=217759&state=*
Takahiro Kuwano (4):
mtd: ubi: Do not zero out EC and VID on ECC-ed NOR flashes
mtd: spi-nor: Allow flashes to spe
On Sun, Apr 14, 2024 at 08:45:17PM +0200, Marek Vasut wrote:
> The following changes since commit cdfcc37428e06f4730ab9a17cc084eeb7676ea1a:
>
> Merge tag 'u-boot-dfu-next-20240402' of
> https://source.denx.de/u-boot/custodians/u-boot-dfu (2024-04-02 22:37:23
> -0400)
>
> are available in the
On Sat, 13 Apr 2024 21:43:52 +0800
da...@189.cn wrote:
Hi,
thanks for sending a patch!
> From: lalakii
>
> Add "DRAM_SUN50I_H616_TRIM_SIZE" option for 1.5gb board.
>
> Signed-off-by: lalakii
> ---
> arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h | 1 +
> arch/arm/mach-sunxi/Kconfig
3
> 10:18:38 -0600)
>
> are available in the Git repository at:
>
> https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
> tags/u-boot-nand-20240414
>
> for you to fetch changes up to 248fc16055858c2028a381bb59e12354c4ae19ea:
>
> cmd: mtd: OTP access su
On 4/14/24 11:28 PM, Laurent Pinchart wrote:
On Sun, Apr 14, 2024 at 11:25:06PM +0200, Marek Vasut wrote:
On 4/14/24 9:29 PM, Laurent Pinchart wrote:
Hi Marek,
Thank you for the patch.
On Sun, Apr 14, 2024 at 08:37:20PM +0200, Marek Vasut wrote:
In case of systems where DRAM bank ends at the
On Sun, Apr 14, 2024 at 11:25:06PM +0200, Marek Vasut wrote:
> On 4/14/24 9:29 PM, Laurent Pinchart wrote:
> > Hi Marek,
> >
> > Thank you for the patch.
> >
> > On Sun, Apr 14, 2024 at 08:37:20PM +0200, Marek Vasut wrote:
> >> In case of systems where DRAM bank ends at the edge of 32bit boundary
On 4/14/24 9:29 PM, Laurent Pinchart wrote:
Hi Marek,
Thank you for the patch.
On Sun, Apr 14, 2024 at 08:37:20PM +0200, Marek Vasut wrote:
In case of systems where DRAM bank ends at the edge of 32bit boundary,
start + size calculations would overflow. This happens on STM32MP15xx
with 1 DRAM b
Hi Marek,
Thank you for the patch.
On Sun, Apr 14, 2024 at 08:37:20PM +0200, Marek Vasut wrote:
> In case of systems where DRAM bank ends at the edge of 32bit boundary,
> start + size calculations would overflow. This happens on STM32MP15xx
> with 1 DRAM bank starting at 0xc000 and 1 GiB of D
Hi Yasuharu,
On Sun, Apr 14, 2024 at 9:46 AM Yasuharu Shibata
wrote:
>
> The server sends multiple packets without waiting for an ACK
> by window control and if some packets are dropped,
> wget will return an ACK including the dropped packets.
>
> Following log indicates this issue.
>
> wget_ha
The following changes since commit cdfcc37428e06f4730ab9a17cc084eeb7676ea1a:
Merge tag 'u-boot-dfu-next-20240402' of
https://source.denx.de/u-boot/custodians/u-boot-dfu (2024-04-02 22:37:23 -0400)
are available in the Git repository at:
git://source.denx.de/u-boot-usb.git master
for you to
In case of an OTP-CLOSED STM32MP15xx system, the CPU core 1 cannot be
released from endless loop in BootROM only by populating TAMP BKPxR 4
and 5 with magic and branch address and sending SGI0 interrupt from
core 0 to core 1 twice. TAMP_SMCR BKP..PROT fields must be initialized
as well to release t
SoC revision is only accessible via DBUMCU IDC register,
which requires BSEC.DENABLE DBGSWENABLE bit to be set to
make the register accessible, otherwise an access to the
register triggers bus fault. As BSEC.DBGSWENABLE is zero
in case of an OTP-CLOSED system, do NOT set DBGSWENABLE
bit as this mig
The source file is in arch/arm/mach-stm32mp/ecdsa_romapi.c and not
in arch/arm/mach-stm32mp/stm32mp1/ecdsa_romapi.c . There are two
Makefile entries in each subdirectory. Drop the bogus one and keep
only the correct one, the one in arch/arm/mach-stm32mp/Makefile .
Signed-off-by: Marek Vasut
---
C
In case of systems where DRAM bank ends at the edge of 32bit boundary,
start + size calculations would overflow. This happens on STM32MP15xx
with 1 DRAM bank starting at 0xc000 and 1 GiB of DRAM. This is a
usual 32bit system DRAM size overflow, fix it by doing all DRAM size
and offset calculati
ans/u-boot-nand-flash.git
tags/u-boot-nand-20240414
for you to fetch changes up to 248fc16055858c2028a381bb59e12354c4ae19ea:
cmd: mtd: OTP access support (2024-04-14 08:49:40 +0200)
Gitlab CI showed no issues:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipel
Hi Tom and Simon,
On 2024-04-11 03:45, Tom Rini wrote:
> On Thu, 14 Dec 2023 21:18:58 -0700, Simon Glass wrote:
>
>> This series is the culmanation of the current line of refactoring
>> series. It adjusts pxe to call the booting functionality directly
>> rather than going through the command-line
Hello,
> Which dts upstream tag are u using?
You will find it in my previous email.
The command I use is:
./dts/update-dts-subtree.sh pull 2639a0e2fdbdb7f2dd351d06afe54c895adf9d9d
> Do you have time to debug the issue? I not have the board, so not sure what
> happens here.
Not at the moment
This patch adds DEFLATE compression algorithm support. It's a good choice
to trade off between compression ratios and performance compared to LZ4.
Alternatively, DEFLATE could be used for some specific files since EROFS
supports multiple compression algorithms in one image.
Signed-off-by: Jianan H
Hi Bruce,
On Tue, Mar 12, 2024 at 2:43 AM Bruce Suen wrote:
>
> Add support for XTX XT26G0xA and XT26xxxD. The driver is ported from
> linux-6.7.1. This driver is tested on Banana BPI-R3 with XT26G01A and
> XT26G12D.
>
> Signed-off-by: Bruce Suen
> Reviewed-by: Frieder Schrempf
> ---
> V3->V4:
Hi Arseniy,
On Mon, Feb 12, 2024 at 11:19 AM Michael Nazzareno Trimarchi
wrote:
>
> Hi
>
> On Sat, Feb 10, 2024 at 11:48 PM Arseniy Krasnov
> wrote:
> >
> > Basic support for Amlogic Meson NAND controller on AXG. This version
> > works at only first EDO mode.
> >
> > Based on Linux version 6.7.0
Hi Arseniy,
On Tue, Mar 26, 2024 at 11:49 PM Arseniy Krasnov
wrote:
>
> Add access to OTP region. It supports info, dump, write and lock
> operations. Usage example:
>
> 'mtd otpread nand0 u 0 1024' - dump 1024 bytes of user area starting
> from offset 0 of device 'nand0'.
>
> 'mtd otpwrite nand
Hi Weizhao,
On Fri, Mar 15, 2024 at 7:07 PM Jonas Karlman wrote:
>
> Hi,
>
> On 2024-01-04 12:46, Weizhao Ouyang wrote:
> > Handle the return value of spi_flash_probe_bus_cs() to avoid sf probe
> > crashes.
> >
> > Signed-off-by: Weizhao Ouyang
>
> This fixes a null pointer dereference when runn
Hi Alexander,
On Wed, Mar 20, 2024 at 10:02 AM Alexander Dahl wrote:
>
> Hello everyone,
>
> while working on NAND flash support for a custom board based on the at91
> SAM9X60 SoC I stumbled over some issues in the raw nand subsystem.
>
> Four of six patches are minor fixes.
>
> Patch 4 introduce
> Subject: Re: [PATCH v6 5/5] imx93: convert to OF_UPSTREAM
>
>
> Hello,
>
> I was able to test this series on the imx93-phyboard-segin. Up to that
> specific
> commit no issue to report.
>
> That specific commit however, using an updated dts subtree at 2639a0e2fd,
> fails to boot.
>
> There
The server sends multiple packets without waiting for an ACK
by window control and if some packets are dropped,
wget will return an ACK including the dropped packets.
Following log indicates this issue.
wget_handler() wget: Transferring, seq=97bbdd4a, ack=30,len=580
wget_handler() wget: Trans
Hello,
I was able to test this series on the imx93-phyboard-segin. Up to that
specific commit no issue to report.
That specific commit however, using an updated dts subtree at
2639a0e2fd, fails to boot.
There is no more garbage on the UART, but the boot stops after BL31 is
started:
U-Boot SPL
Hello Patrice,
On 4/13/2024 1:54 PM, Patrice CHOTARD wrote:
On 4/12/24 17:53, Patrice Chotard wrote:
In case a new region is adjacent to a previous region with
similar flag, this region is merged with its predecessor, but no
check are done if this new added region is overlapping another region
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