Hi Andre,
On Thu, Jan 20, 2022 at 8:06 PM Jagan Teki wrote:
>
> On Thu, Jan 20, 2022 at 7:36 PM Andre Przywara wrote:
> >
> > On Thu, 20 Jan 2022 19:08:57 +0530
> > Jagan Teki wrote:
> >
> > Hi,
> >
> > > On Tue, Jan 11, 2022 at 6:16 PM Andre Przywara
> > > wrote:
> > > >
> > > > On the Allwi
On Thu, Feb 24, 2022 at 12:56 PM Jagan Teki wrote:
>
> On Tue, Jan 11, 2022 at 6:16 PM Andre Przywara wrote:
> >
> > Commit 7945caf22c44 ("arm: sunxi: Enable SPI/SPI-FLASH support for A64")
> > selected CONFIG_SPI by default on all Allwinner A64 boards, even though
> > only 4 out of the 14 A64 bo
On Tue, Jan 11, 2022 at 6:16 PM Andre Przywara wrote:
>
> Commit 7945caf22c44 ("arm: sunxi: Enable SPI/SPI-FLASH support for A64")
> selected CONFIG_SPI by default on all Allwinner A64 boards, even though
> only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs
> had to manually sel
Hi
Am Di., 15. Feb. 2022 um 07:48 Uhr schrieb Christian Gmeiner
:
>
> We only want to call do_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
> is set. Same as done for am64.
>
> This makes it possible to add a custom am65 based board design to
> U-Boot that does not use this board detection mechanis
On 2/23/22 10:48, Heiko Thiery wrote:
To be in sync with the linux devicetree add the disable-smarteee
property.
Tested-by: Marek Vasut # 8MNANOD4-EVK
On 2/23/22 10:48, Heiko Thiery wrote:
To be in sync with the linux devicetree change the 'phy-reset-gpios' in
the fec node to 'reset-gpios' in the phy node. The PHY reset will be
done by the eth-phy-uclass driver while probing the PHY. This is ok
since it is done before probing the fec.
Signed-o
On 2/23/22 09:10, Heiko Thiery wrote:
With the correct settings described in the device-tree the PHY settings
in the board init are no longer required. The values are taken from the
linux device tree.
The PHY latency settings are derived from the phy-mode property and the
voltage seetings are do
Dear Tom,
2022년 2월 24일 (목) 09:03, Jaehoon Chung 님이 작성:
> On 2/24/22 02:28, Tom Rini wrote:
> > These particular values are not configurable and today we always set
> > CONFIG_SECURE_BL1_ONLY. Move these to where they're used in the code,
> > and drop from the CONFIG namespace.
> >
> > Cc: Minkyu
On 2/22/22 12:28, haibo.c...@nxp.com wrote:
> From: Haibo Chen
>
> After commit f132aab40327 ("Revert "mmc: fsl_esdhc_imx: use
> VENDORSPEC_FRC_SDCLK_ON to control card clock output""), it
> involve issue in mmc_switch_voltage(), because of the special
> design of usdhc.
>
> For FSL_USDHC, it do
On 2/24/22 02:28, Tom Rini wrote:
> These particular values are not configurable and today we always set
> CONFIG_SECURE_BL1_ONLY. Move these to where they're used in the code,
> and drop from the CONFIG namespace.
>
> Cc: Minkyu Kang
> Cc: Jaehoon Chung
> Signed-off-by: Tom Rini
Reviewed-by:
At present fake blobs are created but internally an empty blob is used.
Change it to use the contents of the faked file. Also return whether the
blob was faked, in case the caller needs to know that.
Add a TODO to put fake blobs in their own directory.
Signed-off-by: Simon Glass
---
Changes in
This shadows the patman.tools library so rename it to avoid a pylint
warning.
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/binman/entry.py| 4 ++--
tools/binman/etype/fit.py| 6 +++---
tools/binman/etype/gbb.py| 4 ++--
tools/binman/etype/intel_ifwi.py
At present the entries are read twice, once by the entry_Section class
and once by the FIT implementation. This is harmless but can be confusing
when debugging. Fix it.
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/binman/etype/fit.py | 1 -
1 file changed, 1 deletion(-)
diff --g
Hi Alper,
On Tue, 15 Feb 2022 at 04:53, Alper Nebi Yasak wrote:
>
> On 08/02/2022 21:50, Simon Glass wrote:
> > Split subnode and property processing into separate functions to make
> > the _AddNode() function a little smaller. Tweak a few comments.
> >
> > This does not change any functionality.
The current implementation sets up the FIT entries but then deletes the
'generator' ones so they don't appear in the final image.
This is a bit clumsy. We cannot build the image more than once, since the
generator entries are lost during the first build. Binman requires that
calling BuildSectionDa
This is not used anymore. Drop it.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop patches previously applied
- Add various suggestions from Alper Nebi Yasak
- Add patches to refactor binman's FIT support
Makefile | 3 -
arch/arm/mach-rockchip/make_fit_atf.
Instead of the bash script, use binman to generate the FIT for arm64.
For 32-bit boards, use binman for all images, dropping the intermediate
files.
With this change, only Zynq is now using SPL_FIT_GENERATOR so update the
Kconfig rule accordingly.
Clean up the Makefile to the extent possible. Un
This boards uses SPL_FIT so does not need to support loading a raw image.
Drop it to avoid binman trying to insert a symbol which has no value.
Signed-off-by: Simon Glass
---
(no changes since v1)
configs/evb-rk3288_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/evb-rk32
Unfortunately mkimage gets upset with zero-sized files. Update the
ObtainContents() method to support specifying the size, if a fake blob is
created.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add a patch to allow mkimage to use a non-zero fake-blob size
tools/binman/entry.py
It doesn't make sense to use 'subnode' as a function parameter since it
is just a 'node' so far as the function is concerned. Update two functions
to use 'node' instead.
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/binman/etype/fit.py | 16
1 file changed, 8 inse
At present the fit implementation creates the output tree while
scanning the FIT description. Then it updates the tree later when the
data is known.
This works, but is a bit confusing, since it requires mixing the scanning
code with the generation code, with a fix-up step at the end.
It is actual
Some warnings have crept in, so fix those that are easy to fix.
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/binman/etype/fit.py | 50 +++
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/tools/binman/etype/fit.py b/tools/binman/
Add a new function to handling reporting errors within a particular
subnode of the FIT description. This can be used to make the format of
these errors consistent.
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/binman/etype/fit.py | 33 +
tools/binma
Add the required binman images to replace the Makefile rules which are
currently used. This includes subsuming:
- tpl/u-boot-tpl-rockchip.bin if TPL is enabled
- idbloader.img if either or both of SPL and TPL are enabled
- u-boot.itb if SPL_FIT is enabled
- u-boot-rockchip.bin if SPL i
Some boards need to load an ELF file using the 'loadables' property, but
the file has segments at different memory addresses. This means that it
cannot be supplied as a flat binary.
Allow generating a separate node in the FIT for each segment in the ELF,
with a different load address for each.
Al
Include the rockchip-u-boot.dtsi file with 64-bit boards and enable binman
so that these boards can also use it, rather than using special Makefile
rules and scripts.
This does not change the Makefile nor remove any scripts, but sets it up
so that this is possible.
Signed-off-by: Simon Glass
---
On x86 devices having even a small amount of data can cause an overlap
between regions. For example, bayleybay complains when the intel-vga
region overlaps with u-boot-ucode:
ImagePosOffset Size Name
0080 main-section
ff80 0080 intel-descriptor
The word 'expand' is used for entries which generate subentries. It is
also used for entries that can have an '_expanded' version which is used
to break out its contents.
Rather than talking about expanding an entry's size, use the term
'extending'. It is slightly more precise and avoids the above
Leave the 'expand' term for use by entry types which have an expanded
version of themselves. Rename this method to indicate that it generates
subentries.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add patch to rename ExpandEntries to gen_entries
tools/binman/control.py | 2 +-
to
Update the return value of this function, fix the 'create' typo and
update the documentation for clarity.
Signed-off-by: Simon Glass
Suggested-by: Alper Nebi Yasak
---
Changes in v2:
- Add new patch to tweak collect_contents_to_file() and docs
tools/binman/binman.rst | 25 ++
Rename this function to make it clear that it only reads loadable
segments. Also update the error for missing module to better match the
message emitted by Python.
Signed-off-by: Simon Glass
Suggested-by: Alper Nebi Yasak
---
Changes in v2:
- Add new patch to rename load_segments() and module f
Refactor this to avoid a loop. Also add a test for an empty string.
Signed-off-by: Simon Glass
Suggested-by: Alper Nebi Yasak
---
Changes in v2:
- Add new patch to tidy up implementaiton of AddStringList()
tools/dtoc/fdt.py | 4 +---
tools/dtoc/test_fdt.py | 6 ++
2 files changed, 7
Simplify the code by using the available function.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to use re.fullmatch() to avoid extra check
tools/moveconfig.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
inde
This is not necessary if simpler code is used. Use the split function and
drop the unnecessary []
Signed-off-by: Simon Glass
Suggested-by: Alper Nebi Yasak
---
Changes in v2:
- Add new patch to remove remove_defconfig()
tools/moveconfig.py | 13 +
1 file changed, 1 insertion(+), 1
Fix the help which should refer to TPL, not SPL.
Signed-off-by: Simon Glass
Suggested-by: Alper Nebi Yasak
---
Changes in v2:
- Add new patch to correct Kconfig help for TPL_BINMAN_SYMBOLS
common/spl/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/common/spl/
At present it is not possible to have arguments whic include spaces.
Update the function to only split the args if the property is a single
string. This is a bit inconsistent, but might still be useful.
Signed-off-by: Simon Glass
Suggested-by: Alper Nebi Yasak
---
Changes in v2:
- Add new patch
At present rockchip 64-bit boards make use of a FIT-generator script
written in Python. The script supports splitting an ELF file into several
'loadable' nodes in the FIT. Binman does not current support this feature.
This series adds binman support for ELF splitting. This works by adding a
new 'f
Hi Christoph,
On Wed, 23 Feb 2022 at 02:33, Christoph Niedermaier
wrote:
>
> For a better overview and better comparison sort the initial
> environment as the get_default_env.sh script does. We need
> to preserve the order of equal variable names. So only sort
> by the variable name, and disable
Hi Alper,
On Tue, 22 Feb 2022 at 11:58, Alper Nebi Yasak wrote:
>
> On 21/02/2022 07:40, Simon Glass wrote:
> > On Sat, 19 Feb 2022 at 08:53, Simon Glass wrote:
> >> On Fri, 18 Feb 2022 at 10:34, Alper Nebi Yasak
> >> wrote:
> >>> I can reproduce this and tried a few things, but more issues ju
On Tue, 15 Feb 2022 at 07:27, Felix Brack wrote:
>
> The changes from commit 0dba45864b2a ("arm: Init the debug UART")
> prevent the early debug UART from being initialized correctly.
> To fix this we not just configure the pin multiplexer but add setting up
> early clocks.
>
> Signed-off-by: Feli
Hi Alper,
On Tue, 15 Feb 2022 at 04:52, Alper Nebi Yasak wrote:
>
> On 08/02/2022 21:49, Simon Glass wrote:
> > These symbols are incorrect, meaning that binman cannot find the
> > associated entry. This leads to errors like:
> >
> > binman: Section '/binman/simple-bin': Symbol '_binman_spl_prop_
On Wed, 23 Feb 2022 at 10:29, Tom Rini wrote:
>
> Remove some code, primarily CPM2 related, that is now unused since the
> removal of MPC8540/60ADS.
>
> Fixes 3913191c8a6b ("powerpc: mpc8540ads: mpc8560ads: Drop support for
> MPC8540/60ADS")
> Signed-off-by: Tom Rini
> ---
> arch/powerpc/cpu/mp
On Wed, 23 Feb 2022 at 07:02, Michal Simek wrote:
>
> From: Ashok Reddy Soma
>
> Based on discussion at
> https://lore.kernel.org/r/20200318125003.ga2727...@kroah.com we got
> recommendation to use explicit values for all enums.
>
> So, add explicit values to all pinctrl related enums for readabi
Hi Alper,
On Tue, 15 Feb 2022 at 04:53, Alper Nebi Yasak wrote:
>
> On 08/02/2022 21:50, Simon Glass wrote:
> > Some boards need to load an ELF file using the 'loadables' property, but
> > the file has segments at different memory addresses. This means that it
> > cannot be supplied as a flat bin
Hi Alper,
On Tue, 15 Feb 2022 at 04:53, Alper Nebi Yasak wrote:
>
> On 08/02/2022 21:49, Simon Glass wrote:
> > At present the 'args' property of the mkimage entry type is a string. This
> > makes it difficult to include CONFIG options in that property. In
> > particular, this does not work:
> >
Hi Alper,
On Tue, 15 Feb 2022 at 04:53, Alper Nebi Yasak wrote:
>
> On 08/02/2022 21:49, Simon Glass wrote:
> > Add a new function to add a string list.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > tools/dtoc/fdt.py | 18 ++
> > tools/dtoc/test_fdt.py | 8
>
Hi Alper,
On Tue, 15 Feb 2022 at 04:53, Alper Nebi Yasak wrote:
>
> On 08/02/2022 21:49, Simon Glass wrote:
> > Add a function which reads the segments and the entry address.
> >
> > Also fix a comment nit in the tests while we are here.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > tools/
Hi Alper,
On Tue, 15 Feb 2022 at 04:53, Alper Nebi Yasak wrote:
>
> On 08/02/2022 21:49, Simon Glass wrote:
> > It is helpful to support a string or stringlist containing a list of
> > space-separated arguments, for example:
> >
> >args = "-n fred", "-a", "123";
> >
> > This resolves to the l
Hi Felix,
On Mon, 14 Feb 2022 at 09:57, Felix Brack wrote:
>
> The changes from commit 0dba45864b2a ("arm: Init the debug UART")
> prevent the early debug UART from being initialized correctly.
> By adding a new SoC specific early UART initialization function this
SoC-specific
You need the hyph
On Wed, Feb 23, 2022 at 5:13 PM Jayson Reis wrote:
>
> Hey there folks,
Good Evening,
> I just have at hands a board from Radxa, called Rock 3-A which has a rockchip
> RK3568, and they do provide a version of u-boot but rather old.
> As a fun side project, I am trying to port all things to the
Hey there folks,
I just have at hands a board from Radxa, called Rock 3-A which has a rockchip
RK3568, and they do provide a version of u-boot but rather old.
As a fun side project, I am trying to port all things to the current master.
I am still at really early stages, got a minimum .config that
On Wed, Feb 23, 2022 at 06:20:03AM +0100, Marek Vasut wrote:
> This is likely the last bigger series for this cycle:
>
> The following changes since commit 17a0dc6abfdbf392f6a27074f2633608038c4221:
>
> Merge branch '2022-02-21-platform-updates' (2022-02-21 08:53:24 -0500)
>
> are available in
On Tue, Feb 22, 2022 at 04:45:30PM -0700, Simon Glass wrote:
> Hi Tom,
>
> https://source.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/11053
>
>
> The following changes since commit 17a0dc6abfdbf392f6a27074f2633608038c4221:
>
> Merge branch '2022-02-21-platform-updates' (2022-02-21 08:53:
On 2/23/22 16:06, Michal Simek wrote:
From: T Karthik Reddy
When usb PHY initialization is done, the PHY need to be reset.
Signed-off-by: T Karthik Reddy
Signed-off-by: Michal Simek
---
drivers/usb/dwc3/Kconfig| 2 +-
drivers/usb/dwc3/dwc3-generic.c | 28
On 2/23/22 15:56, Michal Simek wrote:
When usb3-phy label is found, PHY driver is called and serdes line is
initialized. This is preparation for serdes/psgtr driver to configure GT
lines based on description in DT.
Signed-off-by: Michal Simek
---
drivers/usb/dwc3/dwc3-generic.c | 17
Remove some code, primarily CPM2 related, that is now unused since the
removal of MPC8540/60ADS.
Fixes 3913191c8a6b ("powerpc: mpc8540ads: mpc8560ads: Drop support for
MPC8540/60ADS")
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc85xx/Makefile | 2 -
arch/powerpc/cpu/mpc85xx/commproc.c
These particular values are not configurable and today we always set
CONFIG_SECURE_BL1_ONLY. Move these to where they're used in the code,
and drop from the CONFIG namespace.
Cc: Minkyu Kang
Cc: Jaehoon Chung
Signed-off-by: Tom Rini
---
arch/arm/mach-exynos/spl_boot.c | 30 ++
This converts the following to Kconfig:
CONFIG_BOARD_COMMON
Signed-off-by: Tom Rini
---
arch/arm/mach-exynos/Kconfig| 4
include/configs/espresso7420.h | 2 --
include/configs/exynos4-common.h| 2 --
include/configs/exynos5-dt-common.h | 2 --
include/configs/exynos78x0-
This converts the following to Kconfig:
CONFIG_BTB
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc85xx/Kconfig | 10 ++
include/configs/MPC8548CDS.h | 1 -
include/configs/P1010RDB.h | 1 -
include/configs/P2041RDB.h | 1 -
include/configs/T102xRDB.h | 1 -
From: T Karthik Reddy
slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by
writing and reading corresponding gpo bit value into its data register.
Signed-off-by: T Karthik Reddy
Signed-off-by: Michal Simek
---
MAINTAINERS | 1 +
drivers/gpio/Kconfig
Active level is low that's why it should be fixed.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 2 +-
arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
b/arch/arm/dts/zyn
The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable
access to DP. Overlay is sent when cls command is called and for that IP
has to be enabled in carrier cards.
And IP needs to be also enabled in SOM dt because with DTB reselection new
DT is not parsed in pre reloc U-Boot in
Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the ph
With limited low level configuration done via psu-init only IPs connected
on SOM are initialized and configured. All IPs connected to carrier card
are not initialized. There is a need to do proper reset, pin configuration
and also clock setting.
The patch targets the last part which is setting up p
Based on upstream discussion based on link below usb hub should be placed
to usb node directly as child node. Based on this Linux driver was updated
and the same change should be also reflected in kv260 board.
Link:
https://lore.kernel.org/all/cal_jsqjzbbu+uxqundzwg-uv0pasng55026ptwhkr5wqtxc...@m
Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-clk-ccf.dtsi | 4
arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 2 ++
arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 2 ++
3 files changed, 8 insert
Hi,
kv-g boards have been moved to new model where u-boot configures a lot of
things at run time which requires updates in DTs especially in connection
to enabling clocks for these platforms.
There are also small adjustment to match the latest state.
Thanks,
Michal
Michal Simek (6):
arm64: zy
From: T Karthik Reddy
When usb PHY initialization is done, the PHY need to be reset.
Signed-off-by: T Karthik Reddy
Signed-off-by: Michal Simek
---
drivers/usb/dwc3/Kconfig| 2 +-
drivers/usb/dwc3/dwc3-generic.c | 28
2 files changed, 29 insertions(+), 1
When usb3-phy label is found, PHY driver is called and serdes line is
initialized. This is preparation for serdes/psgtr driver to configure GT
lines based on description in DT.
Signed-off-by: Michal Simek
---
drivers/usb/dwc3/dwc3-generic.c | 17 +
1 file changed, 17 insertions(
Display Port (DP) has own dma driver that's why add this skeleton driver
only for handling power domain setting and send configuration object to
PMUFW to enable it.
Signed-off-by: Michal Simek
---
drivers/dma/Kconfig| 7 +++
drivers/dma/Makefile | 1 +
drivers/dma/xilinx_dpd
The reason for this driver is to use call power management driver to enable
it in PMUFW. There is missing functionality now but should be added in
near future.
Signed-off-by: Michal Simek
---
drivers/video/Kconfig| 8 +
drivers/video/Makefile | 1 +
drivers/video/zynqmp_dpsu
Hi,
add skeleton drivers for display port and display port DMA. The purpose of
having sketon drivers is to use the whole power domain infrastructure is
used. Without driver power domain driver is not asking for enabling power
for these devices. That's why having simple driver is necessary because
On Tue, 22 Feb 2022 21:47:57 +0100
Pali Rohár wrote:
> On Thursday 17 February 2022 15:31:10 Marek Behún wrote:
> > > + * But this command does not provide access to lock bit.
> > > + */
> > > + if (word < 2) {
> > > + in[0] = row;
> > > + in[1] = word * 32;
> > > + res
Ethernet phy like dp83867 is using strapping resistors to setup PHY
address. On Xilinx boards strapping is setup on wires which are connected
to SOC where internal pull ups/downs influnce phy address. That's why there
is a need to setup pins properly (via pinctrl driver for example) and then
perfor
Remove static return type for phy_device_create() to avoid file scope for
this function. Also add required prototype in phy.h.
Signed-off-by: Michal Simek
Signed-off-by: T Karthik Reddy
---
drivers/net/phy/phy.c | 6 +++---
include/phy.h | 13 +
2 files changed, 16 inserti
Add new function to get ethernet phy id from compatible property
of the mdio phy node.
Signed-off-by: Michal Simek
Signed-off-by: T Karthik Reddy
---
drivers/core/ofnode.c | 36
include/dm/ofnode.h | 13 +
2 files changed, 49 insertions(+)
di
Hi,
this series is adding support for ethernet-phy-id with reset gpio support.
There is another series related to DM_ETH_PHY but it is missing creating
phy devices based on decoded phy IDs from compatible string.
We would like to adopt DM_ETH_PHY in our driver but still this series can
be useful f
From: Ashok Reddy Soma
Add support for dynamic configuration which will takes care of
configuring the SD secure space configuration registers using firmware
APIs, performing SD reset assert and deassert.
High level sequence:
- Check for the PM dynamic configuration support, if no error proceed
From: Ashok Reddy Soma
Add firmware API's to set SD configuration and to check if a purticular
function is supported.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
drivers/firmware/firmware-zynqmp.c | 51 ++
include/zynqmp_firmware.h |
From: Ashok Reddy Soma
Most of the frequencies are not rounded up to a proper number.
When we need to devide these frequencies to get a number for example
frequency in Mhz, we see it as one less than the actual intended value.
Ex: If we want to get Mhz from frequency 19994hz, we will calculat
Hi,
with SOM boards low level sdhci setting is not fully done. There are
additional registers which are normally programmed via psu_init() but in
this case they are not initialized. Information can be taken from DT and
via firmware interface that values can be setup and that's exactly what
this se
From: Ashok Reddy Soma
Update enum pm_ioctl_id with more IOCTLs.
Add enum pm_sd_config_type to support dynamic sd configuration.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
include/zynqmp_firmware.h | 23 +++
1 file changed, 23 insertions(+)
diff --gi
On Wed, 23 Feb 2022 14:21:40 +0100
Pali Rohár wrote:
> If Armada 37xx watchdog is started before U-Boot then CNTR_CTRL_ACTIVE bit
> is set, U-Boot armada-37xx-wdt.c driver fails to initialize and so U-Boot
> is unable to use or kick this watchdog.
>
> Do not check for CNTR_CTRL_ACTIVE bit and al
From: Ashok Reddy Soma
Add pinctrl driver for Xilinx ZynqMP SOC. This driver is compatible with
linux device tree parameters for configuring pinmux and pinconf.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
MAINTAINERS | 1 +
drivers/pinctrl/Kconfig
From: Ashok Reddy Soma
Xilinx ZynqMP SOC can set 6 parameters for its pins. pinmux status
command will print the status of these parameters for each pin. But
current print buffer length is only 40 characters long, increase it
to 80 to print all the parameters.
Signed-off-by: Ashok Reddy Soma
Si
From: Ashok Reddy Soma
Card detect state stable issue is observed on few ZynqMP boards(SOM),
so enable the workaround 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' for ZynqMP platforms also.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
From: Ashok Reddy Soma
The timeout used in 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' workaround is 1000ms at a
granularity of 1msec. Change it to 1usec, to not waste time incase the
cd is stable.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Sim
From: Ashok Reddy Soma
In the workaround added with 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' the timeout variable has post
decrement. Whenever timeout happens, this post decrement is making
timeout=0x, so timeout error print and return statement
Hi,
we found 3 issues recently with this driver which needs to be fixed.
Thanks,
Michal
Ashok Reddy Soma (3):
mmc: zynq_sdhci: Fix timeout issue
mmc: zynq_sdhci: Change granularity of timeout to 1us
mmc: zynq_sdhci: Enable card detect workaround for ZynqMP
drivers/mmc/zynq_sdhci.c | 9 +
From: Michael Walle
Recently, a driver for the ARM Primecell PL35x static memory controller
(including NAND controller) was added in linux. Add the corresponding
device tree node.
Also update cfi-flash registers and location in DT.
Signed-off-by: Michael Walle
Signed-off-by: Amit Kumar Mahapat
New binding changed node name from flash@e100 to nand-controller@0,0
which should be reflected in the driver. Both names are supported for
backward compatibility.
Signed-off-by: Michal Simek
---
drivers/mtd/nand/raw/zynq_nand.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
Hi,
recently PL35x driver was upstreamed and there were some changes in DT
binding which should be reflected here too. That's why sending these two
patches to update the driver and the way how nand and nor memories are
described in DT.
Thanks,
Michal
Michael Walle (1):
ARM: dts: zynq: add NAN
From: Ashok Reddy Soma
Based on discussion at
https://lore.kernel.org/r/20200318125003.ga2727...@kroah.com we got
recommendation to use explicit values for all enums.
So, add explicit values to all pinctrl related enums for readability.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Sim
From: T Karthik Reddy
This reverts commit dfbe492edef421de09617dc26805fc428440924e.
Analog bus control register should be programmed in SPL only. This commit
3414712ba8a ("arm64: zynqmp: Writing correct value to ANALOG_BUS") is
programming the same. So revert this commit.
Signed-off-by: T Karthi
From: Ashok Reddy Soma
Add support to read MAC addresses from mac address multirecord.
Check if multi record is found, then jump to mac address multirecord by
comparing the record type field. If it matches mac address
multirecord(0xD2), then copy mac addresses.
Copy these read MAC address in xil
From: Ashok Reddy Soma
In board_late_init_xilinx() eth*addr are updated from the values read from
eeprom. Ideally the MAC addresses are updated sequencially. So if any
MAC address is invalid, it means there are no further valid values.
So optimise this logic by replacing continue with break.
Sig
From: Ashok Reddy Soma
Fill fru table with 0's before using it, to avoid junk data.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
board/xilinx/common/fru_ops.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/xilinx/common/fru_ops.c b/board/xilinx/c
From: Ashok Reddy Soma
fru_checksum function is simply adding all the bytes and returning the
sum. If the data passed to this function is all zero's then it will
return 0, and the functions calling this api will assume that checksum
is correct. Ideally this is not good. Fix this by returning erro
Hi,
the first 3 patches are fixes in current fru implementation to make sure
that code is not working with incorrect data or not waste time.
The last patch adds decoder for xilinx multirecord which stores MAC
addresses for DUT.
Thanks,
Michal
Ashok Reddy Soma (4):
fru: ops: Clear fru table b
The Ethernet controller and PHY use the device tree info to
configure themselves, so it's not necessary to manually do it
in the board file. This permits the removal of a bunch of headers
as well.
Signed-off-by: Adam Ford
diff --git a/board/beacon/imx8mm/imx8mm_beacon.c
b/board/beacon/imx8mm/i
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