On 28.07.21 11:10, Jan Kiszka wrote:
> On 30.01.20 09:05, Roger Quadros wrote:
>> NB0 is bridge to SRAM and NB1 is bridge to DDR.
>>
>> To ensure that SRAM transfers are not stalled due to
>> delays during DDR refreshes, SRAM traffic should be higher
>> priority (threadmap=2) than DDR traffic (thre
> From: Marek Vasut
> Sent: Monday, August 16, 2021 2:13 AM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Atish Patra
> ; Leo Yu-Chi Liang(梁育齊) ; Rick
> Jian-Zhi Chen(陳建志) ; Simon Goldschmidt
> ; Tom Rini
> Subject: [PATCH 09/14] lmb: riscv: Add arch_lmb_reserve()
>
> Add arch_lmb_reserve() i
> From: Marek Vasut
> Sent: Monday, August 16, 2021 2:13 AM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Rick Jian-Zhi Chen(陳建志)
> ; Simon Goldschmidt ;
> Tom Rini
> Subject: [PATCH 08/14] lmb: nds32: Add arch_lmb_reserve()
>
> Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic
> From: Zong Li
> Sent: Wednesday, September 01, 2021 3:02 PM
> To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊)
> ; bmeng...@gmail.com; sean...@gmail.com;
> green@sifive.com; paul.walms...@sifive.com; s...@chromium.org;
> u-boot@lists.denx.de
> Cc: Zong Li
> Subject: [PATCH v5 2/5] com
On Tue, Aug 31, 2021 at 08:10:31AM +0200, Heinrich Schuchardt wrote:
> On 8/31/21 4:46 AM, AKASHI Takahiro wrote:
> > Modify command line arguments at mkeficapsule as the syntax was
> > a bit modified in the previous commit.
> >
> > Signed-off-by: AKASHI Takahiro
> > ---
> > test/py/tests/test_
On Fri, Aug 13, 2021 at 05:25:00PM +0100, Paul Barker wrote:
> When printing full help output from a tool, we should be able to handle
> a PAGER variable which includes arguments, e.g. PAGER='less -F'.
>
> Signed-off-by: Paul Barker
This results in this CI failure:
https://source.denx.de/u-boot
On Wed, Jul 28, 2021 at 05:34:41PM -0700, Donald Chan wrote:
> If the 'keyfile' (-G) argument is used, there is little value to require
> 'keydir' (-k) argument since the public key can also be extracted from the
> private key itself.
>
> Signed-off-by: Donald Chan
This breaks the "vboot" tests
On Wed, Sep 01, 2021 at 11:34:50PM +0200, Michael Walle wrote:
> Am 2021-09-01 12:29, schrieb Vladimir Oltean:
> > On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> > > - pcie1: pcie@340 {
> > > -compatible = "fsl,ls-pcie", "fsl,ls1028-pcie",
> > > "s
On Wed, Sep 01, 2021 at 11:44:52PM +0200, Pali Rohár wrote:
> On Wednesday 01 September 2021 17:33:57 Tom Rini wrote:
> > On Wed, Sep 01, 2021 at 11:28:54PM +0200, Pali Rohár wrote:
> > > On Wednesday 01 September 2021 17:17:06 Tom Rini wrote:
> > > > On Wed, Sep 01, 2021 at 11:05:45PM +0200, Pali
On Wednesday 01 September 2021 23:44:52 Pali Rohár wrote:
> On Wednesday 01 September 2021 17:33:57 Tom Rini wrote:
> > On Wed, Sep 01, 2021 at 11:28:54PM +0200, Pali Rohár wrote:
> > > On Wednesday 01 September 2021 17:17:06 Tom Rini wrote:
> > > > On Wed, Sep 01, 2021 at 11:05:45PM +0200, Pali Ro
On Wednesday 01 September 2021 17:33:57 Tom Rini wrote:
> On Wed, Sep 01, 2021 at 11:28:54PM +0200, Pali Rohár wrote:
> > On Wednesday 01 September 2021 17:17:06 Tom Rini wrote:
> > > On Wed, Sep 01, 2021 at 11:05:45PM +0200, Pali Rohár wrote:
> > > > On Wednesday 01 September 2021 16:59:09 Tom Rin
On Wed, Sep 01, 2021 at 03:30:59PM +0200, Michael Walle wrote:
> Am 2021-09-01 14:57, schrieb Vladimir Oltean:
> > On Wed, Sep 01, 2021 at 02:38:15PM +0200, Michael Walle wrote:
> > > Am 2021-09-01 14:21, schrieb Vladimir Oltean:
> > > > On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote
Am 2021-09-01 12:29, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
- pcie1: pcie@340 {
- compatible = "fsl,ls-pcie", "fsl,ls1028-pcie",
"snps,dw-pcie";
- reg = <0x00 0x0340 0x0 0x80
On Wed, Sep 01, 2021 at 11:28:54PM +0200, Pali Rohár wrote:
> On Wednesday 01 September 2021 17:17:06 Tom Rini wrote:
> > On Wed, Sep 01, 2021 at 11:05:45PM +0200, Pali Rohár wrote:
> > > On Wednesday 01 September 2021 16:59:09 Tom Rini wrote:
> > > > On Mon, Aug 02, 2021 at 03:18:27PM +0200, Pali
On Wednesday 01 September 2021 17:17:06 Tom Rini wrote:
> On Wed, Sep 01, 2021 at 11:05:45PM +0200, Pali Rohár wrote:
> > On Wednesday 01 September 2021 16:59:09 Tom Rini wrote:
> > > On Mon, Aug 02, 2021 at 03:18:27PM +0200, Pali Rohár wrote:
> > >
> > > > Including timestamp.h (either directly o
On Wed, Sep 01, 2021 at 11:05:45PM +0200, Pali Rohár wrote:
> On Wednesday 01 September 2021 16:59:09 Tom Rini wrote:
> > On Mon, Aug 02, 2021 at 03:18:27PM +0200, Pali Rohár wrote:
> >
> > > Including timestamp.h (either directly or transitionally) cause build
> > > system to recompile binaries a
On Wednesday 01 September 2021 16:59:09 Tom Rini wrote:
> On Mon, Aug 02, 2021 at 03:18:27PM +0200, Pali Rohár wrote:
>
> > Including timestamp.h (either directly or transitionally) cause build
> > system to recompile binaries at every 'make' run. This has disadvantage
> > in U-Boot development as
On Mon, Aug 02, 2021 at 03:18:27PM +0200, Pali Rohár wrote:
> Including timestamp.h (either directly or transitionally) cause build
> system to recompile binaries at every 'make' run. This has disadvantage
> in U-Boot development as for every small change 'make' recompiles lot of
> other irrelevan
From: Ming Liu
Move CONFIG_BOOTCOMMAND definition from colibri_imx7.h to
colibri_imx7_defconfig, to be more flexible, for instance, it could
be overridden by merge_config.sh script.
Signed-off-by: Ming Liu
---
configs/colibri_imx7_defconfig | 3 ++-
include/configs/colibri_imx7.h | 2 --
2 fil
From: Ming Liu
Move CONFIG_BOOTCOMMAND definition from colibri-imx6ull.h to
colibri-imx6ull_defconfig, to be more flexible, for instance, it could
be overridden by merge_config.sh script.
Signed-off-by: Ming Liu
---
configs/colibri-imx6ull_defconfig | 3 ++-
include/configs/colibri-imx6ull.h |
Hi Patrick,
On 8/31/21 12:24 PM, Patrick DELAUNAY wrote:
Hi,
On 8/26/21 11:42 PM, Alexandru Gagniuc wrote:
OP-TEE does not take a devicetree for its own use. However, it does
pass the devicetree to the normal world OS. In most cases that will
be some other devicetree-bearing platform, such as
Am 2021-09-01 13:27, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
sata: sata@320 {
compatible = "fsl,ls1028a-ahci";
- reg = <0x0 0x320 0x0 0x1 /* ccsr sata base
*/
-
On 9/1/21 3:05 PM, Oleksandr Suvorov wrote:
There are trivial typos in the Kconfig file. Fixed them.
Also, fixed grammar in the descriptions with typos.
Fixes: d56b4b1974 ("configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and
CMD_UBIFS")
Fixes: 7264f2928b ("spl: fit: Eanble GZIP support f
On Wed, 2021-09-01 at 16:33 +0200, liu.min...@gmail.com wrote:
> From: Ming Liu
Please note that we do have a patch set introducing Colibri iMX6ULL 1GB (eMMC)
support [1] in-flight and you
likely would need to re-base on top of that one. Thanks!
[1] https://marc.info/?l=u-boot&m=162911970822560
From: Ming Liu
Move CONFIG_BOOTCOMMAND definition from colibri_imx7.h to
colibri_imx7_defconfig, to be more flexible, for instance, it could
be overridden by merge_config.sh script.
Signed-off-by: Ming Liu
---
configs/colibri_imx7_defconfig | 3 ++-
include/configs/colibri_imx7.h | 2 --
2 fil
From: Ming Liu
Move CONFIG_BOOTCOMMAND definition from colibri-imx6ull.h to
colibri-imx6ull_defconfig, to be more flexible, for instance, it could
be overridden by merge_config.sh script.
Signed-off-by: Ming Liu
---
configs/colibri-imx6ull_defconfig | 3 ++-
include/configs/colibri-imx6ull.h |
On 01.09.21 13:29, Tom Rini wrote:
On Wed, Sep 01, 2021 at 07:27:54AM +0200, Stefan Roese wrote:
Hi Tom,
On 31.08.21 14:43, Tom Rini wrote:
On Tue, Aug 31, 2021 at 07:51:29AM +0200, Stefan Roese wrote:
Hi Tom,
On 21.08.21 19:50, Tom Rini wrote:
We have a number of CONFIG symbols to express
On Wed, Sep 01, 2021 at 11:24:13AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the next batch of Marvell MVEBU related patches. Here the
> summary log of the most important parts:
>
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Sun, Aug 01, 2021 at 11:52:16PM +0300, Matwey V. Kornilov wrote:
> BTRFS volume consists of a number of subvolumes which can be mounted
> separately
> from each other. The top-level subvolume always exists even if no subvolumes
> were created manually. A subvolume can be denoted as the default
On Tue, Aug 31, 2021 at 05:07:33PM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the following watchdog related patches:
>
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On 2021/9/1 下午9:48, Matthias Brugger wrote:
On 01/09/2021 13:36, Tom Rini wrote:
On Wed, Sep 01, 2021 at 01:28:30PM +0200, Matthias Brugger wrote:
Hi Tom,
On 02/08/2021 01:06, Qu Wenruo wrote:
On 2021/8/2 上午4:52, Matwey V. Kornilov wrote:
BTRFS volume consists of a number of subvolume
On 01/09/2021 13:36, Tom Rini wrote:
> On Wed, Sep 01, 2021 at 01:28:30PM +0200, Matthias Brugger wrote:
>> Hi Tom,
>>
>> On 02/08/2021 01:06, Qu Wenruo wrote:
>>>
>>>
>>> On 2021/8/2 上午4:52, Matwey V. Kornilov wrote:
BTRFS volume consists of a number of subvolumes which can be mounted
>>>
Am 2021-09-01 14:57, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 02:38:15PM +0200, Michael Walle wrote:
Am 2021-09-01 14:21, schrieb Vladimir Oltean:
> On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote:
> > Am 2021-09-01 13:55, schrieb Vladimir Oltean:
> > > On Wed, Sep 01, 2021
There are trivial typos in the Kconfig file. Fixed them.
Also, fixed grammar in the descriptions with typos.
Fixes: d56b4b1974 ("configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and
CMD_UBIFS")
Fixes: 7264f2928b ("spl: fit: Eanble GZIP support for image decompression")
Signed-off-by: Oleksandr
On Wed, Sep 01, 2021 at 02:46:09PM +0200, Pali Rohár wrote:
> On Wednesday 01 September 2021 08:41:10 Tom Rini wrote:
> > On Wed, Sep 01, 2021 at 02:40:21PM +0200, Pali Rohár wrote:
> > > On Wednesday 01 September 2021 08:35:33 Tom Rini wrote:
> > > > On Wed, Sep 01, 2021 at 02:32:43PM +0200, Pali
On Wed, Sep 01, 2021 at 02:38:15PM +0200, Michael Walle wrote:
> Am 2021-09-01 14:21, schrieb Vladimir Oltean:
> > On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote:
> > > Am 2021-09-01 13:55, schrieb Vladimir Oltean:
> > > > On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote
On Wed, Sep 01, 2021 at 08:41:10AM -0400, Tom Rini wrote:
> On Wed, Sep 01, 2021 at 02:40:21PM +0200, Pali Rohár wrote:
> > On Wednesday 01 September 2021 08:35:33 Tom Rini wrote:
> > > On Wed, Sep 01, 2021 at 02:32:43PM +0200, Pali Rohár wrote:
> > > > On Wednesday 01 September 2021 08:14:10 Tom R
Hello Heinrich,
On Tue, Aug 31, 2021 at 8:01 PM Heinrich Schuchardt wrote:
>
>
>
> On 8/31/21 1:58 PM, Oleksandr Suvorov wrote:
> > There are trivial typos in the Kconfig file. Fix them.
> >
> > Fixes: d56b4b1974 ("configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and
> > CMD_UBIFS")
> > Fixes
On Wednesday 01 September 2021 08:41:10 Tom Rini wrote:
> On Wed, Sep 01, 2021 at 02:40:21PM +0200, Pali Rohár wrote:
> > On Wednesday 01 September 2021 08:35:33 Tom Rini wrote:
> > > On Wed, Sep 01, 2021 at 02:32:43PM +0200, Pali Rohár wrote:
> > > > On Wednesday 01 September 2021 08:14:10 Tom Rin
On Wed, Sep 01, 2021 at 02:40:21PM +0200, Pali Rohár wrote:
> On Wednesday 01 September 2021 08:35:33 Tom Rini wrote:
> > On Wed, Sep 01, 2021 at 02:32:43PM +0200, Pali Rohár wrote:
> > > On Wednesday 01 September 2021 08:14:10 Tom Rini wrote:
> > > > On Wed, Sep 01, 2021 at 11:12:58AM +0200, Stefa
On Wednesday 01 September 2021 08:35:33 Tom Rini wrote:
> On Wed, Sep 01, 2021 at 02:32:43PM +0200, Pali Rohár wrote:
> > On Wednesday 01 September 2021 08:14:10 Tom Rini wrote:
> > > On Wed, Sep 01, 2021 at 11:12:58AM +0200, Stefan Roese wrote:
> > >
> > > > Hi Pali,
> > > >
> > > > On 16.08.21
Am 2021-09-01 14:21, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote:
Am 2021-09-01 13:55, schrieb Vladimir Oltean:
> On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote:
> > Yes but that is on purpose. In the current u-boot device tree, it was
>
On Wed, Sep 01, 2021 at 02:32:43PM +0200, Pali Rohár wrote:
> On Wednesday 01 September 2021 08:14:10 Tom Rini wrote:
> > On Wed, Sep 01, 2021 at 11:12:58AM +0200, Stefan Roese wrote:
> >
> > > Hi Pali,
> > >
> > > On 16.08.21 12:02, Pali Rohár wrote:
> > > > Like for all other mvebu platforms wi
On Wednesday 01 September 2021 08:14:10 Tom Rini wrote:
> On Wed, Sep 01, 2021 at 11:12:58AM +0200, Stefan Roese wrote:
>
> > Hi Pali,
> >
> > On 16.08.21 12:02, Pali Rohár wrote:
> > > Like for all other mvebu platforms with CONFIG_SYS_TCLK macro, define
> > > CONFIG_SYS_REF_CLK macro for a37xx
On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote:
> Am 2021-09-01 13:55, schrieb Vladimir Oltean:
> > On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote:
> > > Yes but that is on purpose. In the current u-boot device tree, it was
> > > disabled, but the boards reenabled them
On Wed, Sep 01, 2021 at 11:12:58AM +0200, Stefan Roese wrote:
> Hi Pali,
>
> On 16.08.21 12:02, Pali Rohár wrote:
> > Like for all other mvebu platforms with CONFIG_SYS_TCLK macro, define
> > CONFIG_SYS_REF_CLK macro for a37xx with base reference clock value which is
> > read from latched reset r
Am 2021-09-01 13:55, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote:
Yes but that is on purpose. In the current u-boot device tree, it was
disabled, but the boards reenabled them again. So it didn't matter.
I want to have a specific sync point (that is th
On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote:
> Yes but that is on purpose. In the current u-boot device tree, it was
> disabled, but the boards reenabled them again. So it didn't matter.
>
> I want to have a specific sync point (that is the v5.14 tag) for the
> .dtsi. At least wh
Am 2021-09-01 13:24, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
- usb0: usb3@310 {
- compatible = "fsl,layerscape-dwc3";
- reg = <0x0 0x310 0x0 0x1>;
- interru
Am 2021-09-01 13:43, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
- pcie1: pcie@340 {
- ranges = <0x8100 0x0 0x 0x80 0x0002 0x0
0x0001 /* downstream I/O */
- 0x8200 0x0 0x4000 0x80 0x4000 0
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> - pcie1: pcie@340 {
> -ranges = <0x8100 0x0 0x 0x80 0x0002
> 0x0 0x0001 /* downstream I/O */
> -0x8200 0x0 0x4000 0x80 0x4000
On Wed, Sep 01, 2021 at 01:28:30PM +0200, Matthias Brugger wrote:
> Hi Tom,
>
> On 02/08/2021 01:06, Qu Wenruo wrote:
> >
> >
> > On 2021/8/2 上午4:52, Matwey V. Kornilov wrote:
> >> BTRFS volume consists of a number of subvolumes which can be mounted
> >> separately
> >> from each other. The top
On Wed, Sep 01, 2021 at 07:27:54AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> On 31.08.21 14:43, Tom Rini wrote:
> > On Tue, Aug 31, 2021 at 07:51:29AM +0200, Stefan Roese wrote:
> > > Hi Tom,
> > >
> > > On 21.08.21 19:50, Tom Rini wrote:
> > > > We have a number of CONFIG symbols to express the f
Hi Tom,
On 02/08/2021 01:06, Qu Wenruo wrote:
>
>
> On 2021/8/2 上午4:52, Matwey V. Kornilov wrote:
>> BTRFS volume consists of a number of subvolumes which can be mounted
>> separately
>> from each other. The top-level subvolume always exists even if no subvolumes
>> were created manually. A sub
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> sata: sata@320 {
> compatible = "fsl,ls1028a-ahci";
> - reg = <0x0 0x320 0x0 0x1/* ccsr sata
> base */
> -0x7 0x100520 0x0 0
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> - usb0: usb3@310 {
> - compatible = "fsl,layerscape-dwc3";
> - reg = <0x0 0x310 0x0 0x1>;
> - interrupts = ;
> - dr_mode = "host";
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> - pcie1: pcie@340 {
> -compatible = "fsl,ls-pcie", "fsl,ls1028-pcie",
> "snps,dw-pcie";
> -reg = <0x00 0x0340 0x0 0x8
> -0x00 0x0
DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
commit 49b10cb49262 ("gpio: fixes for gpio-hog support").
And furthermore, gpio_hog_probe_all() is already called in board_r.c.
So gpio_hog_probe() can be removed from stm32mp1.c.
Signed-off-by: Patrice Chotard
Cc: Marek Vasut
On Wed, Sep 01, 2021 at 10:55:17AM +0200, Michael Walle wrote:
> Update the labels of the nodes to match the kernel ones.
>
> Signed-off-by: Michael Walle
> ---
Reviewed-by: Vladimir Oltean
Tested-by: Vladimir Oltean
On Wed, Sep 01, 2021 at 10:55:15AM +0200, Michael Walle wrote:
> - fspi: flexspi@20c {
> - compatible = "nxp,lx2160a-fspi";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x0 0x20c 0x0 0x1>,
> - <0x0 0x20
DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
commit 49b10cb49262 ("gpio: fixes for gpio-hog support").
And furthermore, gpio_hog_probe_all() is already called in board_r.c.
So gpio_hog_probe() can be removed from stm32mp1.c.
Signed-off-by: Patrice Chotard
---
board/st/s
Hi Tom,
please pull the next batch of Marvell MVEBU related patches. Here the
summary log of the most important parts:
- mvebu: a38x: Define supported UART baudrates (Pali)
- kwbimage: Misc improvements (Pali)
- espressobin/turris_
Hey Simon,
On Thu, Aug 26, 2021 at 9:00 PM Tony Dinh wrote:
>
> Hi Simon,
>
> On Tue, Aug 17, 2021 at 9:09 AM Simon Glass wrote:
> >
> > Hi Tony,
> >
> > On Sun, 15 Aug 2021 at 15:28, Tony Dinh wrote:
> > >
> > > Hi Simon,
> > >
> > > On Sun, Aug 15, 2021 at 7:10 AM Simon Glass wrote:
> > > >
On 22.08.21 12:31, Pali Rohár wrote:
Support for register headers in v1 images was implemented in commit
02ba70ad6822 ("tools: kwbimage: Add support for DATA command also for v1
images"). So remove old comment.
Signed-off-by: Pali Rohár
Fixes: 02ba70ad6822 ("tools: kwbimage: Add support for DAT
On 17.08.21 07:11, Heinrich Schuchardt wrote:
image_get_csk_index() may return -1 in case of an error. Don't use this
value as index.
This resolves Coverity CID 338488
Memory - illegal accesses (NEGATIVE_RETURNS)
Signed-off-by: Heinrich Schuchardt
Applied to u-boot-marvell/master
Thanks,
S
On 17.08.21 07:03, Heinrich Schuchardt wrote:
Always check the return value of fopen().
This resolves Coverity CID 338491:
Null pointer dereferences (NULL_RETURNS)
Signed-off-by: Heinrich Schuchardt
Applied to u-boot-marvell/master
Thanks,
Stefan
---
tools/kwbimage.c | 11 +++
On 16.08.21 15:19, Marek Behún wrote:
Disable MCU watchdog in board_late_init() instead of board_init(), so
that it is disabled after U-Boot enables SOC watchdog instead of before.
This way there is no window when the board is vulnerable.
Signed-off-by: Marek Behún
Applied to u-boot-marvell/m
On 16.08.21 15:19, Marek Behún wrote:
When booting over UART, sending U-Boot proper may take too much time and
MCU watchdog will reset the board before U-Boot proper is loaded.
Better disable MCU watchdog in SPL when booting over UART.
Signed-off-by: Marek Behún
Applied to u-boot-marvell/mas
On 16.08.21 15:19, Marek Behún wrote:
We do not need to guard code in board_init() and board_late_init()
functions with the CONFIG_SPL_BUILD macro, since these functions are not
called in SPL.
Signed-off-by: Marek Behún
Applied to u-boot-marvell/master
Thanks,
Stefan
---
board/CZ.NIC/tur
On 16.08.21 15:19, Marek Behún wrote:
Move the function get_boot_device() from spl.c to cpu.c.
Make it visible, so that it may be used from other files.
Signed-off-by: Marek Behún
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/arm/mach-mvebu/cpu.c | 60 +++
Hi Lukasz
Can you add your reviewed-by on this patch ?
This patch, and the other 4 patches of this serie, are still blocked on
patchwork since April.
Thanks ;-)
Patrice
On 4/19/21 11:45 AM, Patrice Chotard wrote:
> Add an entry in usb_gadget_controller_number() for the DWC2
> gadget controller.
Hi Pali,
On 16.08.21 12:02, Pali Rohár wrote:
Like for all other mvebu platforms with CONFIG_SYS_TCLK macro, define
CONFIG_SYS_REF_CLK macro for a37xx with base reference clock value which is
read from latched reset register.
Replace all usages of get_ref_clk() function by this CONFIG_SYS_REF_C
On 13.08.21 13:58, Pali Rohár wrote:
Armada 37xx serial driver does not use CONFIG_DEBUG_UART_SHIFT.
So do not define any bogus value for CONFIG_DEBUG_UART_SHIFT option in any
Armada 37xx defconfig file.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
confi
On 13.08.21 13:56, Pali Rohár wrote:
PCIe-based NVMe SSD disks in M.2 2230/2242/2260 form-factor can be
connected to Turris Omnia mPCIe slot via passive M.2 <--> mPCIe adapter.
So enable PCIe NVMe drivers.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
con
On 13.08.21 13:56, Pali Rohár wrote:
SATA disks could be connected via mPCIe add-in card with PCIe-SATA
controller into Mox-B or Mox-G module.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
configs/turris_mox_defconfig | 6 ++
1 file changed, 6 inserti
On 13.08.21 13:56, Pali Rohár wrote:
Espressobin has one on-board SATA port which is connected directly to CPU.
More SATA disks can be connected via mPCIe add-in card with PCIe-SATA
controller.
So enable required SATA AHCI PCIe drivers in defconfig file.
Signed-off-by: Pali Rohár
Applied to
On 11.08.21 20:53, Pali Rohár wrote:
File mach/soc.h is included also in 64-bit mvebu processors, so define
Armada XP related macros only when compiling for Armada XP.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/arm/mach-mvebu/include/mach/soc.h | 2
On 11.08.21 10:14, Pali Rohár wrote:
There are already IBR_HDR_* constants for these numbers, so use them.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
tools/kwbimage.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff
On 11.08.21 10:14, Pali Rohár wrote:
Part of image data is 4 byte checksum, so every image must contain at least
4 bytes. Verify it to prevent memory corruptions.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
tools/kwbimage.c | 2 +-
1 file changed, 1 ins
On 11.08.21 10:14, Pali Rohár wrote:
Check that extended image header size is not larger than file size.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
tools/kwbimage.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tools/kwbimage.c b/tools/kwbimag
On 11.08.21 10:14, Pali Rohár wrote:
Only image versions 0 and 1 are supported. Verify it in
kwbimage_verify_header() function.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
tools/kwbimage.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
dif
Hi Marek,
On 8/31/21 6:42 PM, Marek Vasut wrote:
On 8/31/21 4:54 PM, Patrick DELAUNAY wrote:
Hi Alexandru,
Hi,
On 8/26/21 11:47 PM, Alexandru Gagniuc wrote:
Hi Patrick,
I proposing a better fix fir the issues I outlined earlier, I made a
classification of the currently supported boot mode
On 11.08.21 10:08, Pali Rohár wrote:
Define all standard baudrates plus 3 non-standard high speed:
3125000 400 515
3125000 matches divisor 5 with 250 MHz TCLK and divisor 4 with 200 MHz TCLK.
400 is the rounded value for divisor 4 with 250 MHz TCLK (3906250) and
divisor 3 with 200 MH
Now that everything is prepared, copy the fsl-ls1028a.dtsi from the
linux kernel v5.14.
Signed-off-by: Michael Walle
---
changes since v1:
- none
arch/arm/dts/fsl-ls1028a.dtsi | 1212 +
.../dt-bindings/clock/fsl,qoriq-clockgen.h| 15 +
2 files changed, 958
Copy the board device tree files from linux v5.14. On top of the v5.14
dtbs the changes of these two patches are included here which are needed
for u-boot:
https://lore.kernel.org/linux-devicetree/20210831134013.1625527-7-mich...@walle.cc/
https://lore.kernel.org/linux-devicetree/202108311340
Update the labels of the nodes to match the kernel ones.
Signed-off-by: Michael Walle
---
changes since v1:
- fix enetc0 and enetc2 labels
.../dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi | 10 +++
.../fsl-ls1028a-kontron-sl28-var1-u-boot.dtsi | 2 +-
.../arm/dts/fsl-ls1028a-kontron-sl28-var
Move all the CCSR related device nodes into /soc similiar to the linux
device tree.
Signed-off-by: Michael Walle
---
changes since v1:
- remove u-boot,dm-pre-reloc from rdb and qds boards
.../dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi | 4 +
.../dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi | 2
According to the linux device tree specification the compatible string
is:
compatible = "arm,sp805", "arm,primecell";
Fix all users in u-boot.
Signed-off-by: Michael Walle
---
changes since v1:
- none
arch/arm/dts/fsl-ls1028a.dtsi | 2 +-
arch/arm/dts/hi3660.dtsi | 4 ++--
drivers/watc
The official ls1028a binding of the driver uses the following as
compatibles:
compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
Add the missing compatible to the driver and update the device tree.
We can use the fallback "fsl,ls1021a-v1.0-dspi", because the endianness
is determined by th
The official ls1028a binding of the driver uses the following as
compatibles:
compatible = "fsl,ls1028a-lpuart";
Add the missing compatible to the driver and update the device tree.
Signed-off-by: Michael Walle
Reviewed-by: Vladimir Oltean
---
changes since v1:
- fix typo
arch/arm/dts/fsl-
This node is some hodgepodge between the ddr controller node at SoC
offset 0x108 and some static memory size of 2GiB. Remove this bogus
node because it doesn't seem to be used at all.
Signed-off-by: Michael Walle
Reviewed-by: Vladimir Oltean
Tested-by: Vladimir Oltean
---
changes since v1:
The fixup is done for the "fsl,ls1028a-gpu" which isn't any official
device tree binding. Don't break it, but instead add a fixup for another
compatible "vivante,gc" which is the offical one for the GPU on the
LS1028A.
Signed-off-by: Michael Walle
---
changes since v1:
- none
arch/arm/cpu/armv
This series sync the device tree of the LS1028A SoC with the linux one.
To ease future debugging and reviewing, we first clean up the existing one,
removing bogus nodes, moving all CCSR related nodes in /soc and update the
drivers to accept the offical compatible strings.
This was tested on a sl28
> From: Zong Li
> Sent: Wednesday, September 01, 2021 3:02 PM
> To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊)
> ; bmeng...@gmail.com; sean...@gmail.com;
> green@sifive.com; paul.walms...@sifive.com; s...@chromium.org;
> u-boot@lists.denx.de
> Cc: Zong Li
> Subject: [PATCH v5 5/5] ris
> From: Zong Li
> Sent: Wednesday, September 01, 2021 3:02 PM
> To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊)
> ; bmeng...@gmail.com; sean...@gmail.com;
> green@sifive.com; paul.walms...@sifive.com; s...@chromium.org;
> u-boot@lists.denx.de
> Cc: Zong Li
> Subject: [PATCH v5 4/5] boa
> From: Zong Li
> Sent: Wednesday, September 01, 2021 3:02 PM
> To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊)
> ; bmeng...@gmail.com; sean...@gmail.com;
> green@sifive.com; paul.walms...@sifive.com; s...@chromium.org;
> u-boot@lists.denx.de
> Cc: Zong Li
> Subject: [PATCH v5 3/5] ris
When booting in EFI, lib/efi_loader/efi_memory.c calls
board_get_usable_ram_top(0) which returns by default
gd->ram_base + gd->ram_size which is the top of DDR.
In case of OPTEE boot, the top of DDR is currently reserved by OPTEE,
board_get_usable_ram_top(0) must return an address outside OPTEE
re
Hi,
Am 2021-09-01 00:03, schrieb Vladimir Oltean:
On Tue, Aug 31, 2021 at 11:19:20PM +0200, Michael Walle wrote:
> So this needs a v2, but in general, who do you expect to pick up your
> patches?
Mh, I haven't found a rule how patches are picked up in u-boot but
most of the
time they go thro
Use the complete 512kb (4 blocks) nand partition reserved for u-boot
environment instead of just the first block, this allows the module to
have a working environment even if 3 blocks are bad.
Signed-off-by: Francesco Dolcini
---
include/configs/colibri-imx6ull.h | 5 +
1 file changed, 5 in
Use the complete 512kb (4 blocks) nand partition reserved for u-boot
environment instead of just the first block, this allows the module
to have a working environment even if 3 blocks are bad.
Signed-off-by: Francesco Dolcini
---
include/configs/colibri_imx7.h | 5 +
1 file changed, 5 inse
1 - 100 of 109 matches
Mail list logo
