With the new 2021.04 we have a new version of Chromium OS boot, which
supports sandbox, coral and coral-on-coreboot. Add documentation for
this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Drop unnecessary patch 'Enable the cbsysinfo command'
doc/chromium/run_vboot.r
With of-platdata-inst we want to set up a reference to each devices'
parent device, if there is one. If we find that the device has a parent
(i.e. is not a root node) but it is not in the list of devices being
written, then we cannot create the reference.
Report an error in this case, since it ind
All the x86 devicetree files are built at once, whichever board is
actually being built. If coreboot is the target build, CONFIG_ROM_SIZE
is not defined and samus cannot build Chromium OS verified boot. Add
this condition to avoid errors about CONFIG_ROM_SIZE being missing.
Signed-off-by: Simon Gl
Add information about memory usage when U-Boot is started from coreboot.
This is useful when debugging. Also, since coreboot takes a chunk of
memory in the middle of SDRAM for use by PCI devices, it can help avoid
overwriting this with a loaded kernel by accident.
Signed-off-by: Simon Glass
---
Use VENDOR_COREBOOT instead of TARGET_COREBOOT so we can have multiple
coreboot boards, sharing options. Only SYS_CONFIG_NAME needs to be
defined TARGET_COREBOOT.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/cpu/coreboot/Kconfig | 2 +-
board/coreboot/coreboot/Kconfig | 12
Add a function comment for get_coreboot_info() and a declaration for
cb_get_sysinfo(), since this may be called from elsewhere.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
arch/x86/include/asm/cb_sysinfo.h | 16
1 file changed, 16 insertions(+)
Set up coral so that it can boot from coreboot, even though it is a
bare-metal build. This helps with testing since the same image can be used
in both cases.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Add missing newline in the error path
- Use (ret) instead of (ret
The BIOS version may not be present, e.g. on a Chrome OS build. Add the
BIOS date as well, so we get some sort of indication of coreboot's
vintage.
Signed-off-by: Simon Glass
---
Changes in v2:
- Reorder declaration and use bios_date for the variable name
board/coreboot/coreboot/coreboot.c | 3
A recent change to disable cache setup when booting from coreboot
assumed that this has been done by SPL. The result is that for the
coreboot board, the cache is disabled (in start.S) and never
re-enabled.
If the cache was turned off, as it is on boards without SPL, we should
turn it back on. Add
These constants conflict with error codes returned by the MP
implementation when something is wrong. In particular, mp_first_cpu()
returns MP_SELECT_BSP when running without multiprocessing enabled.
Since this is -2, it is interpreted as an error by callers, which
expect a positive CPU number for t
When starting U-Boot from a previous-stage bootloader we presumably don't
need to set up the variable MTRRs. In fact this could be harmful if the
existing settings are not what U-Boot uses.
Skip that step in this case.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
These headers are not actually used. Drop them so that this driver can
be used by other boards, e.g. coreboot.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
drivers/tpm/cr50_i2c.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/tpm/cr50_i2c.c b/drive
When booting from coreboot we may not have a PCH driver available. The
SPI driver can operate without the PCH but currently complains in this
case. Update it to continue to work normally. The only missing feature
is memory-mapping of SPI-flash contents, which is not essential.
Signed-off-by: Simon
At present this driver relies on coreboot to provide information about
the console UART. However if coreboot is not compiled with the UART
enabled, the information is left out. This configuration is quite
common, e.g. with shipping x86-based Chrome OS Chromebooks.
Add a way to determine the UART s
At present only bridge devices are bound before relocation, to save space
in pre-relocation memory. In some cases we do actually want to bind a
device, e.g. because it provides the console UART. Add a devicetree
binding to support this.
Use the PCI_VENDEV() macro to encode the cell value. This is
These functions don't modify the device-ID struct that is passed in, so
mark the argument as const, so the data structure can be declared that
way. This allows it to be placed in the rodata section.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
drivers/pci/pci-uc
Various issues were discovered in getting Chromium OS verified boot
running on top of coreboot, booting into U-Boot.
Improvements include:
- enable serial console if even coreboot doesn't
- enable cache always
- show the BIOS date since Chromium OS's coreboot doesn't have a version
- update docs
-
Hi Bin,
On Thu, 8 Apr 2021 at 15:02, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Apr 7, 2021 at 12:33 PM Simon Glass wrote:
> >
> > With the new 2021.04 we have a new version of Chromium OS boot, which
> > supports sandbox, coral and coral-on-coreboot. Add documentation for
>
> Chrominum OS can ru
Hi Bin,
On Thu, 8 Apr 2021 at 14:59, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Apr 7, 2021 at 12:33 PM Simon Glass wrote:
> >
> > Use VENDOR_COREBOOT instead of TARGET_COREBOOT so we can have multiple
> > coreboot boards, sharing options. Only SYS_CONFIG_NAME needs to be
> > defined TARGET_COREB
Hi Bin,
On Thu, 8 Apr 2021 at 14:23, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Apr 7, 2021 at 12:32 PM Simon Glass wrote:
> >
> > At present this driver relies on coreboot to provide information about
> > the console UART. However if coreboot is not compiled with the UART
> > enabled, the inform
Hi Bin,
On Thu, 8 Apr 2021 at 14:28, Bin Meng wrote:
>
> On Wed, Apr 7, 2021 at 12:34 PM Simon Glass wrote:
> >
> > When booting from coreboot we may not have a PCH driver available. The
> > SPI driver can operate without the PCH but currently complains in this
> > case. Update it to continue to
Hi Bin,
On Thu, 8 Apr 2021 at 14:17, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Apr 7, 2021 at 12:32 PM Simon Glass wrote:
> >
> > At present only bridge devices are bound before relocation, to save space
> > in pre-relocation memory. In some cases we do actually want to bind a
> > device, e.g. b
Hi Tom, Alex,
On Fri, 23 Apr 2021 at 12:47, Tom Rini wrote:
>
> On Fri, Apr 23, 2021 at 11:55:57AM +1200, Simon Glass wrote:
> > Hi Alex,
> >
> > On Thu, 22 Apr 2021 at 07:30, Alex G. wrote:
> > >
> > > On 4/21/21 2:15 AM, Simon Glass wrote:
> > > > Hi Alexandru,
> > > >
> > > > On Fri, 16 Apr 2
On 4/23/21 6:38 PM, scan-ad...@coverity.com wrote:
Hi,
Please find the latest report on new defect(s) introduced to Das U-Boot found
with Coverity Scan.
3 new defect(s) introduced to Das U-Boot found with Coverity Scan.
New defect(s) Reported-by: Coverity Scan
Showing 3 of 3 defect(s)
** C
On 4/15/21 12:25 PM, Sughosh Ganu wrote:
On Thu, 15 Apr 2021 at 01:08, Simon Glass mailto:s...@chromium.org>> wrote:
On Mon, 12 Apr 2021 at 16:06, Sughosh Ganu mailto:sughosh.g...@linaro.org>> wrote:
>
> Define a function which would be used in the scenario where the
> public
On 4/11/21 12:28 PM, Marek Vasut wrote:
The USB no-op PHY uses "usb-nop-xceiv" compatible string. This driver is
compatible with USB no-op PHY, so add the compatible string.
Signed-off-by: Marek Vasut
Cc: Alexey Brodkin
Cc: Eugeniy Paltsev
Cc: Fabio Estevam
Cc: Jean-Jacques Hiblot
Cc: Mu
This should be 'regwidth', not 'baud'. Fix it.
Signed-off-by: Simon Glass
---
cmd/x86/cbsysinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c
index a0db0ad364e..34fdaf5b1b1 100644
--- a/cmd/x86/cbsysinfo.c
+++ b/cmd/x86/cbsysinfo
Hello,
I'm experiencing the same issue, have you manage to solve it?
--
Sent from: http://u-boot.10912.n7.nabble.com/
Hi Peng,
On Fri, Apr 23, 2021 at 1:57 PM Fabio Estevam wrote:
>
> Hi Peng,
>
> Thanks for submitting this series.
>
> On Mon, Apr 12, 2021 at 8:43 AM Peng Fan (OSS) wrote:
> >
> > From: Peng Fan
> >
> > Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART
> >
> > Note: upower API currentl
Update on ECDSA verification progress, I've forked Alex's repo and have
included my changes in the 'ecdsa-vrf-1' branch [1]. This includes the
isolated OpenSSL code for verification, and I split up the
lib/ecdsa/ecdsa-libcrypto.c file into lib/ecdsa/ecdsa-sign.c and
lib/ecdsa/ecdsa-verify.c. I'
Hi Peng,
On Fri, Apr 23, 2021 at 1:27 PM Peng Fan wrote:
>
> Hi Stefano,
>
> Please pull nxp-imx-4-23-2021, This PR is based on Tom's master branch.
> CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/7264
>
> I have updated the patches's status.
> This is a quite large patchset
Hi Peng,
Thanks for submitting this series.
On Mon, Apr 12, 2021 at 8:43 AM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART
>
> Note: upower API currently not included.
>
> Signed-off-by: Peng Fan
> ---
> arch/arm/dts/imx8ulp-emulator-u-
Add initial A53 defconfig support for AM64x SoCs.
Signed-off-by: Dave Gerlach
---
configs/am64x_evm_a53_defconfig | 96 +
1 file changed, 96 insertions(+)
create mode 100644 configs/am64x_evm_a53_defconfig
diff --git a/configs/am64x_evm_a53_defconfig b/configs/a
Add pinctrl macros for AM64 SoC. These macro definitions are similar to
that of previous platforms, but adding new definitions to avoid any
naming confusions in the soc dts files.
Signed-off-by: Dave Gerlach
---
include/dt-bindings/pinctrl/k3.h | 5 -
1 file changed, 4 insertions(+), 1 delet
Add initial R5 defconfig support for AM64x SoCs.
Signed-off-by: Dave Gerlach
---
configs/am64x_evm_r5_defconfig | 91 ++
1 file changed, 91 insertions(+)
create mode 100644 configs/am64x_evm_r5_defconfig
diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64
Add initial support for dt that runs on r5.
Signed-off-by: Dave Gerlach
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 58 +
arch/arm/dts/k3-am642-r5-evm.dts | 169 ++
3 files changed, 229 insertions(+), 1 deletio
The AM642 EValuation Module (EVM) is a board that provides access to
various peripherals available on the AM642 SoC, such as PCIe, USB 2.0,
CPSW Ethernet, ADC, and more.
Add basic support.
Signed-off-by: Dave Gerlach
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/k3-am642-evm.dts | 246
AM64x uses a different thread mapping that existing K3 SoCs, so update
the valid thread ID list to include those used for AM64x.
Also remove the comment identifying the purpose of each thread ID. The
purpose of the thread ID is specified when describing the threads in the
device tree and the same
For AM642, ROM supports loading system firmware directly
from boot image. ROM passes information about the number of
images that are loaded to bootloader at a specific address
that is temporary. Add support for storing this information
somewhere permanent before it gets corrupted.
Signed-off-by:
Add board specific initialization for am64x based boards.
Signed-off-by: Dave Gerlach
---
arch/arm/mach-k3/Kconfig| 1 +
board/ti/am64x/Kconfig | 53 ++
board/ti/am64x/Makefile | 8 +++
board/ti/am64x/evm.c| 48 +
include/configs/am64x_e
From: Keerthy
AM642 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, R
Add support for the controller present on the AM642 SoC.
There are instances:
sdhci0: 8bit bus width, max 400 MBps
sdhci1: 4bit bus width, max 100 MBps
Signed-off-by: Dave Gerlach
---
drivers/mmc/am654_sdhci.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/mmc/a
Use the System Firmware (SYSFW) loader framework to load and start
the SYSFW as part of the AM642 early initialization sequence. Also
make use of existing logic to detect if ROM has already loaded sysfw
and avoided attempting to reload and instead just prepare to use already
running firmware.
Whil
From: Suman Anna
The AM642 SoCs use the Main R5FSS0 as a boot processor, and runs
the R5 SPL that performs the initialization of the System Controller
processor and starting the Arm Trusted Firmware (ATF) on the Arm
Cortex A53 cluster. The Core0 serves as this boot processor and is
parked in WFE
The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.
Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
MCUs,
Hi,
This series adds initial support for the latest new SoC, AM642,
from Texas Instruments.
Additional detail can be found in the patch descriptions, also
see AM64X Technical Reference Manual (SPRUIM2, Revised Jan 2021)
for further details: https://www.ti.com/lit/pdf/spruim2
Regards,
Dave
Dave
To avoid any glitches on MMC clock line, make use of pm per and post
callbacks when loading sysfw.
Signed-off-by: Dave Gerlach
---
arch/arm/mach-k3/am642_init.c | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-k3/am642_init.c b/
From: Keerthy
Change the memory attributes for the DDR regions used by the remote
processors on AM65x so that the cores can see and execute the proper code.
A separate table based on the previous K3 SoCs is introduced since the
number of remote processors and their DDR usage is different between
To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MAIN domain.
Signed-off-by: Dave Gerlach
---
arch/arm/mach-k3/am642_init.c | 16
arch/arm/mach-k3/include/mach/am64_hardware.h | 10 ++---
The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.
Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
MCUs,
On Wed, Mar 10, 2021 at 10:16:25AM +0100, Patrick Delaunay wrote:
> Migrate CONFIG_LMB in Kconfig.
>
> Signed-off-by: Patrick Delaunay
Applied to u-boot/master, thanks!
--
Tom
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Hi Stefano,
Please pull nxp-imx-4-23-2021, This PR is based on Tom's master branch.
CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/7264
I have updated the patches's status.
This is a quite large patchset, but actually only do two things as below:
-
On Wed, Apr 14, 2021 at 10:02:21PM -0400, Sean Anderson wrote:
> There are no system calls in U-Boot, but ENOSYS is still allowed (and
> preferred since 42a2668743 ("dm: core: Document the common error codes")).
> Silence this warning.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Simon Glass
On Mon, Apr 12, 2021 at 06:53:07PM -0400, Sean Anderson wrote:
> This is technically a library function, but we use MMCs for testing, so
> it is easier to do it with DM. At the moment, the only block devices in
> sandbox are MMCs (AFAIK) so we just test with those.
>
> Signed-off-by: Sean Anderso
On Mon, Apr 12, 2021 at 06:53:06PM -0400, Sean Anderson wrote:
> blk_get_device_by_str returns the device number on success. So we must
> check if the return was negative to determine an error.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
T
On Mon, Apr 12, 2021 at 06:53:05PM -0400, Sean Anderson wrote:
> This allows using dev#partlabel syntax.
>
> Signed-off-by: Sean Anderson
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Mar 10, 2021 at 10:16:32AM +0100, Patrick Delaunay wrote:
> For the latest kernel device tree the max number of reserved regions
> in lmb library is reached: 8 with 5 reserved regions in device tree.
>
> When a new region is added, the lmb allocation for the device tree
> relocation faile
On Wed, Mar 10, 2021 at 10:16:31AM +0100, Patrick Delaunay wrote:
> Add 2 configs CONFIG_LMB_MEMORY_REGIONS and CONFIG_LMB_RESERVED_REGIONS
> to change independently the max number of the regions in lmb
> library.
>
> When CONFIG_LMB_USE_MAX_REGIONS=y, move the lmb property arrays to
> struct lmb
On Wed, Mar 10, 2021 at 10:16:30AM +0100, Patrick Delaunay wrote:
> Add test for max number of memory regions and in reserved regions.
>
> Signed-off-by: Patrick Delaunay
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Mar 10, 2021 at 10:16:29AM +0100, Patrick Delaunay wrote:
> As in lmb_region, cnt < max and in the lmb library
> use region[i] only with i in 0...cnt, this region array size
> can be reduced by 1 element without overflow.
>
> This patch allows to reduce the struct lmb size.
>
> Signed-of
On Wed, Mar 10, 2021 at 10:16:28AM +0100, Patrick Delaunay wrote:
> Move MAX_LMB_REGIONS value in Kconfig, the max number of the regions
> in lmb library.
>
> Signed-off-by: Patrick Delaunay
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Mar 10, 2021 at 10:16:27AM +0100, Patrick Delaunay wrote:
> Add a max parameter in lmb_region struct to handle test
> in lmb_add_region without using the MAX_LMB_REGIONS
> define.
>
> This patch allows to modify these size independently for
> memory of reserved regions in the next patches
On Wed, Mar 10, 2021 at 10:16:26AM +0100, Patrick Delaunay wrote:
> Remove the unused field size of struct lmb_region as it is initialized to 0
> and never used after in lmb library.
>
> See Linux kernel commit 4734b594c6ca ("memblock: Remove memblock_type.size
> and add memblock.memory_size inst
On Tue, Apr 20, 2021 at 11:03:12AM -0400, Sean Anderson wrote:
> Recently, tests have been added primarily to the end of the dm Makefile.
> This results in merge conflicts when two people add new tests at the
> same time. To reduce these conflicts, alphabetize the makefile.
>
> Signed-off-by: Sea
On Fri, Apr 23, 2021 at 01:18:13PM +0200, Marek Vasut wrote:
> The following changes since commit 275a4490fd2f30df76f2aa07efa0f595fef4d46f:
>
> Merge branch '2021-04-22-udoo_neo-update' (2021-04-22 11:29:32 -0400)
>
> are available in the Git repository at:
>
> git://source.denx.de/u-boot-u
On Thu, Apr 22, 2021 at 09:39:26PM +0200, Daniel Schwierzeck wrote:
> Hi Tom,
>
> please pull some updates and fixes for MIPS.
>
> Gitlab CI:
> https://source.denx.de/u-boot/custodians/u-boot-mips/-/pipelines/7255
>
> Azure:
> https://dev.azure.com/danielschwierzeck/u-boot/_build/results?buildI
On 4/23/21 5:04 PM, Tim Harvey wrote:
On Thu, Apr 22, 2021 at 12:16 PM Marek Vasut wrote:
On 4/20/21 2:33 AM, Tim Harvey wrote:
[...]
+/* USB Configs */
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_USB_MAX_CONTROLLE
On Thu, Apr 22, 2021 at 12:16 PM Marek Vasut wrote:
>
> On 4/20/21 2:33 AM, Tim Harvey wrote:
>
> [...]
>
> >> +/* USB Configs */
> >> +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
> >> +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
> >> +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
> >>
On 02.04.21 02:15, Jaehoon Chung wrote:
> Provide a man-pages for the mmc command.
>
> Signed-off-by: Jaehoon Chung
> ---
> Changelog on V2
> - Add missing empty line
> - Add bootbus's arguments descriptions
> ---
> doc/usage/index.rst | 1 +
> doc/usage/mmc.rst | 212
From: Ian Ray
Prevent shell access on boot failure by entering an infinite
loop.
Signed-off-by: Ian Ray
Signed-off-by: Sebastian Reichel
---
include/configs/ge_bx50v3.h | 3 ++-
include/configs/mx53ppd.h | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/configs
From: Ian Ray
Minor cosmetic changes to unify `CONFIG_EXTRA_ENV_SETTINGS'
indentation between Bx50v3 and PPD to make comparison and
review easier and simplify the default boot command.
Signed-off-by: Ian Ray Ian Ray
Signed-off-by: Sebastian Reichel
---
include/configs/ge_bx50v3.h | 9 +++
Add PHY's reset GPIO, so that U-Boot does a PHY hard reset.
This is needed, since the PHY might become unresponsive if
watchdog reboots the system while a transaction is ongoing.
The reset GPIO is added to the U-Boot specific DT files, since
the kernel does not setup the reserved registers correct
From: Ian Ray
Remove unsupported USB boot.
Signed-off-by: Ian Ray
Signed-off-by: Sebastian Reichel
---
include/configs/ge_bx50v3.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 2d854af9a06d..f1e0ec553ce6 100644
--- a/in
From: Ian Ray
Increase watchdog period, in order to accomodate recent kernel size
and configuration changes.
Signed-off-by: Ian Ray
Signed-off-by: Sebastian Reichel
---
configs/ge_bx50v3_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/ge_bx50v3_defconfig
From: Ian Ray
Disable the unused persistent environment.
Signed-off-by: Ian Ray
Signed-off-by: Sebastian Reichel
---
configs/ge_bx50v3_defconfig | 2 +-
configs/mx53ppd_defconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_
Collection of downstream fixes and cleanups for GE boards.
-- Sebastian
Ian Ray (5):
configs: ge: bx50v3: adjust watchdog period
configs: ge: use non-persistent environment
include: configs: ge: bx50v3: drop USB boot
include: configs: ge: simplify default boot command
include: configs:
The DA9063 enables the CRYSTAL bit by default, but there is no
crystal populated on the BA16 system on module. Without explicitly
clearing the CRYSTAL bit the system runs unstable and sometimes
reboots unexpectedly.
Signed-off-by: Sebastian Reichel
---
board/ge/bx50v3/bx50v3.c | 26 +
On 23.04.21 15:24, Ilias Apalodimas wrote:
> commit cbea241e935e("efidebug: add multiple device path instances on
> Boot")
> slightly tweaked the efidebug syntax adding -b, -i and -s for the boot
> image, initrd and optional data.
> The pytests using this command were adapted as well. However
Signed-off-by: Ilko Iliev
---
board/ronetix/pm9263/pm9263.c | 10 +-
include/configs/pm9263.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index 46494b043f..6dc080ac2c 100644
--- a/board/ronetix/
- Enable CONFIG_DM_ETH in configs/pm9263_defconfig
- Drop legacy initialization in board/ronetix/pm9263.c
- Remove network related setting from include/configs/pm9263.h
Signed-off-by: Ilko Iliev
---
Changes to v2:
- improve commit message
---
board/ronetix/pm9263/pm9263.c | 57 -
On 4/23/21 12:19 PM, Ilko Iliev wrote:
> On 21.04.21 08:50, eugen.hris...@microchip.com wrote:
>> On 4/19/21 4:37 PM, Ilko Iliev wrote:
>>> This patch remove the network support for PM9261 because
>>> currently there is no DM suport for Davicom D9000.
>>>
>>> Signed-off-by: Ilko Iliev
>>> ---
>> H
commit cbea241e935e("efidebug: add multiple device path instances on Boot")
slightly tweaked the efidebug syntax adding -b, -i and -s for the boot
image, initrd and optional data.
The pytests using this command were adapted as well. However I completely
missed the last "" argument, which at the
On Fri, Apr 23, 2021 at 05:08:05PM +0900, Yuichiro Goto wrote:
> Use of strcat() against an uninitialized buffer would lead
> to buffer overflow. This patch fixes it.
Thanks for report!
Can you also add a Fixes tag?
> Signed-off-by: Yuichiro Goto
> Cc: Peter Robinson
> Cc: Andy Shevchenko
> C
The network support is removed because there is
no DM for Davicom DM9000.
Signed-off-by: Ilko Iliev
---
board/ronetix/pm9261/pm9261.c | 54 ---
configs/pm9261_defconfig | 4 +--
include/configs/pm9261.h | 9 --
3 files changed, 2 insertions(+), 65
Hi,
On 4/23/21 11:23 AM, Bin Meng wrote:
> On Fri, Apr 23, 2021 at 5:14 PM Bin Meng wrote:
>>
>> Hi Michal,
>>
>> On Fri, Apr 23, 2021 at 3:35 PM Michal Simek wrote:
>>>
>>> Hi Bin,
>>>
>>> ne 14. 3. 2021 v 13:17 odesílatel Bin Meng napsal:
Following the same updates that were done to
The following changes since commit 275a4490fd2f30df76f2aa07efa0f595fef4d46f:
Merge branch '2021-04-22-udoo_neo-update' (2021-04-22 11:29:32 -0400)
are available in the Git repository at:
git://source.denx.de/u-boot-usb.git master
for you to fetch changes up to e1769da17ed339bc937d30c49176b
On Fri, Apr 23, 2021 at 5:14 PM Bin Meng wrote:
>
> Hi Michal,
>
> On Fri, Apr 23, 2021 at 3:35 PM Michal Simek wrote:
> >
> > Hi Bin,
> >
> > ne 14. 3. 2021 v 13:17 odesílatel Bin Meng napsal:
> > >
> > > Following the same updates that were done to the fixed phy driver,
> > > use ofnode_ APIs
On 21.04.21 08:50, eugen.hris...@microchip.com wrote:
On 4/19/21 4:37 PM, Ilko Iliev wrote:
This patch remove the network support for PM9261 because
currently there is no DM suport for Davicom D9000.
Signed-off-by: Ilko Iliev
---
Hi,
If I look at the commit message, I would expect somethi
On Friday 23 April 2021 11:04:26 Mark Kettenis wrote:
> > Date: Fri, 23 Apr 2021 10:27:16 +0200
> > From: Pali Rohár
> >
> > On Friday 23 April 2021 10:25:21 Bin Meng wrote:
> > > Hi Pali,
> > >
> > > On Fri, Apr 23, 2021 at 12:10 AM Pali Rohár wrote:
> > > >
> > > > BIOS Release Date must be i
Hi Michal,
On Fri, Apr 23, 2021 at 3:35 PM Michal Simek wrote:
>
> Hi Bin,
>
> ne 14. 3. 2021 v 13:17 odesílatel Bin Meng napsal:
> >
> > Following the same updates that were done to the fixed phy driver,
> > use ofnode_ APIs instead of fdt_ APIs so that the Xilinx PHY driver
> > can support liv
Takahiro,
On Fri, 23 Apr 2021 at 12:30, AKASHI Takahiro
wrote:
> Sughosh,
>
> On Fri, Apr 23, 2021 at 11:55:04AM +0530, Sughosh Ganu wrote:
> > Takahiro,
> >
> > On Fri, 23 Apr 2021 at 11:17, AKASHI Takahiro <
> takahiro.aka...@linaro.org>
> > wrote:
> >
> > > Heinrich,
> > >
> > > I'm currently
> Date: Fri, 23 Apr 2021 10:27:16 +0200
> From: Pali Rohár
>
> On Friday 23 April 2021 10:25:21 Bin Meng wrote:
> > Hi Pali,
> >
> > On Fri, Apr 23, 2021 at 12:10 AM Pali Rohár wrote:
> > >
> > > BIOS Release Date must be in format mm/dd/ and must be release date.
> > > U-Boot currently set
Dear Simon Glass,
On Fri, 26 Mar 2021 at 07:08, Jaehoon Chung wrote:
> On 3/25/21 6:44 AM, Simon Glass wrote:
> > It is useful to have a board with unit tests enabled, to check that this
> > does not break.
> >
> > Let's choose snow, since it is not under active development and it is
> > gloriou
On Friday 23 April 2021 10:25:21 Bin Meng wrote:
> Hi Pali,
>
> On Fri, Apr 23, 2021 at 12:10 AM Pali Rohár wrote:
> >
> > BIOS Release Date must be in format mm/dd/ and must be release date.
> > U-Boot currently sets BIOS Release Date from U_BOOT_DMI_DATE macro which is
> > generated from cu
On 22/04/21 10:28PM, Dario Binacchi wrote:
> As reported by Coverity Scan for Das U-Boot, the 'less-than-zero'
> comparison of an unsigned value is never true.
>
> Signed-off-by: Dario Binacchi
> Reviewed-by: Pratyush Yadav
>
> ---
>
> Changes in v2:
> - Balance quote in commit message
> - Add
Use of strcat() against an uninitialized buffer would lead
to buffer overflow. This patch fixes it.
Signed-off-by: Yuichiro Goto
Cc: Peter Robinson
Cc: Andy Shevchenko
Cc: Nicolas Saenz Julienne
---
Changes for v2:
- Add "IOMUX" in title
common/iomux.c | 5 -
1 file changed, 4 insertion
On Fri, Apr 23, 2021 at 04:50:21PM +0900, AKASHI Takahiro wrote:
> On Fri, Apr 23, 2021 at 10:21:52AM +0300, Ilias Apalodimas wrote:
> > Akashi-san
> >
> > [...]
> > > 7) Pytest is broken
> > >Due to your and Ilias' recent patches, existing pytests for
> > >secure boot as well as capsule u
On 23/04/2021 02:12, Ramon Fried wrote:
> On Wed, Apr 21, 2021 at 11:58 AM Neil Armstrong
> wrote:
>>
>> The dw_eth_pdata is not accessible from the mdio device, it gets the mdio
>> bus plat
>> leading to random sleeps (-10174464 on Odroid-HC4).
>>
>> This moves the dw_mdio_reset function to a c
On Fri, Apr 23, 2021 at 10:21:52AM +0300, Ilias Apalodimas wrote:
> Akashi-san
>
> [...]
> > 7) Pytest is broken
> >Due to your and Ilias' recent patches, existing pytests for
> >secure boot as well as capsule update are now broken.
> >I'm not sure why you have not yet noticed.
> >
Supported peripherals: Ethernet, eMMC, Serial.
U-Boot SPL 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14
+0200)
Normal Boot
Trying to boot from MMC2
U-Boot 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200)
CPU: Freescale i.MX8MQ rev2.1 at 1000 MHz
Reset cause: POR
Model:
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