On 4/13/21 12:12 AM, Rick Chen wrote:
Hi Sean
On 4/12/21 10:39 PM, Rick Chen wrote:
Hi Green,
From: Green Wan [mailto:green@sifive.com]
Sent: Monday, April 12, 2021 10:33 AM
To: Sean Anderson
Cc: Rick Chen; Rick Jian-Zhi Chen(陳建志); Bin Meng; U-Boot Mailing List; Paul
Walmsley; Pragnesh
Hi Sean
> On 4/12/21 10:39 PM, Rick Chen wrote:
> > Hi Green,
> >
> >> From: Green Wan [mailto:green@sifive.com]
> >> Sent: Monday, April 12, 2021 10:33 AM
> >> To: Sean Anderson
> >> Cc: Rick Chen; Rick Jian-Zhi Chen(陳建志); Bin Meng; U-Boot Mailing List;
> >> Paul Walmsley; Pragnesh Patel; Si
Hi Green,
> From: Green Wan [mailto:green@sifive.com]
> Sent: Tuesday, March 30, 2021 1:27 PM
> Cc: Green Wan; Rick Jian-Zhi Chen(陳建志); Paul Walmsley; Pragnesh Patel; Sean
> Anderson; Bin Meng; Simon Glass; Atish Patra; Leo Yu-Chi Liang(梁育齊); Brad
> Kim; u-boot@lists.denx.de
> Subject: [RFC
On 4/12/21 10:39 PM, Rick Chen wrote:
Hi Green,
From: Green Wan [mailto:green@sifive.com]
Sent: Monday, April 12, 2021 10:33 AM
To: Sean Anderson
Cc: Rick Chen; Rick Jian-Zhi Chen(陳建志); Bin Meng; U-Boot Mailing List; Paul
Walmsley; Pragnesh Patel; Simon Glass; Atish Patra; Leo Yu-Chi Liang
On Tue, Apr 13, 2021 at 10:39 AM Rick Chen wrote:
>
> Hi Green,
>
> > From: Green Wan [mailto:green@sifive.com]
> > Sent: Monday, April 12, 2021 10:33 AM
> > To: Sean Anderson
> > Cc: Rick Chen; Rick Jian-Zhi Chen(陳建志); Bin Meng; U-Boot Mailing List; Paul
> > Walmsley; Pragnesh Patel; Simon G
Hi Green,
> From: Green Wan [mailto:green@sifive.com]
> Sent: Monday, April 12, 2021 10:33 AM
> To: Sean Anderson
> Cc: Rick Chen; Rick Jian-Zhi Chen(陳建志); Bin Meng; U-Boot Mailing List; Paul
> Walmsley; Pragnesh Patel; Simon Glass; Atish Patra; Leo Yu-Chi Liang(梁育齊);
> Brad Kim
> Subject: R
On Wed, Feb 17, 2021 at 01:50:41PM +1030, Joel Stanley wrote:
> Currently the FIT hashing will call directly into the SHA algorithms to
> get a hash.
>
> This moves the fit code to use hash_lookup_algo, giving a common
> entrypoint into the hashing code and removing the duplicated algorithm
> loo
Add the basic functionality required to support the standard crypt
format.
The files crypt-sha256.c and crypt-sha512.c originate from libxcrypt and
their formatting is therefor retained.
The integration is done via a crypt_compare() function in crypt.c.
```
libxcrypt $ git describe --long --always
This patchset introduces support for crypt-style passwords to unlock
the console in autoboot mode.
The implementation of crypt-sha256 and crypt-sha512 originate from
libxcrypt at https://github.com/besser82/libxcrypt.git
Version v4.4.17
Git commit hash 6b110bc
I didn't re-format those two files
In order to have at least one defconfig that enables all those newly added
values.
Signed-off-by: Steffen Jaeckel
---
configs/bcm963158_ram_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig
index 0be1e0981a..7
In case a user has to enter a complicated password it is sometimes
desireable to give the user more time than the default timeout.
Enabling this feature will disable the timeout entirely in case the user
presses the key before entering any other character.
Signed-off-by: Steffen Jaeckel
---
cm
While doing code-review internally this got nitpicked by 2 reviewers, so
I decided to include this here.
Signed-off-by: Steffen Jaeckel
---
common/autoboot.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/common/autoboot.c b/common/autoboot.c
index 732a01
Hook into the autoboot flow as an alternative to the existing
mechanisms.
Signed-off-by: Steffen Jaeckel
---
common/Kconfig.boot | 23 +---
common/autoboot.c | 67 +++--
2 files changed, 77 insertions(+), 13 deletions(-)
diff --git a/common
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Friday, April 09, 2021 6:48 PM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: u-boot@lists.denx.de; Heinrich Schuchardt
> Subject: [PATCH 1/1] cmd/exception: support ebreak exception on RISC-V
>
> The ebreak instruction should generate a breakpoi
On Wed, 17 Feb 2021 at 05:04, AKASHI Takahiro
wrote:
>
> Simon,
>
> # This is not a direct comment on this patch.
>
> On Wed, Feb 17, 2021 at 01:50:41PM +1030, Joel Stanley wrote:
> > Currently the FIT hashing will call directly into the SHA algorithms to
> > get a hash.
> >
> > This moves the fit
Helli Simon,
On Wed, 17 Feb 2021 at 03:20, Joel Stanley wrote:
>
> Here are some small changes to the FIT hashing code in order to use
> more code from common/, which in turns allows hw implementations of SHA.
>
> This was motivated by a need to reduce the SPL size for the Aspeed
> platforms by u
On 4/12/21 2:04 PM, Simon Glass wrote:
Hi Sean,
On Mon, 12 Apr 2021 at 16:22, Sean Anderson wrote:
There are no system calls in U-Boot, but ENOSYS is still allowed (and
preferred since 42a2668743 ("dm: core: Document the common error codes")).
Silence this warning.
Signed-off-by: Sean Anders
On 4/13/21 1:03 AM, Giulio Benetti wrote:
This patchset fixes u-boot hang on i.MXRT1050 while setting lcdif in mxsfb
driver. There are 2 gates to be enabled to initialize mxsfb so let's
introduce the missing gate as a clock and rename "per" clock to "pix" clock
since in the other .dts files using
Since we assume pll5 is the default lcdif clock source let's move
assigned-clocks(-parents) properties to .dtsi file.
Signed-off-by: Giulio Benetti
---
arch/arm/dts/imxrt1050-evk.dts | 3 ---
arch/arm/dts/imxrt1050.dtsi| 2 ++
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/ar
Lcd peripheral needs 2 different gates to be enable to work, so let's
introduce the missing one(LCDIF_PIX) and rename the existing one
(LCDIF_APB).
Signed-off-by: Giulio Benetti
---
drivers/clk/imx/clk-imxrt1050.c | 6 --
include/dt-bindings/clock/imxrt1050-clock.h | 5 +++--
2 f
Signed-off-by: Giulio Benetti
---
arch/arm/dts/imxrt1050.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi
index eb5e09e971..ec1eb88e45 100644
--- a/arch/arm/dts/imxrt1050.dtsi
+++ b/arch/arm/dts/imxrt1050.dtsi
Some SoC needs "disp_axi" clock to be enabled, so let's try to retrieve it
and enabling. If it fails it gives only a debug(), but this clock as well
as "axi" clock is not mandatory.
Signed-off-by: Giulio Benetti
---
drivers/video/mxsfb.c | 11 +++
1 file changed, 11 insertions(+)
diff -
On some SoC mxsfb needs more than one clock gate(actual "per" clock). So
let's introduce "axi" clock that can be provided but it's not mandatory.
This is inspired from linux mxsfb driver. Also let's rename "per" clock to
"pix" clock for compatibility with already existing .dts lcdif nodes
implement
This patchset fixes u-boot hang on i.MXRT1050 while setting lcdif in mxsfb
driver. There are 2 gates to be enabled to initialize mxsfb so let's
introduce the missing gate as a clock and rename "per" clock to "pix" clock
since in the other .dts files using *-lcdif "pix" is used.
This patchset add a
This is technically a library function, but we use MMCs for testing, so
it is easier to do it with DM. At the moment, the only block devices in
sandbox are MMCs (AFAIK) so we just test with those.
Signed-off-by: Sean Anderson
---
Changes in v2:
- New
test/dm/Makefile | 1 +
test/dm/part.c |
blk_get_device_by_str returns the device number on success. So we must
check if the return was negative to determine an error.
Signed-off-by: Sean Anderson
---
Changes in v2:
- New
disk/part.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disk/part.c b/disk/part.c
index 8
This allows using dev#partlabel syntax.
Signed-off-by: Sean Anderson
---
Changes in v2:
- Add stub for when CONFIG_PARTITIONS=n
fs/fs.c| 4 ++--
include/part.h | 12 +++-
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/fs/fs.c b/fs/fs.c
index 900928c394..b7936f
On Mon, Apr 12, 2021 at 04:32:49PM -0500, Alex G. wrote:
> ## Introduction
>
> Today we use "falcon mode" to mean "boot linux straight from SPL". This
> designation makes sense, since falcons "fly at high speed and change
> direction rapidly" according to Wikipedia.
>
> The way we implement falco
On 4/12/21 5:44 PM, Tom Rini wrote:
> On Tue, Mar 09, 2021 at 03:56:24PM -0500, Sean Anderson wrote:
>
>> This allows using dev#partlabel syntax.
>>
>> Signed-off-by: Sean Anderson
>> ---
>>
>> fs/fs.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/fs/fs.c b
On Tue, Mar 09, 2021 at 03:56:24PM -0500, Sean Anderson wrote:
> This allows using dev#partlabel syntax.
>
> Signed-off-by: Sean Anderson
> ---
>
> fs/fs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/fs/fs.c b/fs/fs.c
> index 900928c394..b7936fd4cf 100644
> --
## Introduction
Today we use "falcon mode" to mean "boot linux straight from SPL". This
designation makes sense, since falcons "fly at high speed and change
direction rapidly" according to Wikipedia.
The way we implement falcon mode is to reserve two areas of storage:
* kernel area/partitio
Hi Tom,
On Tue, 13 Apr 2021 at 06:38, Tom Rini wrote:
>
> On Tue, Apr 13, 2021 at 06:26:08AM +1200, Simon Glass wrote:
> > Hi Tom,
> >
> > On Tue, 13 Apr 2021 at 06:18, Tom Rini wrote:
> > >
> > > On Tue, Apr 13, 2021 at 05:49:19AM +1200, Simon Glass wrote:
> [snip]
> > > > As to a weak function
On Tue, Apr 13, 2021 at 06:26:08AM +1200, Simon Glass wrote:
> Hi Tom,
>
> On Tue, 13 Apr 2021 at 06:18, Tom Rini wrote:
> >
> > On Tue, Apr 13, 2021 at 05:49:19AM +1200, Simon Glass wrote:
[snip]
> > > As to a weak function, what would the default behaviour be? If we can
> > > define that, then
Hi Tom,
On Tue, 13 Apr 2021 at 06:18, Tom Rini wrote:
>
> On Tue, Apr 13, 2021 at 05:49:19AM +1200, Simon Glass wrote:
> > Hi Tom, Alex,
> >
> > On Tue, 13 Apr 2021 at 04:26, Tom Rini wrote:
> > >
> > > On Mon, Apr 12, 2021 at 10:21:18AM -0500, Alex G. wrote:
> > > >
> > > >
> > > > On 4/12/21 9
On Tue, Apr 13, 2021 at 05:49:19AM +1200, Simon Glass wrote:
> Hi Tom, Alex,
>
> On Tue, 13 Apr 2021 at 04:26, Tom Rini wrote:
> >
> > On Mon, Apr 12, 2021 at 10:21:18AM -0500, Alex G. wrote:
> > >
> > >
> > > On 4/12/21 9:40 AM, Tom Rini wrote:
> > > > On Mon, Apr 12, 2021 at 08:51:11AM -0500, A
On Mon, 12 Apr 2021 at 18:51, chenguanqiao wrote:
>
> From: Chen Guanqiao
>
> Add functions to add size of addresses in the device tree using ofnode
> references.
>
> If the size is not set, return FDT_SIZE_T_NONE.
>
> Signed-off-by: Chen Guanqiao
> ---
> drivers/core/ofnode.c | 11 +++
On Mon, 12 Apr 2021 at 18:51, chenguanqiao wrote:
>
> From: Chen Guanqiao
>
> Add test item for getting address and size functions
>
> Test the following function:
> - ofnode_get_addr()
> - ofnode_get_size()
>
> Signed-off-by: Chen Guanqiao
> ---
> test/dm/ofnode.c | 31
Hi Sean,
On Mon, 12 Apr 2021 at 16:22, Sean Anderson wrote:
>
> There are no system calls in U-Boot, but ENOSYS is still allowed (and
> preferred since 42a2668743 ("dm: core: Document the common error codes")).
> Silence this warning.
>
> Signed-off-by: Sean Anderson
> Seriies-to: sjg
This look
Hi Tom, Alex,
On Tue, 13 Apr 2021 at 04:26, Tom Rini wrote:
>
> On Mon, Apr 12, 2021 at 10:21:18AM -0500, Alex G. wrote:
> >
> >
> > On 4/12/21 9:40 AM, Tom Rini wrote:
> > > On Mon, Apr 12, 2021 at 08:51:11AM -0500, Alex G. wrote:
> > > >
> > > >
> > > > On 4/12/21 8:25 AM, Tom Rini wrote:
> > >
On Mon, Apr 12, 2021 at 10:21:18AM -0500, Alex G. wrote:
>
>
> On 4/12/21 9:40 AM, Tom Rini wrote:
> > On Mon, Apr 12, 2021 at 08:51:11AM -0500, Alex G. wrote:
> > >
> > >
> > > On 4/12/21 8:25 AM, Tom Rini wrote:
> > > > On Fri, Apr 09, 2021 at 05:29:36PM -0700, Tim Harvey wrote:
> > > > > On
According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.
Also, updat
Hi all,
On 12/04/21 6:36 pm, Aswath Govindraju wrote:
> According to latest errata of J721e [1], HS400 mode is not supported
> in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
> subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
> in MMCSD0 subsystem
On 4/12/21 9:40 AM, Tom Rini wrote:
On Mon, Apr 12, 2021 at 08:51:11AM -0500, Alex G. wrote:
On 4/12/21 8:25 AM, Tom Rini wrote:
On Fri, Apr 09, 2021 at 05:29:36PM -0700, Tim Harvey wrote:
On Fri, Apr 9, 2021 at 1:53 PM Tom Rini wrote:
On Fri, Apr 09, 2021 at 03:24:41PM -0500, Adam For
Hi,
I promised to send my summary of Trusted Substrate architecture council
call on HOBs, here it is:
Topics where there seem to be consensus
- Scope include diverse firmware flows (U-Boot/SPL, TFA, CoreBoot…) on
difference architectures (Arm, RiscV)
- Definitions: The Hand Over Funct
The current capsule authentication code checks if the environment
variable capsule_authentication_enabled is set, for authenticating the
capsule. This is in addition to the check for the config symbol
CONFIG_EFI_CAPSULE_AUTHENTICATE. Remove the check for the environment
variable. The capsule will n
These patches add support for embedding the public key efi signature
list(esl) file into the platform's device tree. The current solution
for the Qemu arm64 platform has the public key as part of an overlay,
and stored on the Efi System Partition(ESP). Having the provision to
embed the public key i
Add provision for embedding the public key used for capsule
authentication in the platform's dtb. This is done by invoking the
mkeficapsule utility which puts the public key in the efi signature
list(esl) format into the dtb.
Signed-off-by: Sughosh Ganu
---
Changes since V1: None
Makefile | 10
Define a function which would be used in the scenario where the
public key is stored on the platform's dtb. This dtb is concatenated
with the u-boot binary during the build process. Platforms which have
a different mechanism for getting the public key would define their
own platform specific functi
Add config options EFI_PKEY_DTB_EMBED and EFI_PKEY_FILE which are to
be used for embedding the public key to be used for capsule
authentication into the platform's device tree.
The embedding of the public key would take place during the platform
build process.
Signed-off-by: Sughosh Ganu
---
Ch
On Mon, Apr 12, 2021 at 08:51:11AM -0500, Alex G. wrote:
>
>
> On 4/12/21 8:25 AM, Tom Rini wrote:
> > On Fri, Apr 09, 2021 at 05:29:36PM -0700, Tim Harvey wrote:
> > > On Fri, Apr 9, 2021 at 1:53 PM Tom Rini wrote:
> > > >
> > > > On Fri, Apr 09, 2021 at 03:24:41PM -0500, Adam Ford wrote:
> >
On 4/12/21 8:25 AM, Tom Rini wrote:
On Fri, Apr 09, 2021 at 05:29:36PM -0700, Tim Harvey wrote:
On Fri, Apr 9, 2021 at 1:53 PM Tom Rini wrote:
On Fri, Apr 09, 2021 at 03:24:41PM -0500, Adam Ford wrote:
On Fri, Apr 9, 2021 at 2:20 PM Alex G. wrote:
Hi Simon
On 4/8/21 6:55 PM, Simon Gla
From: Matthias Brugger
Enable this driver to allow U-Boot to get SMBIOS table information from
a device tree node.
Signed-off-by: Matthias Brugger
Acked-by: Fabian Vogt
---
Changes in v2:
- fix typo in commit message
configs/rpi_0_w_defconfig | 2 ++
configs/rpi_2_defconfig| 2
From: Matthias Brugger
At present SMBIOS tables are empty, which breaks some use-cases that
rely on that. Add some minimal information to fulfill this.
Signed-off-by: Matthias Brugger
---
Changes in v2:
- drop product from chassi
- fix typo in commit message
arch/arm/dts/bcm283x-u-boot.dtsi
On Fri, Apr 09, 2021 at 03:13:25PM +0200, Fabian Vogt wrote:
> Am Freitag, 9. April 2021, 14:35:10 CEST schrieb matthias@kernel.org:
> > From: Matthias Brugger
> >
> > At present SMBIOS tables are emtpy,
> ^ typo
>
> > which breaks some use-cases that rely on
On Fri, Apr 09, 2021 at 05:29:36PM -0700, Tim Harvey wrote:
> On Fri, Apr 9, 2021 at 1:53 PM Tom Rini wrote:
> >
> > On Fri, Apr 09, 2021 at 03:24:41PM -0500, Adam Ford wrote:
> > > On Fri, Apr 9, 2021 at 2:20 PM Alex G. wrote:
> > > >
> > > > Hi Simon
> > > >
> > > > On 4/8/21 6:55 PM, Simon Gla
According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.
Also, updat
Hello,
I am facing a strange/weird issue when trying to access to filesystem
based (/boot/uboot.env) in STM32MP157c-dk2 evaluation board.
Uboot is 2020.07-rc5 from github, the board DEVICETREE is
stm32mp157c-dk2, the kernel is from Robert C.Nelson repository (from
DigiKey EEWiki) and it is 5.12
On Fri, Apr 9, 2021 at 6:48 PM Heinrich Schuchardt wrote:
>
> The ebreak instruction should generate a breakpoint exception.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> cmd/riscv/exception.c | 10 ++
> doc/usage/exception.rst | 3 +++
> 2 files changed, 13 insertions(+)
>
Reviewed
From: Ye Li
According to latest S400 API doc, the the success indicate value is
changed to 0xd6. So update the driver codes.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
drivers/misc/imx8ulp/imx8ulp_mu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/imx8
From: Ye Li
Add MU driver and S400 API. Need enable MISC driver to work
Signed-off-by: Ye Li
---
arch/arm/include/asm/arch-imx8ulp/s400_api.h | 30 +++
arch/arm/include/asm/global_data.h | 5 +
drivers/misc/Makefile| 1 +
drivers/misc/imx8ulp/Makefile
From: Ye Li
Read from ROM API to get current boot device.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 1 +
arch/arm/mach-imx/imx8ulp/soc.c | 83 +++
2 files changed, 84 insertions(+)
diff --git a/arch/arm/inc
From: Peng Fan
Add i.MX8ULP dtsi
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8ulp-pinfunc.h| 978 ++
arch/arm/dts/imx8ulp.dtsi | 706
include/dt-bindings/clock/imx8ulp-clock.h | 247 ++
3 files changed, 1931 insertions(+)
cr
From: Peng Fan
Add i.MX8ULP clock support
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/cgc.h | 130 ++
arch/arm/include/asm/arch-imx8ulp/clock.h| 9 +-
arch/arm/include/asm/arch-imx8ulp/imx-regs.h | 1 +
arch/arm/include/asm/arch-imx8ulp/pcc.h | 139 +
From: Peng Fan
Add imx_get_mac_from_fuse for enet build pass
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 733654f7ba..e999cbca73 100644
--- a/arch/arm
From: Peng Fan
Add i.MX8ULP iomuxc support
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/iomux.h | 82 +++
arch/arm/mach-imx/imx8ulp/iomux.c | 63 -
2 files changed, 144 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/includ
From: Ye Li
SRAM2 is half L2 cache and default to SRAM after system boot.
To enable the full l2 cache (512KB), it needs to reset A35 to make
the change happen.
So re-implement the jump entry function in SPL:
1. configure the core0 reset vector to entry (ATF)
2. enable the L2 full cache
3. reset
From: Peng Fan
Support i.MX8ULP in fec_mxc
Signed-off-by: Peng Fan
---
drivers/net/Kconfig | 2 +-
drivers/net/fec_mxc.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index cf062fad4d..a443b499ba 100644
--- a/drivers/net/Kcon
From: Peng Fan
i.MX8ULP reuse same SDHC IP as i.MX8M, so follow i.MX8M code logic.
Signed-off-by: Peng Fan
---
drivers/mmc/Kconfig | 2 +-
drivers/mmc/fsl_esdhc_imx.c | 12
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kc
From: Ye Li
Add pinctrl driver for i.MX8ULP
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
drivers/pinctrl/nxp/Kconfig | 14 +
drivers/pinctrl/nxp/Makefile | 1 +
drivers/pinctrl/nxp/pinctrl-imx8ulp.c | 44 +++
3 files changed, 59 insertio
From: Peng Fan
Add TRDC release request, then we could configure resources to be
accessible by A35 Domain.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 26 +-
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c
From: Peng Fan
i.MX8ULP lpuart has same register layout as i.MX7ULP and i.MX8
Signed-off-by: Peng Fan
---
include/fsl_lpuart.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
index 511fb84367..18e5cc15d6 100644
--- a/include/fsl_l
From: Peng Fan
Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART
Note: upower API currently not included.
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8ulp-emulator-u-boot.dtsi | 32 +
arch/arm/dts/imx8ulp-emulator.dts | 93 +
arch/arm/dts/imx8ulp-evk-u-boot.dtsi
From: Ye Li
Configure DCNANO and MIPI_DSI to be controlled by AD for single boot
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 3fd49
From: Ye Li
This driver uses FSB to read some fuses, but not support program fuse.
It only works in SPL (secure mode), u-boot needs traps to ATF to
read them.
Some fuses can read from S400 API and others are from FSB.
Also support program some fuses via S400 API
Signed-off-by: Ye Li
---
drive
From: Ye Li
Need probe the S400 MU device in arch_cpu_init_dm, so we can use
S400 API in u-boot
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 35 -
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-
From: Peng Fan
Rlease LPAV from RTD to APD
Release gpu2D/3D to APD
Set TRDC MBC2 MEM1 for iomuxc0 access
Since upower depends AP/M33 SW to configure IOMUX for its PMIC i2c
and MODE pins. we have to open iomuxc0 access for A35 core (domain 7)
in single boot.
Signed-off-by: Peng Fan
Signed-off-by
From: Ye Li
Since S400 will set the memory of SPL image to R/X. We can't write
to any data in SPL image.
1. Set the parameters save/restore only for u-boot, not for SPL. to
avoid write data.
2. Not use MU DM driver but directly call MU API to send release XRDC
to S400 at early phase.
3. Co
From: Peng Fan
There is xrdc inside i.MX8ULP, we need to configure permission to make
sure AP non-secure world could access the resources.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 2 +
arch/arm/mach-imx/imx8ulp/Makefile| 2 +-
arch/arm/mach-im
From: Ye Li
Add API to support fuse read and write
Signed-off-by: Ye Li
---
arch/arm/include/asm/arch-imx8ulp/s400_api.h | 7 +-
drivers/misc/imx8ulp/s400_api.c | 81
2 files changed, 87 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-imx
From: Ye Li
The RDC API is updated to add a field for XRDC or TRDC
Signed-off-by: Ye Li
---
arch/arm/include/asm/arch-imx8ulp/s400_api.h | 2 +-
drivers/misc/imx8ulp/s400_api.c | 7 +--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-im
From: Ye Li
Add S400 API for image authentication
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/s400_api.h | 8 +-
drivers/misc/imx8ulp/s400_api.c | 121 ++-
2 files changed, 127 insertions(+), 2 deletions(-)
diff --git a/ar
From: Peng Fan
Disable wdog3 which is configured by ROM
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 36 -
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index be7d
From: Ye Li
Because we have set reset vector to ATF in SPL, have to set it back
to ROM for any reset in u-boot
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 35 +
1 file changed, 22 insertions(+), 13 deletions(-)
diff --git
From: Ye Li
CMC1 also has a MR register for bootcfg
Signed-off-by: Ye Li
---
arch/arm/mach-imx/imx8ulp/soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 5d291f6b3a..8f34eccfc2 100644
--- a/arch/arm/
From: Ye Li
i.MX8ULP support using ROM API to load container image,
it use same ROM API as i.MX8MN/MP, and use same container format
as i.MX8QM/QXP.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 2 +
arch/arm/include/asm/mach-imx/image.h
From: Peng Fan
Since i.MX8 and i.MX8ULP reuse common container, so move the Kconfig
public to both.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/Kconfig | 13 +
arch/arm/mach-imx/imx8/Kconfig | 13 -
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a
From: Peng Fan
Guard included sci.h with CONFIG_AHAB_BOOT to avoid build failure
for i.MX8ULP
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/parse-container.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/parse-container.c
b/arch/arm/mach-imx/parse-container.c
index e
From: Ye Li
Since we will re-use the container parser on imx8ulp, move the codes
to mach-imx
Signed-off-by: Ye Li
---
arch/arm/mach-imx/Makefile| 4
arch/arm/mach-imx/{imx8/image.c => image-container.c} | 0
arch/arm/mach-imx/imx8/Makefile
From: Ye Li
Since the container is shared among i.MX platforms, move its header file
to mach-imx
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/include/asm/{arch-imx8 => mach-imx}/image.h | 0
arch/arm/mach-imx/cmd_dek.c | 2 +-
arch/arm/mach-imx/image-cont
From: Peng Fan
Add basic i.MX8ULP support
For the MMU part, Using a simple way the calculate the MMU size to avoid
default heavy calcaulation. And align address and size in the table
settings to 2MB or 4GB as much as possible. So we can reduce the 4K page
allocations in MMU table which will spen
From: Peng Fan
Add get reset cause function to show what triggerred reset.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 69 +
1 file changed, 69 insertions(+)
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index
From: Peng Fan
These defines could be reused by i.MX8ULP, so move them
to common header.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-mx7ulp/sys_proto.h | 9 -
arch/arm/include/asm/mach-imx/sys_proto.h| 10 ++
2 files changed, 10 insertions(+), 9 deletions(-)
dif
From: Peng Fan
Support print cpu info. the clock function has not been added, it will
be added in following patches.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 3 +
arch/arm/mach-imx/imx8ulp/soc.c | 59 +++
2 files changed, 62 ins
From: Peng Fan
Add i.MX8ULP cpu type and helpers.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx/cpu.h | 2 ++
arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 11 +++
arch/arm/include/asm/mach-imx/sys_proto.h | 1 +
arch/arm/mach-imx/imx8ulp/soc.c
From: Peng Fan
The i.MX 8ULP crossover applications processor family brings
ultra-low power processing and advanced integrated security with
EdgeLockTM secure enclave to the intelligent edge.
This patchset is to add initial support for i.MX8ULP, with
core soc functions, clock, dtsi, and evk boar
From: Peng Fan
Add i.MX8ULP related basic Kconfig option, which will be used later.
Signed-off-by: Peng Fan
---
arch/arm/Kconfig | 10 ++
arch/arm/mach-imx/imx8ulp/Kconfig | 16
2 files changed, 26 insertions(+)
create mode 100644 arch/arm/mach-imx/im
From: Peng Fan
cmd_tbl_t is removed, need use struct cmd_tbl
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_mfgprot.c | 2 +-
arch/arm/mach-imx/priblob.c | 2 +-
cmd/cmd_fsl_caam.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-imx/cmd_
From: MengLi
In latest u-boot code, watchdog feature is implemented, so enable
wdt command by default.
Signed-off-by: Meng Li
---
configs/socfpga_stratix10_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/socfpga_stratix10_defconfig
b/configs/socfpga_stratix10_defconfig
i
From: MengLi
In uboot command line environment, watchdog is not able to be
stopped with below commands:
SOCFPGA_STRATIX10 # wdt dev watchdog@ffd00200
SOCFPGA_STRATIX10 # wdt stop
Refer to watchdog driver in linux kernel, it is also need to reset
watchdog after disable it so that the disable actio
The pwm_sifive_set_config() and pwm_sifive_set_enable() cannot work
properly due to the wrong implementations. It will cause the u-boot
PWM command to not work as expected. The bugs will be resolved in this
patch.
Signed-off-by: Vincent Chen
---
drivers/pwm/pwm-sifive.c | 21 +++-
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