From: Haibo Chen
On imx6Q/imx6DL, we find if config the DTOCV to 0~3, it will impact
cmd6 behavior, after cmd6 get transfer complete interrupt, the data0
line will keep low over 5 seconds. This should be a IC bug on imx6Q/DL.
For other platforms, do not has this issue.
To fix this issue, fix the
On 21/02/20 04:02:p, Asherah Connor wrote:
> Updates the QFW driver to use the driver model, and adds support for QFW
> on Arm platforms by configuring from the device tree and using MMIO
> accordingly.
>
> Signed-off-by: Asherah Connor
> ---
>
> (no changes since v1)
"no changes since v1" is m
Updates the QFW driver to use the driver model, and adds support for QFW
on Arm platforms by configuring from the device tree and using MMIO
accordingly.
Signed-off-by: Asherah Connor
---
(no changes since v1)
arch/arm/Kconfig | 1 +
arch/x86/cpu/qemu/cpu.c | 7 +-
arch/x86/cpu/qe
Version 2 of this series explores moving the QFW driver to the driver
model. We configure QFW on Arm from the device tree, while x86 uses a
U_BOOT_DRVINFO. All the logic for talking PIO/MMIO/DMA now lives in the
QFW driver.
I've moved all the static variables from the qfw driver into its priv
da
On Fri, 19 Feb 2021 16:27:41 +0100
Giulio Benetti wrote:
Hi Giulio,
> On 2/19/21 12:37 PM, Andre Przywara wrote:
> > On Fri, 19 Feb 2021 11:12:08 +0100
> > Giulio Benetti wrote:
> >
> > Hi,
> >
> >> On 2/19/21 2:44 AM, Andre Przywara wrote:
> >>> On Fri, 19 Feb 2021 00:26:19 +0100
> >>> G
Hello Heinrich,
On 21/02/19 06:02:p, Heinrich Schuchardt wrote:
> virtio-gpu is an alternative to ramfb. Why are you targeting ramfb and
> not virtio-gpu? Which impact does it have on the guest OS?
It happens to be what I'm already using, and the interface appears quite
simple. I am hacking on a
On 21/02/19 06:02:p, Heinrich Schuchardt wrote:
> drivers/misc/qfw.c should be converted to the driver model instead of
> initializing the driver in arch_early_init_r() on qemu-arm and
> qemu_chipset_init() on qemu-x86.
>
> Cf. https://u-boot.readthedocs.io/en/latest/driver-model/index.html
>
> P
Hi Tom,
please pull the master branch from u-boot-sunxi, containing some fixes
for 2021.04:
-
- H616 clock fix to enable video PLL
- sunxi-common.h cleanups
- support for UART1 as the console on sun8i
- removing wrong linux,stdout-path from DTs
-
Bu
Hello,
I need to know if u-boot currently supports the Marvell PHY 88X3540 device.
(Product brief here:
https://jp.marvell.com/content/dam/marvell/en/public-collateral/phys-transceivers/marvell-phys-transcievers-alaska-x-88x3540-product-brief-2020-05.pdf)
We will be using u-boot on LX2160A-base
On Fri, Feb 19, 2021 at 07:05:53AM +, Peng Fan (OSS) wrote:
> Hi Tom,
>
> Please pull mmc-2021-2-19
>
> Sorry for delay, I have been quite busy in the past days.
> =
> mmc_spi improvement
> added mmc-pwrseq to remove duplicated code
> fix response timeout after switch com
This is a draft patch to describe the problem and to initiate
a discussion for solution.
PRAM usage is not taken into account when reserving lmb for ARM
architecture, this means that predefined PRAM region is reserved
by the u-boot and cannot be used by the u-boot users.
In our case this bug lead
On Fri, Feb 19, 2021 at 12:28:16PM -0600, Alex G. wrote:
> Hi,
>
> I keep being hit by two frustrating issues when trying to run tests. My
> expectation is that I can run a test at any time when working on something
> -- usually to check the correctness of that something. That's not the case
> to
On Fri, Feb 19, 2021 at 01:55:44PM +0800, Siew Chin Lim wrote:
> From: Dalon Westergreen
>
> Some architectures, Stratix10/Agilex, require a hex formatted spl that
> combines the spl image and dtb. This adds a target to create said hex
> file with and offset of SPL_TEXT_BASE.
>
> Signed-off-by
On Thu, Feb 18, 2021 at 08:39:42PM +, Peter Robinson wrote:
> On Thu, Feb 18, 2021 at 8:36 PM Heinrich Schuchardt
> wrote:
> >
> > On 18.02.21 21:06, Peter Robinson wrote:
> > > In 8a8d24bd Simon dropped data from all the various _platdata calls
> > > but it seems this wasn't caught for the R
Hi,
I would like to perform a RAM test at the bootloader level. My board is a
beaglebone board. The problem is that my beaglebone board isn't booting
successfully. The kernel is crashing with "Unable to handle kernel paging
request at virtual address" I suspect it could be something to do with
RA
Keys can be derived from keydir, and the "key-name-hint" property of
the FIT. They can also be specified ad-literam via 'keyfile'. Update
the RSA signing path to use the appropriate one.
Signed-off-by: Alexandru Gagniuc
Reviewed-by: Simon Glass
---
lib/rsa/rsa-sign.c | 34 ++
Keys can be derived from keydir, and the "key-name-hint" property of
the FIT. They can also be specified ad-literam via 'keyfile'. Update
the ECDSA signing path to use the appropriate one.
Signed-off-by: Alexandru Gagniuc
Reviewed-by: Simon Glass
---
lib/ecdsa/ecdsa-libcrypto.c | 14 +++
Originally, the ECDSA code path used 'keydir' as the key filename.
mkimage has since been updated to include a new 'keyfile' argument.
Use the new argument for passing in the key.
Signed-off-by: Alexandru Gagniuc
---
test/py/tests/test_fit_ecdsa.py | 2 +-
1 file changed, 1 insertion(+), 1 delet
It's not always desirable to use 'keydir' and some ad-hoc heuristics
to get the filename of the signing key. More often, just passing the
filename is the simpler, easier, and logical thing to do.
Since mkimage doesn't use long options, we're slowly running out of
letters. I've chosen '-G' because
mkimage supports rsa2048, and rsa4096 signatures. With newer silicon
now supporting hardware-accelerated ECDSA, it makes sense to expand
signing support to elliptic curves.
Implement host-side ECDSA signing and verification with libcrypto.
Device-side implementation of signature verification is be
After lots of debating, this documents how we'd like mkimage to treat
'keydir' and 'keyfile' arguments. The rest is in the docs.
Signed-off-by: Alexandru Gagniuc
Reviewed-by: Simon Glass
---
doc/uImage.FIT/signature.txt | 13 +
1 file changed, 13 insertions(+)
diff --git a/doc/uIma
Add a test to make sure that the ECDSA signatures generated by
mkimage can be verified successfully. pyCryptodomex was chosen as the
crypto library because it integrates much better with python code.
Using openssl would have been unnecessarily painful.
Signed-off-by: Alexandru Gagniuc
Reviewed-by
fdt_add_bignum() is useful for algorithms other than just RSA. To
allow its use for ECDSA, move it to a common file under lib/.
The new file is suffixed with '-libcrypto' because it has a direct
dependency on openssl. This is due to the use of the "BIGNUM *" type.
Signed-off-by: Alexandru Gagniuc
Signed-off-by: Alexandru Gagniuc
Reviewed-by: Simon Glass
---
doc/uImage.FIT/signature.txt | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
index a3455889ed..0139295d33 100644
--- a/doc/uImage.FIT/signature.txt
We wish to use pycryptodomex to verify code paths involving ECDSA
signatures. Add it to requirements.txt so that they get picked up
automatically .gitlab and .azure tasks
Signed-off-by: Alexandru Gagniuc
Reviewed-by: Simon Glass
---
test/py/requirements.txt | 1 +
1 file changed, 1 insertion(+)
rsa-checksum.c sontains the hash_calculate() implementations. Despite
the "rsa-" file prefix, this function is useful for other algorithms.
To prevent confusion, move this file to lib/, and rename it to
hash-checksum.c, to give it a more "generic" feel.
Signed-off-by: Alexandru Gagniuc
Reviewed-
## Purpose and intent
The purpose of this series is to enable ECDSA as an alternative to RSA
for FIT signing. As new chips have built-in support for ECDSA verified
boot, it makes sense to stick to one signing algorithm, instead of
resorting to RSA for u-boot images.
The focus of this series is si
Hi,
I keep being hit by two frustrating issues when trying to run tests. My
expectation is that I can run a test at any time when working on
something -- usually to check the correctness of that something. That's
not the case today.
The first one is an error message about mrproper:
This commmit exercises the ESRT creation -- introduced in the previous
commit -- in two tests.
test 1:
A fake FMP, with TEST_ESRT_NUM_ENTRIES FW images, is installed in the
system leading to the corresponding ESRT entries being populated.
The ESRT entries are checked against the datastructure u
The ESRT is initialised during efi_init_objlist after
efi_initialize_system_table().
The ESRT is initially created with size for 50 FW image entries.
The ESRT is resized when it runs out of space. Every resize adds 50
additional entries.
The ESRT is populated from information provided by FMP insta
The following 2 commits add the ESRT and provide a test of the
functionality.
The first commit adds the ESRT as defined in the UEFI 2.8 specification.
An empty ESRT is created during the execution of the efi_init_obj_list().
The ESRT is updated when:
1) a FMP protocol is installed in the system:
On 24/01/2021 16:19, Alexandre GRIVEAUX wrote:
Hi Alexandre,
(CCing: Kory, plus using Maxime's and Boris' newer emails)
> This patch split CHIP defconfig to add nand 4G and 8G support.
>
> Some CONFIG was put at the end of defconfig to ease comparison between:
> - CHIP Pro
> - CHIP with Toshiba
On Fri, 19 Feb 2021 11:54:54 -0500
Tom Rini wrote:
Hi,
> On Thu, Feb 18, 2021 at 02:29:36PM +0100, Kory Maincent wrote:
>
> > Add the extension_board_scan specific function to scan the information
> > of the EEPROM on one-wire and fill the extension struct.
> >
> > Signed-off-by: Kory Maincent
And also pinging this series, since we had our answer from Thomas
Petazzoni :)
Just pinging this series :)
On Wed, Jan 20, 2021 at 10:46:56AM -0600, Alexandru Gagniuc wrote:
> When a FIT config specifies a devicetree, we should load it, no
> questions asked. In the case of the "simple" FIT loading path, a
> difficulty arises in selecting the load address of the FDT.
>
> The default FDT location is rig
On Wed, Jan 20, 2021 at 10:46:55AM -0600, Alexandru Gagniuc wrote:
> Use the IS_ENABLED() macro to control code flow, instead of the
> caveman approach of sprinkling #ifdefs. Code size is not affected, as
> the linker garbage-collects unused functions. However, readability is
> improved significan
On Wed, Jan 20, 2021 at 10:46:54AM -0600, Alexandru Gagniuc wrote:
> There's no point in guarding function prototypes with #ifdefs. If a
> function is not defined, the linker will notice. Having the prototype
> does not affect code size.
>
> What the #if guard takes away is the ability to use IS_
On Wed, Jan 20, 2021 at 10:46:53AM -0600, Alexandru Gagniuc wrote:
> The configuration node a sub node under "/configurations", which
> describes the components to load from "/images". We only need to
> locate this node once.
>
> However, for each component, spl_fit_get_image_name() would parse t
On Wed, Jan 20, 2021 at 10:46:52AM -0600, Alexandru Gagniuc wrote:
> When a desired configuration is not found, conf_node will have a
> negative value. Thus the for loop will start at the root "/" node of
> the image, print the "/description" property, and stop.
>
> It appears the intent of the l
On Wed, Jan 20, 2021 at 10:46:51AM -0600, Alexandru Gagniuc wrote:
> Several loose arguments describe the FIT image. They are thus related,
> and it makes sense to pass them together, in a structure. Examples
> include the FIT blob pointer, offset to FDT nodes, and the offset to
> external data.
>
On Wed, Jan 20, 2021 at 10:46:50AM -0600, Alexandru Gagniuc wrote:
> The logical steps in spl_load_simple_fit() are difficult to follow.
> I think the long comments, ifdefs, and ungodly number of variables
> seriously affect the readability. In particular, it violates section 6
> of the coding sty
On Thu, Feb 18, 2021 at 02:29:38PM +0100, Kory Maincent wrote:
> Update the Kconfig and the board file to make the am335x board compatible
> with cape detection.
>
> Signed-off-by: Kory Maincent
> ---
> arch/arm/mach-omap2/am33xx/Kconfig | 1 +
> board/ti/am335x/board.c| 1 +
> incl
On Wed, Jan 20, 2021 at 10:46:49AM -0600, Alexandru Gagniuc wrote:
> The size is derived from the FIT image itself. Any alignment
> requirements are machine-specific and known by the board code. Thus
> the total length can be derived from the FIT image and knowledge of
> the platform. The 'length'
On Thu, Feb 18, 2021 at 02:29:36PM +0100, Kory Maincent wrote:
> Add the extension_board_scan specific function to scan the information
> of the EEPROM on one-wire and fill the extension struct.
>
> Signed-off-by: Kory Maincent
> ---
> arch/arm/mach-sunxi/Kconfig | 2 +
> board/sunxi/Makefile
On Thu, Feb 18, 2021 at 02:29:35PM +0100, Kory Maincent wrote:
> The CHIP board use one-wire EEPROM to discover and identify extension
> boards (called "DIPs").
>
> This commit add the configuration for the CHIP board target to enable the
> EEPROM one-wire driver.
>
> Signed-off-by: Kory Maincent
On Thu, Feb 18, 2021 at 02:29:34PM +0100, Kory Maincent wrote:
> Add the EEPROM description in the devicetree for the CHIP board.
>
> Signed-off-by: Kory Maincent
> ---
> arch/arm/dts/sun5i-r8-chip.dts | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/dts/sun5i-r8-chip.dts
On Thu, Feb 18, 2021 at 02:29:30PM +0100, Kory Maincent wrote:
> This patch adds a new "extension" command, which aims at detecting
> extension boards connected to the hardware platform, and apply the
> Device Tree overlays that describe the hardware present on those
> extension boards.
>
> In or
On Thu, Feb 18, 2021 at 02:29:29PM +0100, Kory Maincent wrote:
> Move the fdt_valid function to fdt_support.
> This changes allow to be able to test the validity of a devicetree in
> other c files.
>
> Update code syntax.
>
> Signed-off-by: Kory Maincent
Reviewed-by: Tom Rini
--
Tom
signa
Hi Marek,
On 19.02.21 17:13, Marek Behún wrote:
On Fri, 19 Feb 2021 08:38:48 +0100
Stefan Roese wrote:
Hi Marek,
On 18.02.21 20:56, Marek Behun wrote:
Chris put his Tested-by on this series and noone else replyied to
it. What do you think about this?
How about the issue of size increase i
On Fri, 19 Feb 2021 08:38:48 +0100
Stefan Roese wrote:
> Hi Marek,
>
> On 18.02.21 20:56, Marek Behun wrote:
> > Chris put his Tested-by on this series and noone else replyied to
> > it. What do you think about this?
>
> How about the issue of size increase in the SPL? IIRC, then one patch
>
Bump version of a38x DDR3 trianing to version 14.0.0 to reflect the
version in the mv-ddr-devel branch of upstream repository
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
There is a new version numbering system, where after 18.12.0 came
1.0.0, 2.0.0, and so on until 14.0.0. So
The code was processed with unifdef utility to omit portions not
relevant to A38x and DDR3. This removes usage of many macros, including
A70X0, A80X0 and A3900. It seems that the unifdef utility did not remove
the macros from #else comment.
Signed-off-by: Marek Behún
Tested-by: Chris Packham
---
From: heaterC
commit 56db5d1464b44df10a02b99e615ebd6f6a35c428 upstream.
@pali suggested this change
In commit 6285efb ("mv_ddr: add support for twin-die combined memory
device") was added support for twin-die combined memory device and
default value for explicitly uninitialized structure members
From: Moti Buskila
commit c8b301463d508c807a33f7b7eaea98bbda4aa35e upstream.
The funtion returnd cs size in byte instead of MB, that cause
calculation error since the caller was expected to get u32 and when he
got above 4G it refers it as 0.
The fix was to get the cs memory size from function as
From: Baruch Siach
commit 2d3b9437cf38c06c4330e0de07f29476197f5e04 upstream.
The ODT enable heuristic based on active chip-selects is not always
correct. Some board might use two chip-selects, but have only one ODT
line connected. Allow board specific mv_ddr_topology_map to directly set
the ODT
From: Moti Buskila
commit 994509eb4fe6771d92cd06314c37895098ac48fa upstream.
Signed-off-by: Moti Buskila
Reviewed-by: Kostya Porotchkin
Signed-off-by: Marek Behún
Tested-by: Chris Packham
---
drivers/ddr/marvell/a38x/ddr3_training_ip_def.h | 2 ++
drivers/ddr/marvell/a38x/mv_ddr_topology.c
From: Moti Buskila
commit 20c89a28548cdab11f88d2ec8936344af0686a1e upstream.
WL phase correcion stage is failing while using bus_width of 16bit, not
to be fix this stage is un-necessary when working with bus_width of 16
bit.
Signed-off-by: Moti Buskila
Reviewed-by: Kostya Porotchkin
Signed-of
commit 2bdd12dd68b1f8e27a03a3443ae49a09a14c18e4 upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes code in ddr3_training.c.
Import this change to remain consistent with upstream.
Signed-off-by: Marek Behún
Tested-by: Chris Packham
---
drivers/ddr/marv
commit d653b305d0b3da9727c49124683f1a6d95d5c9a5 upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes header ddr_topology_def.h.
Import this header change to remain consistent with upstream.
Signed-off-by: Marek Behún
Tested-by: Chris Packham
---
drivers
From: Moti Buskila
commit 6285efb8a118940877522c4c07bd7c64569b4f5f upstream.
the twin-die combined memory device should be treatened as X8
device and not as X16 one
Signed-off-by: Moti Buskila
Reviewed-by: Kostya Porotchkin
[ - the default value for twin_die_combined is set to NOT_COMBINED fo
commit 3908e20c6c520339e9bddb566823ae5e065d5218 upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes header ddr_topology_def.h.
Import this header change to remain consistent with upstream.
Signed-off-by: Marek Behún
Tested-by: Chris Packham
---
drivers
From: Moti Buskila
commit ab9240402a70cc02496683971779e75eff410ab4 upstream.
- function mv_ddr_spd_die_capacity_user_get() has a bug,
since it insert a user memory enum to it,
instead of SPD memory enum (which are different)
- fix: remove mv_ddr_spd_die_capacity_user_get() function.
- memory
From: Moti Buskila
commit 0b5adedd4ced9b8f528faad1957d4d69e95759ef upstream.
Signed-off-by: Moti Buskila
Reviewed-by: Alex Leibovich
Reviewed-by: Kostya Porotchkin
Signed-off-by: Marek Behún
Tested-by: Chris Packham
---
drivers/ddr/marvell/a38x/mv_ddr_topology.c | 2 +-
1 file changed, 1 i
From: Alex Leibovich
commit 61a8910998d7b553e80f600ebe8147a8b98f0945 upstream.
Required changes made for 32bit ddr support.
An update is made to the topology map, according to
bus_act_mask, set in the dram_port.c
Signed-off-by: Alex Leibovich
Reviewed-by: Kostya Porotchkin
Signed-off-by: Mare
commit 6c705ebc0d70f67ed7cae83ad1978c3305ef25be upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes header mv_ddr_topology.h.
Import this header change to remain consistent with upstream.
Signed-off-by: Marek Behún
Tested-by: Chris Packham
---
drivers/
From: Moti Buskila
commit ce62bef8fac559e27245259882e45f19cdc293ad upstream.
- fix JIRA A7K8K-5056
- remove TEST_PATTERN write at the load patern stage earlier to WL SUP stage
- the WL SUP stage already writes this pattern to the memory, if the pattern
exist at the memory
then the algorithm w
From: Alex Leibovich
commit 32800667b375ebd1f82120da0f3479b1cf52d96d upstream.
Required changes made for 32bit ddr support.
An update is made to the topology map, according to
bus_act_mask, set in the dram_port.c
Signed-off-by: Alex Leibovich
Reviewed-by: Nadav Haklai
Reviewed-by: Kostya Poro
Hi Stefan,
this is v2 of series that syncs drivers/ddr/marvell/a38x/ with the
mv-ddr-devel branch of
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
I have tested how the SPL image increases for all a38x boards.
Here are sizes of spl/u-boot-spl.bin before applying this series
(in
commit a165037ec26f301be75e1fabc263643683e85255 upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes header ddr_topology_def.h.
Import this header change to remain consistent with upstream.
Signed-off-by: Marek Behún
Tested-by: Chris Packham
---
drivers
Hi Andre,
On 2/19/21 12:37 PM, Andre Przywara wrote:
On Fri, 19 Feb 2021 11:12:08 +0100
Giulio Benetti wrote:
Hi,
On 2/19/21 2:44 AM, Andre Przywara wrote:
On Fri, 19 Feb 2021 00:26:19 +0100
Giulio Benetti wrote:
Hi Giulio,
From: Giulio Benetti
Add support for Micronova srl s027_3
On 2/19/21 3:47 AM, Алексей Беляев wrote:
Hello!
I'm trying to make FIT Kernel+dtb image for U-Boot.
```
mkimage -E -f Image.its Image.new
```
Image.its:
```
/dts-v1/;
/ {
description = "ARM64 OpenWrt FIT (Flattened Image Tree)";
#address-cells = <1>;
images {
On Tue, Feb 09, 2021 at 06:34:06PM +0100, Marek Behún wrote:
> When the btrfs_read_fs_root() function is searching a ROOT_ITEM with
> location key offset other than -1, it currently fails via BUG_ON.
>
> The offset can have other value than -1, though. This can happen for
> example if a subvolume
Hi all,
While backporting the latest USB support in U-Boot to support USB 3 hubs I
decided to try the latest U-Boot for Octeon which should contain everything.
When I start USB, however, with a USB 3 thumb drive plugged into a USB 3 hub,
I am seeing a crash. I have enabled all of the debugging
Hi Christian,
On Fri, Feb 19, 2021 at 10:32 AM Christian Bräuner Sørensen
wrote:
>
> This patch sets SPI MODE 3 for the fairchild 74HC595 device that is used
> to reset the ethernet device, which fixes ethernet.
>
> Reasoning:
> The imx7dsabresd board uses SPI for setting the extended IO.
> One o
Fix inline comments and empty line in scmi driver and test files.
Remove test on IS_ENABLED(CONFIG_*_SCMI) in test/dm/scmi.c since these
configuration are expected enabled when CONFIG_FIRMWARE_SCMI is enabled
in sandbox configuration.
Signed-off-by: Etienne Carriere
---
Changes in v2:
- discard
Implement sandbox regulator devices for SCMI voltage domains
and test them in DM scmi tests.
Signed-off-by: Etienne Carriere
---
Changes in v2:
- don't test IS_ENABLED(CONFIG_DM_REGULATOR_SCMI) in test/dm/scmi.c,
it's expected enabled when CONFIG_FIRMWARE_SCMI is enabled in sandbox.
---
arch
Implement voltage regulators interfaced by the SCMI voltage domain
protocol. The DT bindings are defined in the Linux kernel since
SCMI voltage domain and regulators patches [1] and [2] integration
in v5.11-rc7.
Link: [1]
https://github.com/torvalds/linux/commit/0f80fcec08e9c50b8d2992cf2649567376
Enable SPI clock for imx8mp
Signed-off-by: Steffen Arendt
---
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index c77500bcce..b31afb31c0 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -116,6 +116,20 @@ static const char *imx8mp_i2c6_sel
Enable SPI clock for imx8mp
Signed-off-by: Steffen Arendt
---
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b31afb31c0..c8a0b4549b 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -130,6 +130,15 @@ static const char *imx8mp_ecspi3_s
This patch sets SPI MODE 3 for the fairchild 74HC595 device that is used
to reset the ethernet device, which fixes ethernet.
Reasoning:
The imx7dsabresd board uses SPI for setting the extended IO.
One of the purposes of this extended IO, is having the ability to set
ENET_RST i.e. reset the etherne
On Fri, Feb 19, 2021 at 01:04:22PM +, André Przywara wrote:
> On 10/02/2021 02:42, Tom Rini wrote:
>
> Hi Tom,
>
> > This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.
> > The
> > deadline for this conversion was the v2019.07 release. The use of
> > CONFIG_AHCI
> >
Hi Ahmad,
On 2/11/21 12:14 PM, Ahmad Fatoum wrote:
Hi,
On 10.02.21 20:59, Tom Rini wrote:
On Tue, Feb 09, 2021 at 08:51:26PM +0100, Patrick DELAUNAY wrote:
On 2/9/21 11:39 AM, Marek Vasut wrote:
On 2/9/21 11:14 AM, Patrick Delaunay wrote:
Hi,
[...]
diff --git a/drivers/usb/gadget/dwc2_udc
On 10/02/2021 02:42, Tom Rini wrote:
Hi Tom,
> This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
> deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
> requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
> this board
This patch enables USB storage support with the necessary partition
support on the MIPS Octeon EBB7304.
Signed-off-by: Stefan Roese
Cc: Aaron Williams
Cc: Chandrakala Chavva
---
configs/octeon_ebb7304_defconfig | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/configs/oct
On 17/02/2021 16:19, Nicolas Boulenguez wrote:
Hi Nicolas,
> Please consider the attached suggestions for the sunxi/pinephone
> platform.
> Among commits written for and by Mobian users, these ones may be of
> interest for all pinephone owners.
> Each header mentions the original motivation and a
Add i.MX8QM qmx8 congatec board support
U-Boot 2021.04-rc1-00070-gcc181a2ad4 (Feb 19 2021 - 13:15:49 +0100)
CPU: NXP i.MX8QM RevB A53 at 1200 MHz
Model: Congatec QMX8 Qseven series
Board: conga-QMX8
Build: SCFW 494c97f3, SECO-FW d7523fe8, ATF 09c5cc9
Boot: SD2
DRAM: 6 GiB
MMC: FSL_SDHC: 0,
On 16/02/2021 08:31, Игорь Юрасов wrote:
Hi,
> Signed-off-by: Igor Iurasov
This will be superseded by the switch to DM_VIDEO:
https://patchwork.ozlabs.org/project/uboot/patch/20210205010748.2646-1-andre.przyw...@arm.com/
Cheers,
Andre
P.S. Please CC: maintainers directly, scripts/get_maintain
Update LX2160AQDS BOARD MAINTAINER entry to
current MAINTAINER.
Signed-off-by: Priyanka Jain
---
board/freescale/lx2160a/MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/board/freescale/lx2160a/MAINTAINERS
b/board/freescale/lx2160a/MAINTAINERS
index c627417cf7..cc69de2970 100644
-
Update LS1046ARDB BOARD MAINTAINERS entries to
current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1046ardb/MAINTAINERS | 7 ---
1 file changed, 7 deletions(-)
diff --git a/board/freescale/ls1046ardb/MAINTAINERS
b/board/freescale/ls1046ardb/MAINTAINERS
index 8b4b45e9ed.
Update LS1012AQDS Board MAINTAINERS entries to
current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1012aqds/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/ls1012aqds/MAINTAINERS
b/board/freescale/ls1012aqds/MAINTAINERS
index d
Update LS1046AQDS BOARD MAINTAINERS entries to
current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1046aqds/MAINTAINERS | 3 ---
1 file changed, 3 deletions(-)
diff --git a/board/freescale/ls1046aqds/MAINTAINERS
b/board/freescale/ls1046aqds/MAINTAINERS
index 39a48da95a..72c
Update LS2080ARDB BOARD MAINTAINERS entries to
current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls2080ardb/MAINTAINERS | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/freescale/ls2080ardb/MAINTAINERS
b/board/freescale/ls2080ardb/MAINTAINERS
i
Update LS2080AQDS BOARD MAINTAINERS entries to
current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls2080aqds/MAINTAINERS | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/board/freescale/ls2080aqds/MAINTAINERS
b/board/freescale/ls2080aqds/MAINTAINERS
in
Update LS1088ARDB, LS1088AQDS BOARD MAINTAINERS
entries to current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1088a/MAINTAINERS | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/board/freescale/ls1088a/MAINTAINERS
b/board/freescale/ls1088a/MAINTAINERS
Update LS1043ARDB BOARD MAINTAINERS entries
to current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1043ardb/MAINTAINERS | 4
1 file changed, 4 deletions(-)
diff --git a/board/freescale/ls1043ardb/MAINTAINERS
b/board/freescale/ls1043ardb/MAINTAINERS
index ed62396760..36
Update LS1028AQDS, LS10128ARDB board MAINTAINERS
entries to current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1028a/MAINTAINERS | 4
1 file changed, 4 deletions(-)
diff --git a/board/freescale/ls1028a/MAINTAINERS
b/board/freescale/ls1028a/MAINTAINERS
index 5b7a8db2fa
Update LS1021ATWR BOARD MAINTAINERS entries to
current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1021atwr/MAINTAINERS | 3 ---
1 file changed, 3 deletions(-)
diff --git a/board/freescale/ls1021atwr/MAINTAINERS
b/board/freescale/ls1021atwr/MAINTAINERS
index c8b93c6469..7ab
Update LS1021AIOT BOARD MAINTAINERS entries to
current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1021aiot/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/ls1021aiot/MAINTAINERS
b/board/freescale/ls1021aiot/MAINTAINERS
index 2
Update LS1012ARDB BOARD MAINTAINERS entries
to current MAINTAINERS.
Signed-off-by: Priyanka Jain
---
board/freescale/ls1012ardb/MAINTAINERS | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/board/freescale/ls1012ardb/MAINTAINERS
b/board/freescale/ls1012ardb/MAINTAINERS
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