Loading u-boot binary from the u-boot command line

I need to to test the modified u-boot binary. I want to test it without writing it on the NOR flash, that already has a working u-boot. Can I load the modified u-boot binary from the currently running u-boot command line?

please pull u-boot-samsung master

Dear Tom, The following changes since commit ee6726be4f0dccb612f0193c62ca149164c8a5af: Merge tag 'ti-v2021.04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti (2021-01-12 09:32:48 -0500) are available in the Git repository at: g...@gitlab.denx.de:u-boot/custodians/u-boot-samsung.g

Re: [PATCH v2 08/21] sunxi: introduce support for H616 clocks

Dne petek, 22. januar 2021 ob 02:17:30 CET je Andre Przywara napisal(a): > On Mon, 11 Jan 2021 21:11:40 +0100 > > Jernej Skrabec wrote: > > H616 has mostly the same clocks as H6 with some small differences. Just > > reuse H6 clocks for H616 and handle differences with macros. > > > > Reviewed-by

Re: [PATCH] cmd: efidebug: always check return code from get_variable()

On 1/22/21 2:42 AM, AKASHI Takahiro wrote: CID 316364 says: Null pointer dereferences (FORWARD_NULL) printf("Result total size: 0x%x\n", result->variable_total_size); at do_efi_capsule_res(). The code is basically safe because a buffer for "result" is allocated by malloc() and filled

Re: [PATCH] efi_loader: capsule: fix SIZEOF_MISMATCH warning

On 1/22/21 2:43 AM, AKASHI Takahiro wrote: CID 316361 says: Passing argument "count * 8UL /* sizeof (*files) */" to function "dlmalloc" and then casting the return value to "u16 **" is suspicious. In this particular case "sizeof (u16 **)" happens to be equal to "sizeof (u16 *)", but this is not

Re: [PATCH] tools: mkeficapsule: fill reserved members of structure

On 1/22/21 2:43 AM, AKASHI Takahiro wrote: Fill reserved members of efi_firmware_management_capsule_image_header structure with zero's for safety. Signed-off-by: AKASHI Takahiro Fixes: CID 316354 Reviewed-by: Heinrich Schuchardt --- tools/mkeficapsule.c | 3 +++ 1 file changed, 3 insert

configure and build the u-boot for BCM953012HR

How do I configure and build the u-boot for BCM953012HR (Broadcom Northstar Reference board)? Is there a compatible board/config for the BCM953012HR Board?

[PATCH] tools: mkeficapsule: fill reserved members of structure

Fill reserved members of efi_firmware_management_capsule_image_header structure with zero's for safety. Signed-off-by: AKASHI Takahiro Fixes: CID 316354 --- tools/mkeficapsule.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c index 270943fc90ae.

[PATCH] efi_loader: capsule: fix SIZEOF_MISMATCH warning

CID 316361 says: > Passing argument "count * 8UL /* sizeof (*files) */" to > function "dlmalloc" and then casting the return value to "u16 **" is > suspicious. In this particular case "sizeof (u16 **)" happens to be equal > to "sizeof (u16 *)", but this is not a portable assumption. > > 767

[PATCH] cmd: efidebug: always check return code from get_variable()

CID 316364 says: > Null pointer dereferences (FORWARD_NULL) > printf("Result total size: 0x%x\n", result->variable_total_size); at do_efi_capsule_res(). The code is basically safe because a buffer for "result" is allocated by malloc() and filled up by the second get_variable(), which fails

Re: [linux-sunxi] Re: [PATCH v2 05/21] sunxi: prcm: Add memory map for H6 like SoCs

On 1/21/21 7:14 PM, Andre Przywara wrote: > On Mon, 11 Jan 2021 21:11:37 +0100 > Jernej Skrabec wrote: > >> There was no need to have prcm definitions for H6 and similar SoCs till >> now. However, support R_I2C will be needed soon in SPL. >> >> Move old definitions to prcm_sun6i.h and add new one

Re: Boot failure triggered by USB on rockpro64-rk3399 and pinebook-pro-rk3399

U-Boot 2020.07 worked, broken on rockpro64 by commit 3ae64582fb8ceead4fc464cd2055eb3eaef78ccc (refs/bisect/bad) Author: Jagan Teki Date: Mon Jul 20 14:53:09 2020 +0530 rockchip: rockpro64: Enable USB3.0 Host Enable USB3.0 Host support for RockPro64 boards. Signed-off-by:

Re: [PATCH v2 10/21] sunxi: add support for R_I2C on H616

On Mon, 11 Jan 2021 21:11:42 +0100 Jernej Skrabec wrote: > This port is needed for communication with PMIC. SPL uses it to set DRAM > voltage on H616 boards. > > Reviewed-by: Samuel Holland > Signed-off-by: Jernej Skrabec Compared the bits against the manual. Reviewed-by: Andre Przywara Th

Re: [PATCH v2 09/21] sunxi: add support for H616 uart0

On Mon, 11 Jan 2021 21:11:41 +0100 Jernej Skrabec wrote: > This port is used for debug terminal on all known H616 boards. > > Reviewed-by: Samuel Holland > Signed-off-by: Jernej Skrabec Compared the bits against the manual. Reviewed-by: Andre Przywara Cheers, Andre > --- > arch/arm/inclu

Re: [PATCH v2 08/21] sunxi: introduce support for H616 clocks

On Mon, 11 Jan 2021 21:11:40 +0100 Jernej Skrabec wrote: > H616 has mostly the same clocks as H6 with some small differences. Just > reuse H6 clocks for H616 and handle differences with macros. > > Reviewed-by: Samuel Holland > Signed-off-by: Jernej Skrabec > --- > .../include/asm/arch-sunxi/

Re: [PATCH v2 06/21] sunxi: Add support for I2C on H6 like SoCs

On Mon, 11 Jan 2021 21:11:38 +0100 Jernej Skrabec wrote: > I2C support, especially R_I2C port, will be needed in future. Upcoming > support for H616 will need R_I2C to adjust DRAM voltage. > > Reviewed-by: Samuel Holland > Signed-off-by: Jernej Skrabec Reviewed-by: Andre Przywara Thanks! An

Re: [PATCH v2 05/21] sunxi: prcm: Add memory map for H6 like SoCs

On Mon, 11 Jan 2021 21:11:37 +0100 Jernej Skrabec wrote: > There was no need to have prcm definitions for H6 and similar SoCs till > now. However, support R_I2C will be needed soon in SPL. > > Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h. > One of those files will be se

Re: [PATCH v2 02/21] sunxi: Introduce common symbol for H6 like SoCs

On Mon, 11 Jan 2021 21:11:34 +0100 Jernej Skrabec wrote: > It turns out that there are at least 2 other SoCs which have basically > the same memory map, similar clocks and other features as H6. It's very > likely that we'll see more such SoCs in the future. In order to ease > porting to new SoCs

[PATCH 11/11] binman: Print a debug message when binman selects a node

Add some debugging to indicate which node the binman library is looking at. Signed-off-by: Simon Glass --- lib/binman.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/binman.c b/lib/binman.c index f415df30545..6040ec89241 100644 --- a/lib/binman.c +++ b/lib/binman.c @@ -145,6 +145,8

[PATCH 10/11] Add a symlink for ctype.h

Libraries that link with U-Boot typically may expect to be able to include ctype.h but this file is in a different place in U-Boot. Add a symlink to make this work. Signed-off-by: Simon Glass --- include/ctype.h | 1 + 1 file changed, 1 insertion(+) create mode 12 include/ctype.h diff --g

[PATCH 09/11] dm: core: Update ofnode_read_fmap_entry() to read hashes

At present this function uses the old format for reading hashes. Add support for the current format. Add a test while we are here. Signed-off-by: Simon Glass --- arch/sandbox/dts/test.dts | 10 ++ drivers/core/of_extra.c | 21 - test/dm/Makefile | 1 + t

[PATCH 07/11] clk: x86: Correct the driver name

The current driver name does not match its compatible string, so of-platdata does not work correctly. Fix it. Signed-off-by: Simon Glass --- drivers/clk/intel/clk_intel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/intel/clk_intel.c b/drivers/clk/intel/cl

[PATCH 08/11] dm: core: Add a comment about pinctrl_select_state()

The use of pinctrl in the core of driver model is useful but can provoke some strange behaviour. Add a comment to aid debugging. Signed-off-by: Simon Glass --- drivers/core/device.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/core/device.c b/drivers/core/device.c index

[PATCH 06/11] clk: Add debugging for return values

Use the log_msg_ret() mechanism to get error-return information when clocks fail to probe, etc. Signed-off-by: Simon Glass --- drivers/clk/clk-uclass.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index

[PATCH 04/11] sandbox: Disable I2C emulators in SPL

These cannot work with of-platdata since they currently need the devicetree at runtime. Disable the emulators and the sandbox I2C driver that needs them. We can enable these later, if needed for testing. Switch the of_plat_parent test over to use a simple bus instead. Signed-off-by: Simon Glass

[PATCH 05/11] dm: core: Don't inline dev_read...() calls with of-platdata

At present if these calls are used with of-platdata, a confusing error is produced, referring to a function not actually called by the code causing the problem. Fix this by not inlining, so that the error mentions the dev_read_...() function and it is more obvious what is going on. Signed-off-by:

[PATCH 03/11] i2c: desigware: Add an alias for Intel Apollo Lake

Add an alias so that this driver can be used in TPL on coral. Signed-off-by: Simon Glass --- drivers/i2c/designware_i2c_pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c index ec0cdf62207..9e387737b6e 100644 --- a/dri

[PATCH 02/11] x86: coral: Support TPM and RTC in SPL

Update the devicetree so that the TPM and RTC can be used in SPL. Also enable the pins used for getting the memory configuration settings while we are here. Signed-off-by: Simon Glass --- arch/x86/dts/chromebook_coral.dts| 20 +++- arch/x86/include/asm/arch-apollolak

[PATCH 00/11] More minor clean-ups and improvements

This series includes a collection of small things noticed while bringing up verified boot on Coral. Simon Glass (11): spl: Tidy up SPL/TPL malloc sizes x86: coral: Support TPM and RTC in SPL i2c: desigware: Add an alias for Intel Apollo Lake sandbox: Disable I2C emulators in SPL dm: cor

[PATCH 01/11] spl: Tidy up SPL/TPL malloc sizes

The current help talks about relocation which doesn't apply to SPL and TPL. Update it to avoid confusion. Also make the TPL size default to the same as the SPL size, since this is more likely to be a useful value than the one used by U-Boot proper, which may be quite a bit larger. Signed-off-by:

Re: Pull request: u-boot-rockchip-20210121

> > Merge branch '2021-01-20-fs-fixes' (2021-01-20 16:45:43 -0500) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git > tags/u-boot-rockchip-20210121 > > for you to fetch changes up to 9ddc078

Re: Xilinx ZynqMP SPL boot: psu_init_gpl.c code corrupts U-Boot memory

Hi Michal, On Thu, 2021-01-21 at 09:41 +0100, Michal Simek wrote: > Hi, > > On 1/20/21 9:25 PM, Robert Hancock wrote: > > I've been trying to get the U-Boot SPL to work on a Xilinx ZCU102 > > development board. I have been testing with U-Boot 2021.01, and using > > the generated psu_init_gpl HW i

Re: arm: rk3399: add support nanopi r4s

>From 0c1b6b9c696f7bbdb91119af033e598e4b8d2f81 Mon Sep 17 00:00:00 2001 From: Xiaobo Tian Date: Sat, 26 Dec 2020 00:13:37 +0800 Subject: [PATCH] arm: rk3399: add support nanopi r4s MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SoC – Rockchip RK3399 hexa

Xilinx ZynqMP SPL boot: psu_init_gpl.c code corrupts U-Boot memory

I've been trying to get the U-Boot SPL to work on a Xilinx ZCU102 development board. I have been testing with U-Boot 2021.01, and using the generated psu_init_gpl HW initialization code generated by Vivado 2020.2, rather than the versions in the U-Boot tree, as we are expecting to make changes to t

Re: imx8mp evk - boot stucks at BL31

On 21.01.21 07:37, Elmar Psilog wrote: I am on a imx8.mp evk board. I could build and start loader (SPL, UBOOT, DT, ATF/BL31, mkimage) from the freescale git. Due to some problems I switched to mainland Uboot 2021-1. I found SPL/ATF is booting, but it stops with: NOTICE: BL31: If I repl

[PATCH] cmd: pxe_utils: fix ipappend ip config empty vars

PROBLEM: If ipaddr, serverip, gatewayip or netmask variable undefined we can have for example ip=192.168.2.33::192.168.2.1:255.255.255.0 yes its works same for linux kernel, but im think no need print SUGGESTED SOLUTION: if some variable was undefined we need just print empty place like this ip=1

imx8mp evk - boot stucks at BL31

I am on a imx8.mp evk board. I could build and start loader (SPL, UBOOT, DT, ATF/BL31, mkimage) from the freescale git. Due to some problems I switched to mainland Uboot 2021-1. I found SPL/ATF is booting, but it stops with: NOTICE: BL31: If I replace in imx-mkimage just the file u-boot-nod

[PATCH 1/1] doc: document echo command

Provide a man-page for the echo command. Signed-off-by: Heinrich Schuchardt --- doc/usage/echo.rst | 65 + doc/usage/index.rst | 1 + 2 files changed, 66 insertions(+) create mode 100644 doc/usage/echo.rst diff --git a/doc/usage/echo.rst b/doc/usag

[PATCH] test: unit test for echo command

Provide a unit test for the unit command Signed-off-by: Heinrich Schuchardt --- test/cmd/Makefile| 3 +++ test/cmd/test_echo.c | 57 2 files changed, 60 insertions(+) create mode 100644 test/cmd/test_echo.c diff --git a/test/cmd/Makefile b/test

Re: [PATCH v2 11/12] x86: coral: Add sysinfo ops

Hi Bin, On Wed, 20 Jan 2021 at 23:54, Bin Meng wrote: > > Hi Simon, > > On Thu, Jan 21, 2021 at 10:07 AM Simon Glass wrote: > > > > These ops are missing at present which is not permitted. Add an empty > > operation struct. > > > > Signed-off-by: Simon Glass > > --- > > > > Changes in v2: > > -

Re: [PATCH 1/1] dm: core: describe uclass_root_s

Hi Heinrich, On Mon, 18 Jan 2021 at 20:18, Heinrich Schuchardt wrote: > > Am 19. Januar 2021 01:49:28 MEZ schrieb Simon Glass : > >Hi Bin, > > > >On Sat, 16 Jan 2021 at 03:59, Bin Meng wrote: > >> > >> On Sat, Jan 16, 2021 at 6:13 PM Heinrich Schuchardt > > wrote: > >> > > >> > make htmldocs cre

Re: [PATCH v2 12/12] smbios: Allow a few values to come from sysinfo

Hi Bin, On Wed, 20 Jan 2021 at 23:55, Bin Meng wrote: > > On Thu, Jan 21, 2021 at 10:07 AM Simon Glass wrote: > > > > While static configuration is useful it cannot cover every case. Sometimes > > board revisions are encoded in resistor straps and must be read at > > runtime. > > > > The easiest

[PATCH 3/3] ARM: at91: spl: add spl_early_init for sama52d platforms

The dm root node is needed early in the spl to allow the timer to be used. This change calls spl_early_init to initialize the dm root node. Signed-off-by: Greg Gallagher --- arch/arm/mach-at91/spl_atmel.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-at91/spl_atmel.c

[PATCH 2/3] configs: sama5d27_som1_ek: Set FDT filename based on defconfig

Make the FDT file name based on the default on that is specified in the defconfig file. Signed-off-by: Greg Gallagher --- include/configs/sama5d27_som1_ek.h | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_

[PATCH 1/3] board: Atmel: Add SAMA5D27 giant board

Giant board is a tiny SBC based on the Adafruit Feather form factor, created by groboards it contains a SAMA5D2 processor (SAMA5D27), 128 MB of RAM and a microSD card for storage. Signed-off-by: Greg Gallagher --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/at91-sama5d27_gi

[PATCH 2/2] pinctrl: stm32: bind only the enabled GPIO subnode

Bind only the enabled GPIO subnode, to avoid to probe the node "gpio-controller" present in SOC dtsi (disabled by default) but not enabled in the included pincontrol dtsi file. For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent: gpioj: gpio@5000b000 gpiok: gpio@5000c000 Then thes

[PATCH 1/2] pinctrl: stm32: correct management pin display of OTYPE

OTYPE can be used for output or for alternate function to select PP = push-pull or OP = open-drain mode, according reference manual (Table 81. Port bit configuration table). This patch removes this indication for input pins and adds it for AF and output pins for pinmux command output. Fixes: b305

[PATCH 0/2] pinctrl: stm32: correction for pinmux status

This serie solve 2 issues found in output of command "pinmux status -a" when I test the serie [1]. [1] "gpio: Update and simplify the uclass API" http://patchwork.ozlabs.org/project/uboot/list/?series=225585 Patrick Delaunay (2): pinctrl: stm32: correct management pin display of OTYPE

Re: [PATCH v2 00/15] gpio: Update and simplify the uclass API

Hi Simon, On 1/21/21 4:11 AM, Simon Glass wrote: At present the GPIO uclass mirrors what was in U-Boot before driver model. It works well in most cases but is becoming cumbersome with things like pull-up/down and drive strength. In those cases it is easier for the driver to deal with all the fla

Re: [PATCH 1/1] sandbox: keep time offset when resetting

Hi Heinrich, On Thu, 21 Jan 2021 at 02:19, Heinrich Schuchardt wrote: > > On 07.01.21 13:35, Simon Glass wrote: > > Hi Heinrich, > > > > On Wed, 30 Dec 2020 at 10:07, Heinrich Schuchardt > > wrote: > >> > >> The UEFI Self Certification Test (SCT) checks the SetTime() service with > >> the follo

[PATCH 7/7] bdinfo: Change to use bdinfo_print_num_ll() where the number could be 64-bit

From: Bin Meng There are some calls to bdinfo_print_num_l() with parameters that could be a 64-bit value on a 32-bit system. Change those calls to use bdinfo_print_num_ll() instead. Signed-off-by: Bin Meng --- arch/arm/lib/bdinfo.c | 8 cmd/bdinfo.c | 4 ++-- 2 files changed

[PATCH 6/7] bdinfo: Rename function names to be clearer

From: Bin Meng At present we have bdinfo_print_num() to print unsigned long numbers. We also have print_phys_addr() which accept numbers that might be 64-bit on a 32-bit platform. Rename these 2 functions to be clearer: bdinfo_print_num() => bdinfo_print_num_l() print_phys_addr() => bdinfo_pri

[PATCH 5/7] riscv: Change phys_addr_t and phys_size_t to 64-bit

From: Bin Meng phys_addr_t and phys_size_t are currently defined as `unsigned long`, but RV32 supports 34-bit physical address, hence both phys_addr_t and phys_size_t should be defined to 64-bit using `unsigned long long`. Signed-off-by: Bin Meng --- arch/riscv/include/asm/types.h | 4 ++-- 1

[PATCH 4/7] fdtdec: Cast prior_stage_fdt_address with uintptr_t

From: Bin Meng At present prior_stage_fdt_address is declared as phys_addr_t. On a 32-bit platform where phys_addr_t can be 64-bit, assigning its value to gd->fdt_blob which is a pointer, can cause warnings. Cast it to uintptr_t before the assignment. Signed-off-by: Bin Meng --- lib/fdtdec.c

[PATCH 3/7] serial: sifive: Cast dev_read_addr() with uintptr_t

From: Bin Meng dev_read_addr() returns fdt_addr_t which is now a 64-bit address. In a 32-bit build, this causes the following warning seen when building serial_sifive.c: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Cast the return value with uintptr_t. Signed

[PATCH 1/7] riscv: Adjust board_get_usable_ram_top() for 32-bit

From: Bin Meng When testing QEMU RISC-V 'virt' machine with a 2 GiB memory configuration, it was discovered gd->ram_top is assigned to value zero in setup_dest_addr(). While gd->ram_top should not be declared as type `unsigned long`, which will be updated in a future patch, the current logic in

[PATCH 2/7] global_data.h: Change ram_top type to phys_addr_t

From: Bin Meng It's possible to have ram_top above 4 GiB in a 32-bit system, hence we need to declare ram_top as `phys_addr_t`. Signed-off-by: Bin Meng --- include/asm-generic/global_data.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/asm-generic/global_data.h

[PATCH 0/7] Allow booting a 32-bit system with a top memory address beyond 4 GiB

When testing QEMU RISC-V 'virt' machine with a 2 GiB memory configuration, it was discovered gd->ram_top is assigned to value zero in setup_dest_addr(). While 2 GiB QEMU RISC-V 'virt' happens to work with U-Boot today, increasing more memory doesn't make a bootable system. There are various places

Re: [scan-ad...@coverity.com: New Defects reported by Coverity Scan for Das U-Boot]

On 21.01.21 12:36, Sughosh Ganu wrote: > > > On Thu, 21 Jan 2021 at 00:34, Tom Rini > wrote: > > I decided to run Coverity part-way through the merge window this time > and here's what's been found so far. > > - Forwarded message from scan-ad...@coverity.

Re: [PATCH 1/2] board: Atmel: Add SAMA5D27 giant board

On Thu, Jan 21, 2021 at 2:19 AM wrote: > On 21.01.2021 00:38, Greg Gallagher wrote: > > Giant board is a tiny SBC based on the Adafruit Feather form factor, > > created by groboards it contains a SAMA5D2 processor (SAMA5D27), > > 128 MB of RAM and a microSD card for storage. > > > > Signed-off-by

Re: [PATCH] mkeficapsule: Free up resources used for adding public key to dtb

On 21.01.21 12:52, Sughosh Ganu wrote: > Fix the issues flagged by Coverity on resources not being released in > the add_public_key function. > > Signed-off-by: Sughosh Ganu > --- > tools/mkeficapsule.c | 13 +++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/tools/

Re: [patch v3 3/9] ockchip: video: edp: Change interrupt polarity configuration

Hi Arnaud, Please correct the typo in subject line. Thanks, - Kever Arnaud Patard 于2020年11月20日周五 下午9:30写道： > The linux code is setting polarity configuration to 3 but > uboot code is setting it to 1. Change the configuration to match the > linux configuration > > Signed-off-by: Arnaud Patar

Re: [patch v3 4/9] ockchip: video: vop: Reserve efi fb memory

Hi Arnaud, First, please correct the typo in the subject line. Arnaud Patard 于2020年11月20日周五 下午9:31写道： > When booting with EFI and graphics, the memory used for framebuffer > has to be reserved, otherwise it may leads to kernel memory > overwrite. > > Signed-off-by: Arnaud Patard > Index: u-boo

Re: [patch v3 7/9] rockchip: video: vop: Fix format of fbbase in debug string

Hi Arnaud, Arnaud Patard 于2020年11月20日周五 下午9:32写道： > The debug string printing the device name, framebuffer address and of node > is using %lu as format for the framebuffer address, which is not so nice. > Change it to %lx. > > Signed-off-by: Arnaud Patard > Index: u-boot/drivers/video/rockchip/

Re: [patch v3 9/9] rockchip: videp: vop: Add reset support

Hi Arnaud, Please update the typo at subject line, /videp/video/ Other change looks good to me, you can add my review tag after update: Reviewed-by: Kever Yang Thanks, - Kever Arnaud Patard 于2020年11月20日周五 下午9:32写道： > In order to ensure that the VOP registers are in correct state, > add

Re: [PATCH v2 01/21] mmc: sdhci: Add helper functions for UHS modes

Hi Jaehoon, On 21/01/21 10:40 am, Jaehoon Chung wrote: > Hi Aswath, > > On 1/21/21 1:13 PM, Aswath Govindraju wrote: >> Hi Jaehoon, >> >> On 21/01/21 4:26 am, Jaehoon Chung wrote: >>> Hi Aswath, >>> >>> On 1/19/21 9:35 PM, Aswath Govindraju wrote: Hi Jaehoon, On 05/11/20 4:03 am, J

[PATCH v3 20/20] configs: am65x_evm: Add configs for UHS modes

From: Faiz Abbas Add configs for voltage switching and UHS modes for the SD card and HS200 for the eMMC. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- configs/am65x_evm_a53_defconfig | 8 configs/am65x_evm_r5_defconfig | 2 ++ 2 files changed, 10 insertions(+) diff

Re: Pull request: u-boot-rockchip-20210121

Hi Arnaud, On 2021/1/21 下午7:39, Arnaud Patard (Rtp) wrote: Kever Yang writes: Hi, Hi Tom, Please pull the rockchip updates/fixes: - New board: rk3328 NanoPi R2S board; - Fix init voltage for some rk3399 boards; - enable rng for rk3399 by default; - set default to SPI bus 1 for SPI-flash for

[PATCH v3 19/20] arm: dts: k3-am654-base-board: Limit Sd card to High speed modes

From: Faiz Abbas There's an issue with the base board in which the power cycle circuit takes way longer to power down than expected by mmc core. code. This prevents the card from enumerating in UHS modes. Disable UHS modes for this board until a new board revision fixes the issue. Signed-off-by

[PATCH v3 18/20] arm: dts: k3-am65-main: Add itapdly and clkbuf-sel values

From: Faiz Abbas Add the appropriate itapdly and clkbuf-sel values required for some lower speed modes. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- arch/arm/dts/k3-am65-main.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/dts/k3-am65-main.dtsi b/a

[PATCH v3 17/20] configs: j7200_evm: Add support for UHS modes

From: Faiz Abbas Add configs to support UHS modes for the SD card and HS200 for the eMMC. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- configs/j7200_evm_a72_defconfig | 8 configs/j7200_evm_r5_defconfig | 1 + 2 files changed, 9 insertions(+) diff --git a/configs/

[PATCH v3 16/20] configs: j721e_evm: Add support for UHS modes

From: Faiz Abbas Add configs to support UHS modes for the SD card and HS200 for the eMMC. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- configs/j721e_evm_a72_defconfig | 8 configs/j721e_evm_r5_defconfig | 1 + 2 files changed, 9 insertions(+) diff --git a/configs/

[PATCH v3 15/20] arm: dts: k3-j7200-common-proc-board: Enable support for UHS modes

From: Faiz Abbas Add support for UHS modes by adding the regulators to power cycle and voltage switch the card. Also add pinmuxes required for each node Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- arch/arm/dts/k3-j7200-common-proc-board.dts | 49 ++- arch/

[PATCH v3 14/20] arm: dts: k3-j7200-main: Add support for gpio0

From: Faiz Abbas Add support for the main_gpio0 node Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- arch/arm/dts/k3-j7200-main.dtsi | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi ind

[PATCH v3 13/20] arm: dts: k3-j721e-common-proc-board: Add support for UHS modes for SD card

From: Faiz Abbas Add support for regulators to power cycle and switch IO voltage to the SD card. This enables support for UHS modes. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- arch/arm/dts/k3-j721e-common-proc-board.dts | 32 + 1 file changed, 32 insert

[PATCH v3 12/20] arm: dts: k3-j721e-main: Update otap-delay values

From: Faiz Abbas Update otap delay values to match with the latest Data Manual[1]. [1] https://www.ti.com/lit/gpn/dra829v Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- arch/arm/dts/k3-j721e-main.dtsi | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a

[PATCH v3 11/20] arm: dts: k3-am65: Fix mmc nodes

From: Faiz Abbas Because of fundamental interface issues in am65x pg1, only the initial sdhci1 node at 25 MHz was added in the u-boot.dtsi from which both the base-board.dts and r5-base-board.dts inherit the node. Move the node out to k3-am65-main.dtsi where it belongs and add the board specific

[PATCH v3 10/20] mmc: am654_sdhci: Use sdhci_set_control_reg()

From: Faiz Abbas Use the generic sdhci_set_control_reg() instead of duplicating in platform driver. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- drivers/mmc/am654_sdhci.c | 18 ++ 1 file changed, 2 insertions(+), 16 deletions(-) diff --git a/drivers/mmc/am65

[PATCH v3 09/20] mmc: am654_sdhci: Fix HISPD bit configuration in some lower speed modes

From: Faiz Abbas According to the AM654x Data Manual[1], the setup timing in lower speed modes can only be met if the controller uses a falling edge data launch. To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be cleared in default speed, SD high speed, MMC high speed, SDR12 and

[PATCH v3 08/20] mmc: am654_sdhci: Add support for software tuning

From: Faiz Abbas With the new SW tuning App note[1], a custom tuning algorithm is required for eMMC HS200, HS400 and SD card UHS modes. The algorithm involves running through the 32 possible input tap delay values and sending the appropriate tuning command (CMD19/21) for each of them to get a fai

[PATCH v3 06/20] mmc: am654_sdhci: Add support for input tap delay

From: Faiz Abbas DLL need only be enabled for speed modes and clock frequencies at or above 50 MHz. For speed modes that don't enable the DLL, we need to configure a static input delay value. This involves reading an optional itap-del-sel-* value from the device tree and configuring it for the ap

[PATCH v3 07/20] mmc: am654_sdhci: Add support for writing to clkbuf_sel

From: Faiz Abbas Add support for writing new clock buffer select property for both the am654x and j721e 4 bit IPs Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- drivers/mmc/am654_sdhci.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/mmc/am654_sdhci.c

[PATCH v3 05/20] mmc: am654_sdhci: Add support for AM65x SR2.0

From: Faiz Abbas Add Support for AM65x PG2.0. Use the SoC bus framework to fixup the platform data and do DLL calibration if the revision is 1.0 Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- drivers/mmc/am654_sdhci.c | 30 ++ 1 file changed, 30 ins

[PATCH v3 04/20] mmc: am654_sdhci: Add flag for PHY calibration

From: Faiz Abbas Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB flag to indicate the same. Also move the write of trm_icp and driver strength to the set_clock() function to match the kernel configuration flow. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju -

[PATCH v3 03/20] mmc: am654_sdhci: Convert flag fields to BIT macro

From: Faiz Abbas Convert the flags field defines to use the BIT() macro. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- drivers/mmc/am654_sdhci.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c i

[PATCH v3 02/20] mmc: am654_sdhci: Unconditionally switch off DLL in the beginning of ios_post()

From: Faiz Abbas There are some speed modes that work without switching the dll on. Unconditionally switch off the DLL before setting clock frequency to support this case. The software will automatically enable DLL for speed modes that require it. This also means the dll_on priv data member is no

[PATCH v3 01/20] mmc: sdhci: Add helper functions for UHS modes

From: Faiz Abbas Add a set_voltage() function which handles the switch from 3.3V to 1.8V for SD card UHS modes. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- drivers/mmc/sdhci.c | 80 + include/sdhci.h | 1 + 2 files changed, 8

[PATCH v3 00/20] Add support for MMC higher speed modes for TI's am65x, j721e and j7200 platforms

The following patches add support for higher speeds in the SD card and eMMC for TI's am65x, j721e, j7200 platforms. With these patches, the following max speeds are supported: j721e: DDR50, HS200 j7200: SDR104, HS200 am65x: SDR104*, HS200 changes since v2: 1. Added print statements in case of fa

[PATCH v2 3/3] PowerPC: keymile: Add support for kmcent2 board

Add basic support for the Hitachi Power Grids kmcent2 board, based on the NXP QorIQ T1040 SoC. Signed-off-by: Valentin Longchamp Signed-off-by: Rainer Boschung Signed-off-by: Niel Fourie Cc: Holger Brunck Cc: Heiko Schocher Cc: Priyanka Jain Cc: Stefan Roese --- Changes in v2: - Sorted head

[PATCH v2 2/3] keymile: common: update to set_env_hex(), fix "pram" radix

Replace instances of sprintf()/set_env() for setting hexadecimal values with set_env_hex(). In set_km_env() the "pram" variable was set to an hexadecimal value, while initr_mem() expects an unsigned decimal, so use set_env_ulong() instead. Signed-off-by: Niel Fourie Cc: Holger Brunck Cc: Heiko

[PATCH v2 1/3] PowerPC: dts: Pulled in kmcent2 dts files from Linux 5.10

Pulled in the kmcent2.dts and all its dependents from Linux 5.10, commit 2c85ebc57b3e upstream. Replaced the license text with SPDX License Identifiers. Signed-off-by: Niel Fourie Reviewed-by: Stefan Roese Cc: Holger Brunck Cc: Heiko Schocher Cc: Priyanka Jain Cc: Stefan Roese --- Changes in

[PATCH v2 0/3] PowerPC: keymile: Add support for kmcent2 board

This patch series adds basic support for the Hitachi Power Grids (previously Keymile and ABB) kmcent2 board, based on the NXP QorIQ T1040 SoC. Patch 1/3 pulls in the device trees from Linux 5.10 Patch 2/3 fixes a minor bug common to all the Keymile boards. Patch 3/3 finally adds the U-boot support

Re: [PATCH 3/3] PowerPC: keymile: Add support for kmcent2 board

Hi Stefan On 19/01/2021 16:31, Stefan Roese wrote: diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index 60b89fe348..608406dacd 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -321,6 +321,11 @@ static int ivm_populate_env(unsigned char *buf, i

Re: [PATCH 2/3] keymile: common: Fix pram variable radix

Hi Stefan On 19/01/2021 16:13, Stefan Roese wrote: Hi Niel, On 08.01.21 11:53, Niel Fourie wrote: In set_km_env() the pram variable was set to an hexadecimal value, while initr_mem() expects an unsigned decimal. Set the pram variable to an unsigned decimal instead. Signed-off-by: Niel Fourie

Re: [PATCH 1/3] PowerPC: dts: Pulled in kmcent2 dts files from Linux 5.10

Hi Stefan, On 19/01/2021 16:06, Stefan Roese wrote: Hi Niel, On 08.01.21 11:53, Niel Fourie wrote: Pulled in the kmcent2.dts and all its dependents from Linux 5.10, commit 2c85ebc57b3e upstream. Replaced the license text with SPDX License Identifiers. I assume that you did not change the lic

[PATCH] mkeficapsule: Free up resources used for adding public key to dtb

Fix the issues flagged by Coverity on resources not being released in the add_public_key function. Signed-off-by: Sughosh Ganu --- tools/mkeficapsule.c | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c index 270943fc90.

Re: Pull request: u-boot-rockchip-20210121

Kever Yang writes: Hi, > Hi Tom, > > Please pull the rockchip updates/fixes: > - New board: rk3328 NanoPi R2S board; > - Fix init voltage for some rk3399 boards; > - enable rng for rk3399 by default; > - set default to SPI bus 1 for SPI-flash for some board; > - add dwc PCIe controller driver on

Re: [scan-ad...@coverity.com: New Defects reported by Coverity Scan for Das U-Boot]

On Thu, 21 Jan 2021 at 00:34, Tom Rini wrote: > I decided to run Coverity part-way through the merge window this time > and here's what's been found so far. > > - Forwarded message from scan-ad...@coverity.com - > > Date: Mon, 18 Jan 2021 17:53:19 + (UTC) > From: scan-ad...@coverity.c

Re: [PATCH 1/2] board: Atmel: Add SAMA5D27 giant board

On 21.01.2021 00:38, Greg Gallagher wrote: > Giant board is a tiny SBC based on the Adafruit Feather form factor, > created by groboards it contains a SAMA5D2 processor (SAMA5D27), > 128 MB of RAM and a microSD card for storage. > > Signed-off-by: Greg Gallagher > --- Hi Greg, This patch [1/2]

Re: [PATCH 15/15] gpio: Add a way to read 3-way strapping pins

Hi Simon, On 1/15/21 3:05 PM, Simon Glass wrote: Using the internal vs. external pull resistors it is possible to get 27 different combinations from 3 strapping pins. Add an implementation of this. This involves updating the sandbox GPIO driver to model external and (weaker) internal pull resis

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