On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> This function does not exist anymore. Drop it from the header file.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Remove the function from zimage.c also
>
> arch/x86/include/asm/u-boot-x86.h | 2 --
> arch/x86/lib/zimage.c
Hi Simon,
On Mon, Jul 13, 2020 at 3:37 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Tue, 7 Jul 2020 at 21:25, Simon Glass wrote:
> >
> > Hi Bin,
> >
> > On Mon, 6 Jul 2020 at 18:22, Bin Meng wrote:
> > >
> > > Hi Simon,
> > >
> > > On Tue, Jul 7, 2020 at 3:22 AM Simon Glass wrote:
> > > >
> > > >
Hi Simon,
On Mon, Jul 13, 2020 at 1:54 PM Bin Meng wrote:
>
> On Wed, Jul 8, 2020 at 7:11 PM Wolfgang Wallner
> wrote:
> >
> > Hi Simon,
> >
> > -"Simon Glass" schrieb: -
> > > Betreff: [PATCH v2 28/44] i2c: designware_i2c: Support ACPI table
> > > generation
> > >
> > > Update the PCI
On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> This should ideally be used by all x86 boards in U-Boot. Enable it by
> default. If some boards don't use it, the cost is small.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Don't enable this for qemu
>
> arch/Kconfig
Hi Simon,
On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> At present if MP is not enabled (e.g. booting from coreboot) the 'mtrr'
> command does not work correctly. It is not easy to make it work for all
> CPUs, since coreboot has halted them and we would need to start them up
> again, but
On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> Update this code to calculate the address to use, rather than hard-coding
> it. Obtain the requested stack size from the FSP.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes in v2:
> - Split out the boot_mode
On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> If there is MRC information we should run FSP-M with a different
> boot_mode flag since it is supposed to do a 'fast path' through the
> memory init. Fix this.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes
On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> These registers need to be accesses from ACPI code, so move them to the
> header file.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no changes since v1)
>
> drivers/power/acpi_pmc/acpi-pmc-uclass.c | 9
On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> The FSP-S changes the ITSS priorities. The code that tries to save it
> before running FSP-S and restore it afterwards does not work as U-Boot
> relocates in between the save and restore. This means that the driver
> data saved before relocati
On Wed, Jul 8, 2020 at 7:11 PM Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> -"Simon Glass" schrieb: -
> > Betreff: [PATCH v2 28/44] i2c: designware_i2c: Support ACPI table generation
> >
> > Update the PCI driver to generate ACPI information so that Linux has the
> > full information about e
Hi Simon,
On Mon, Jul 13, 2020 at 12:22 PM Bin Meng wrote:
>
> On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
> >
> > Add a function to write a SPI descriptor to the generated ACPI code.
> >
> > Signed-off-by: Simon Glass
> > Reviewed-by: Wolfgang Wallner
> > Reviewed-by: Bin Meng
> > ---
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> At present the itss is probed in the ofdata_to_platdata() method. This is
> incorrect since itss is a child of p2sb which itself needs to probe the
> pinctrl device. This means that p2sb is effectively not probed when the
> itss is probed, so
On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> This is in the device tree now, so drop the unnecessary field here.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes in v2:
> - Fix the commit subject to mention dropping acpi_path, not acpi_name
>
> arch/x86
On Wed, Jul 8, 2020 at 11:34 AM Simon Glass wrote:
>
> Implement the method that converts a GPIO into the form used by ACPI, so
> that GPIOs can be added to ACPI tables.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> Changes in v1:
> - Use acpi_get_path() to get device path
>
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> Add information about what is returned on error.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> arch/x86/include/asm/intel_pinctrl.h | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Bin Meng
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> Write required information into the SSDT to describe the SD card
> card-detect pin. Since the required GPIO properties are not present in
> the device-tree binding, set them manually for now.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolf
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
> (NHLT).
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes in v2:
> - Add a comment pointing to the PCI spec
>
> include/dt-bindings/
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> At present only acpigen_write_integer() is exported for use by other code.
> But in some cases it is useful to call the specific function depending on
> the size of the value.
>
> Export these functions and add a test.
>
> Signed-off-by: Simon
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> Add a function to write a scope to the generated ACPI code.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes in v2:
> - Rename parameter from 'name' to 'scope'
>
> include/acpi/acpigen.h | 9 +
> lib
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> Add support for accessing an entry's contents in memory-mapped SPI flash.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> include/binman.h | 22 ++
> lib/binman.c | 23 +++
> 2 f
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> At present we can only read from a top-level binman node entry. Refactor
> this function to produce a second local function which supports reading
> from any node.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Rename binman_entr
On Wed, Jul 8, 2020 at 11:33 AM Simon Glass wrote:
>
> On x86 the SPI ROM can be memory-mapped, at least most of it. Add a way
> to tell binman the offset from a ROM address to a RAM address.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> Changes in v1:
> - Add a way to set th
Hi Simon,
On Wed, Jul 8, 2020 at 3:13 AM Simon Glass wrote:
>
> Add a /chosen property to control the order in which the data appears
> in the SSDT. This allows matching up U-Boot's output from a dump of the
> known-good data obtained from within Linux.
>
> Signed-off-by: Simon Glass
> Reviewed-
On Wed, Jul 8, 2020 at 9:37 AM Simon Glass wrote:
>
> Update this command so it can list the MTRRs on a selected CPU. If
> '-c all' is used, then all CPUs are listed.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no changes since v1)
>
> cmd/x86/mtrr.c | 22 +
On Wed, Jul 8, 2020 at 9:37 AM Simon Glass wrote:
>
> When the boot CPU MTRRs are updated, perform the same update on all other
> CPUs so they are kept in sync.
>
> This avoids kernel warnings about mismatched MTRRs.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no ch
On Wed, Jul 8, 2020 at 9:37 AM Simon Glass wrote:
>
> It is convenient to iterate through the CPUs performing work on each one
> and processing the result. Add a few iterator functions which handle this.
> These can be used by any client code. It can call mp_run_on_cpus() on
> each CPU that is ret
Hi Simon,
On Wed, Jul 8, 2020 at 9:37 AM Simon Glass wrote:
>
> Add a way to run a function on a selection of CPUs. This supports either
> a single CPU, all CPUs, just the main CPU or just the 'APs', in Intel
> terminology.
>
> It works by writing into a mailbox and then waiting for the CPUs to n
On Wed, Jul 8, 2020 at 9:37 AM Simon Glass wrote:
>
> Allow keeping track of whether all CPUs have been enabled yet. This allows
> us to know whether other CPUs need to be considered when updating
> CPU-specific settings such as MTRRs on x86.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang
On Wed, Jul 8, 2020 at 9:37 AM Simon Glass wrote:
>
> At present the APs (non-boot CPUs) are inited once and then parked ready
> for the OS to use them. However in some cases we want to send new requests
> through, such as to change MTRRs and keep them consistent across CPUs.
>
> Change the last s
On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
>
> This is split from the original series in an attempt to get things applied
> in chunks.
>
> This part includes:
> - writing basic ACPI code for integers, strings, names, packages
> - writing descriptors for GPIO, I2C, interrupts, SPI
> - writin
On Mon, Jul 13, 2020 at 10:47 AM Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
> >
> > Add a function to write a GPIO descriptor to the generated ACPI code.
> >
> > Signed-off-by: Simon Glass
> > Reviewed-by: Wolfgang Wallner
> > ---
> >
> > Changes in v4:
On Mon, Jul 13, 2020 at 11:17 AM Bin Meng wrote:
>
> On Wed, Jul 8, 2020 at 3:13 AM Simon Glass wrote:
> >
> > Some devices need to inject extra code into the Differentiated System
> > Descriptor Table (DSDT). Add a method to handle this.
> >
> > Signed-off-by: Simon Glass
> > Reviewed-by: Wolfg
On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
>
> Add a function to write a SPI descriptor to the generated ACPI code.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> Reviewed-by: Bin Meng
> ---
>
> Changes in v4:
> - Move SPI macros to next patch
> - Rename the length-writ
On Wed, Jul 8, 2020 at 3:13 AM Simon Glass wrote:
>
> For many device types it is possible to figure out the name just by
> looking at its uclass or parent. Add a function to handle this, since it
> allows us to cover the vast majority of cases automatically.
>
> However it is sometimes impossible
On Wed, Jul 8, 2020 at 3:13 AM Simon Glass wrote:
>
> Some devices need to inject extra code into the Differentiated System
> Descriptor Table (DSDT). Add a method to handle this.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes in v4:
> - Explain why 'fill' is us
On Wed, Jul 8, 2020 at 3:13 AM Simon Glass wrote:
>
> Add a /chosen property to control the order in which the data appears
> in the SSDT. This allows matching up U-Boot's output from a dump of the
> known-good data obtained from within Linux.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgan
On Wed, Jul 8, 2020 at 3:13 AM Simon Glass wrote:
>
> Add a way for devices to enable and disable themselves using ACPI code
> that updates GPIOs. This takes several timing parameters and supports
> enable, reset and stop.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
>
On Wed, Jul 8, 2020 at 3:13 AM Simon Glass wrote:
>
> Power to some devices is controlled by GPIOs. Add a way to generate ACPI
> code to enable and disable a GPIO so that this can be handled within an
> ACPI method.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes
On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
>
> More complex device properties can be provided to drivers via a
> device-specific data (_DSD) object.
>
> To create this we need to build it up in a separate data structure and
> then generate the ACPI code, due to its recursive nature.
>
> Add
On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
>
> It is convenient to write a length value for preceding a block of data.
> Of course the length is not known or is hard to calculate a priori. So add
> a way to mark the start on a stack, so the length can be updated when
> known.
>
> Signed-off
Hi Simon,
On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
>
> Add a function to write a GPIO descriptor to the generated ACPI code.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes in v4:
> - Drop comment about the type always being ACPI_GPIO_TYPE_IO
> - Rename
On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
>
> When generating ACPI tables we need to convert GPIOs in U-Boot to the ACPI
> structures required by ACPI. This is a SoC-specific conversion and cannot
> be handled by generic code, so add a new GPIO method to do the conversion.
>
> Signed-off-b
On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
>
> Add a function to write an interrupt descriptor to the generated ACPI
> code.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes in v4:
> - Rename the length-writing functions to indicate they are for large resou
On Wed, Jul 8, 2020 at 3:12 AM Simon Glass wrote:
>
> Add a new file to handle generating ACPI code programatically. This is
> used when information must be dynamically added to the tables, e.g. the
> SSDT.
>
> Initial support is just for writing simple values. Also add a 'base' value
> so that th
Hi Jagan
> From: Jagan Teki [mailto:ja...@amarulasolutions.com]
> Sent: Thursday, July 02, 2020 4:03 PM
> To: Rick Jian-Zhi Chen(陳建志); Atish Patra; Palmer Dabbelt; Bin Meng; Paul
> Walmsley; Anup Patel; Sagar Kadam
> Cc: u-boot@lists.denx.de; linux-amar...@amarulasolutions.com; Jagan Teki; Bin
>
On Tue, Jul 7, 2020 at 10:08 AM Masahiro Yamada wrote:
>
> Simon,
>
> On Tue, Jul 7, 2020 at 3:44 AM Simon Glass wrote:
> >
> > Hi Masahiro,
> >
> > On Sat, 4 Jul 2020 at 11:43, Masahiro Yamada wrote:
> > >
> > > 'git grep' did not find any user of this stub.
> > >
> > > Signed-off-by: Masahiro
Hi Simon,
On Mon, Jul 13, 2020 at 10:25 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Sun, 12 Jul 2020 at 20:13, Bin Meng wrote:
> >
> > On Fri, Jul 10, 2020 at 8:49 AM Simon Glass wrote:
> > >
> > > The current get_timer_us() uses 64-bit arithmetic on 32-bit machines.
> > > When implementing micros
Hi Bin,
On Sun, 12 Jul 2020 at 20:13, Bin Meng wrote:
>
> On Fri, Jul 10, 2020 at 8:49 AM Simon Glass wrote:
> >
> > The current get_timer_us() uses 64-bit arithmetic on 32-bit machines.
> > When implementing microsecond-level timeouts, 32-bits is plenty. Add a
> > new function that uses an unsi
On Fri, Jul 10, 2020 at 8:43 AM Simon Glass wrote:
>
> With DDR4, Intel SOCs take quite a long time to init their memory. During
> this time, if the user is watching, it looks like SPL has hung. Add a
> message in this case.
>
> This works by adding a return code to fspm_update_config() that indic
On Fri, Jul 10, 2020 at 8:49 AM Simon Glass wrote:
>
> Enable this feature on chromebook_coral to speed up the display.
>
> With this change, the time taken to print the environment to the display
> without CONFIG_CONSOLE_SCROLL_LINES is reduced from 1830ms to 62ms.
>
> Signed-off-by: Simon Glass
On Fri, Jul 10, 2020 at 8:43 AM Simon Glass wrote:
>
> At present this enables a few arch-specific members of the global_data
> struct which are otherwise not part of the struct. As a result we have to
> use #ifdef in various places.
>
> The cost of always having these in the struct is small. Adju
On Mon, Jul 13, 2020 at 10:13 AM Bin Meng wrote:
>
> On Fri, Jul 10, 2020 at 8:49 AM Simon Glass wrote:
> >
> > The current get_timer_us() uses 64-bit arithmetic on 32-bit machines.
> > When implementing microsecond-level timeouts, 32-bits is plenty. Add a
> > new function that uses an unsigned l
On Fri, Jul 10, 2020 at 8:49 AM Simon Glass wrote:
>
> The current get_timer_us() uses 64-bit arithmetic on 32-bit machines.
> When implementing microsecond-level timeouts, 32-bits is plenty. Add a
> new function that uses an unsigned long. On 64-bit machines this is
> still 64-bit, but this doesn
On Wed, Jul 1, 2020 at 7:37 PM Wolfgang Wallner
wrote:
>
> In Intel's documentation the term P2SB stands for "Primary to Sideband
> Bridge".
>
> Signed-off-by: Wolfgang Wallner
> ---
>
> Changes in v3:
> - Replaced the term in two more places
>
> drivers/misc/Kconfig | 12 ++--
> 1 file
On Wed, Jul 1, 2020 at 7:37 PM Wolfgang Wallner
wrote:
>
> Currently it is possible to select the P2SB driver without selecting the
> P2SB uclass, which can't work. Fix this by adding a "depends on" in
> Kconfig.
>
> Signed-off-by: Wolfgang Wallner
>
> ---
>
> (no changes since v2)
>
> Changes in
Heinrich,
On Sat, Jul 11, 2020 at 08:47:15AM +0200, Heinrich Schuchardt wrote:
> On 7/8/20 7:02 AM, AKASHI Takahiro wrote:
> > Signature database (db or dbx) may have not only certificates that contain
> > a public key for RSA decryption, but also digests of signed images.
> >
> > In this test cas
On Sun, Jul 12, 2020 at 11:29:01PM +0530, Jagan Teki wrote:
> SPI_FLASH_PROTECTION config item is never used in anywhere
> in the U-Boot tree.
>
> Drop it.
>
> Signed-off-by: Jagan Teki
> ---
> cmd/mvebu/bubt.c | 7 ---
> 1 file changed, 7 deletions(-)
>
> diff --git a/cmd/mvebu/bubt.c b/
Heinrich,
On Sun, Jul 12, 2020 at 12:05:32AM +0200, Heinrich Schuchardt wrote:
> On 7/11/20 2:16 PM, Tom Rini wrote:
> > On Sat, Jul 11, 2020 at 09:00:16AM +0200, Heinrich Schuchardt wrote:
> >> On 7/10/20 8:09 PM, Tom Rini wrote:
> >>> On Thu, Jul 09, 2020 at 06:12:02PM +0200, Heinrich Schuchardt
Rather than hard-coding it to the Banana Pi R2.
Signed-off-by: David Woodhouse
---
configs/mt7623n_bpir2_defconfig | 2 +-
include/configs/mt7623.h| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig
inde
This is an MT7623A-based board, very similar to the Banana Pi R2.
http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN
Signed-off-by: David Woodhouse
---
arch/arm/dts/Makefile | 1 +
.../arm/dts/mt7623a-unielec-u7623-02-emmc.dts | 211 ++
On the UniElec U7623 board there is no external SD slot and the preloader
doesn't fill in the magic field at 0x81d0 to indicate that it was
booted from eMMC.
Signed-off-by: David Woodhouse
---
board/mediatek/mt7623/mt7623_rfb.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board
Hi Bin,
On Tue, 7 Jul 2020 at 21:25, Simon Glass wrote:
>
> Hi Bin,
>
> On Mon, 6 Jul 2020 at 18:22, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Tue, Jul 7, 2020 at 3:22 AM Simon Glass wrote:
> > >
> > > Hi Bin,
> > >
> > > On Thu, 2 Jul 2020 at 22:33, Bin Meng wrote:
> > > >
> > > > Hi Simon
SPI_FLASH_PROTECTION config item is never used in anywhere
in the U-Boot tree.
Drop it.
Signed-off-by: Jagan Teki
---
cmd/mvebu/bubt.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index a27b0df8ae..b3b5844267 100644
--- a/cmd/mvebu/bubt.c
+++ b/c
From: Matthias Brugger
Supporting USB keyboards out of the box is both handy for development
and production. Notably if u-boot is used to boot into GRUB. This patch
adds USB keyboard support for 32 bit RPi4 config.
Signed-off-by: Matthias Brugger
---
configs/rpi_4_32b_defconfig | 1 +
1 file
Hi Stefano,
On Mon, Jul 6, 2020 at 12:10 PM Stefano Babic wrote:
>
> Hi Igor,
>
> my two cents from previous experience:
>
> On 06.07.20 10:34, Igor Opaniuk wrote:
> > Hi,
> >
> > Does anyone have experience in setting up seamless
> > boot splash on iMX-based platforms?
> >
> > I'm currently tryi
65 matches
Mail list logo
