Re: [PATCH v8 00/14] Add support for MediaTek xHCI host controller

Am 2. Mai 2020 12:32:56 MESZ schrieb Marek Vasut : >Applied, thanks. > >btw do you really need such a massive CC list ? Thanks, i took To/Cc from v7 (i guess coverletter) to prepare my coverletter and used it for complete series. regards Frank

[PATCH 3/3] net: tsec: Access TBI PHY through the corresponding MII

From: Hou Zhiqiang When an eTSEC is configured to use TBI, configuration of the TBI is done through the MIIM registers for that eTSEC. For example, if a TBI interface is required on eTSEC2, then the MIIM registers starting at offset 0x2_5520 are used to configure it. Fixes: 9a1d6af55ecd ("net: t

[PATCH 2/3] net: tsec: Access eTSEC registers using virtual address

From: Hou Zhiqiang The current code accesses eTSEC registers using physical address directly, it's not correct, though no problem on current platforms. It won't work on platforms, which does not support 1:1 virtual-physical address map. Signed-off-by: Hou Zhiqiang --- drivers/net/tsec.c | 9 ++

[PATCH 1/3] doc: dt-bindings: tsec: Correct the Ethernet port compatible string

From: Hou Zhiqiang Change the compatible string to "fsl,etsec2" for the Ethernet ports, which is used in the current driver's match table. Fixes: 69a00875e3db ("doc: dt-bindings: Describe Freescale TSEC ethernet controller") Signed-off-by: Hou Zhiqiang --- doc/device-tree-bindings/net/fsl-tse

[PATCH 0/3] net: tsec: Fix issues of DM driver

From: Hou Zhiqiang This patch set is to fix some issues of eTSEC DM driver. Hou Zhiqiang (3): doc: dt-bindings: tsec: Correct the Ethernet port compatible string net: tsec: Access eTSEC registers using virtual address net: tsec: Access TBI PHY through the corresponding MII doc/device-tre

RE: [PATCH v7 22/22] doc: sifive: fu540: Add description for RISC-V FU540 U-Boot SPL

Hi Anup, >-Original Message- >From: Anup Patel >Sent: 03 May 2020 10:04 >To: Pragnesh Patel >Cc: U-Boot Mailing List ; Atish Patra >; Palmer Dabbelt ; Bin >Meng ; Paul Walmsley ; >Jagan Teki ; Troy Benjegerdes >; Anup Patel ; Sagar >Kadam ; Rick Chen ; Joe >Hershberger >Subject: Re: [PA

Re: [PATCH v7 21/22] doc: sifive: fu540: Add description for OpenSBI generic platform

On Sat, May 2, 2020 at 8:57 PM Bin Meng wrote: > > Hi Pragnesh, > > On Sat, May 2, 2020 at 11:22 PM Pragnesh Patel > wrote: > > > > > > Hi Bin, > > > > >-Original Message- > > >From: Bin Meng > > >Sent: 02 May 2020 20:47 > > >To: Pragnesh Patel > > >Cc: U-Boot Mailing List ; Atish Patra

Re: [PATCH v7 22/22] doc: sifive: fu540: Add description for RISC-V FU540 U-Boot SPL

On Sat, May 2, 2020 at 3:41 PM Pragnesh Patel wrote: > > Add descriptions about U-Boot SPL feature and how to build and run > from MMC. > > Signed-off-by: Pragnesh Patel > Signed-off-by: Jagan Teki > --- > doc/board/sifive/fu540.rst | 376 + > 1 file changed,

[PATCH v10 19/21] riscv: Add device tree for K210 and Sipeed Maix BitM

Where possible, I have tried to find compatible drivers based on the layout of registers. However, many devices remain untested. All untested devices have been left disabled, but some tentative properties (such as compatible strings, and clocks, interrupts, and resets properties) have been added.

[PATCH v10 21/21] riscv: Add Sipeed Maix support

The Sipeed Maix series is a collection of boards built around the RISC-V Kendryte K210 processor. This processor contains several peripherals to accelerate neural network processing and other "ai" tasks. This includes a "KPU" neural network processor, an audio processor supporting beamforming recep

[PATCH v10 20/21] doc: riscv: Add documentation for Sipeed Maix Bit

This patch adds documentation for the Sipeed Maix bit, and more generally for the Kendryte K210 processor. Signed-off-by: Sean Anderson --- Changes in v9: - Mark dts code block as "none" explicitly Changes in v7: - Split off into its own patch - Fix size of clint doc/board/index.rst|

[PATCH v10 15/21] riscv: Add option to support RISC-V privileged spec 1.9

Some older processors (notably the Kendryte K210) use an older version of the RISC-V privileged specification. The primary changes between the old and new are in virtual memory, and in the merging of three separate counter enable CSRs. Using the new CSR on an old processor causes an illegal instru

[PATCH v10 16/21] riscv: Allow use of reset drivers

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example, and disable the default reset handler when the sysreset driver is enabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v3: - New arch/riscv/lib/reset.c | 2 ++ 1 file changed, 2 insertions(+) d

[PATCH v10 18/21] riscv: Enable cpu clock if it is present

The cpu clock is probably already enabled if we are executing code (though we could be executing from a different core). This patch prevents the cpu clock or its parents from being disabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch was previously submitted on its own as

[PATCH v10 17/21] riscv: Try to get cpu frequency from a "clocks" node if it exists

Instead of always using the "clock-frequency" property to determine cpu frequency, try using a clock in "clocks" if it exists. This patch also fixes a bug where there could be spurious higher frequencies if sizeof(u32) != sizeof(ulong). Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This

[PATCH v10 12/21] riscv: Add headers for asm/global_data.h

This header depended on bd_t and ulong, but did not include the appropriate headers. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v4: - Include compiler.h not linux/compiler.h arch/riscv/include/asm/global_data.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/

[PATCH v10 14/21] riscv: Clean up IPI initialization code

The previous IPI code initialized the device whenever the first call was made to a riscv_*_ipi function. This made it difficult to determine when the IPI device was initialized. This patch introduces a new function riscv_init_ipi. It is called once during arch_cpu_init_dm. Before this point, no ris

[PATCH v10 13/21] riscv: Clear pending interrupts before enabling IPIs

On some platforms (k210), the previous stage bootloader may have not cleared pending IPIs before transferring control to U-Boot. This can cause race conditions, as multiple harts all attempt to initialize the IPI controller at once. This patch clears IPIs before enabling them, ensuring that only on

[PATCH v10 11/21] lib: Always set errno in hcreate_r

This could give a confusing error message if it failed and didn't set errno. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v5: - New lib/hashtable.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/hashtable.c b/lib/hashtable.c index 907e8a64

[PATCH v10 10/21] reset: Add generic reset driver

This patch adds a generic reset driver. It is designed to be useful when one has a register in a regmap which contains bits that reset other devices. I thought this seemed like a very generic use, so here is a generic driver. The overall structure has been modeled on the syscon-reboot driver. Sign

[PATCH v10 05/21] clk: Add K210 pll support

This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_config is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson CC: Lukasz Ma

[PATCH v10 07/21] clk: Add K210 clock support

Due to the large number of clocks, I decided to use the CCF. The overall structure is modeled after the imx code. Clocks parameters are stored in several arrays, and are then instantiated at run-time. There are some translation macros (FOOIFY()) which allow for more dense packing. Signed-off-by: S

[PATCH v10 08/21] dm: Add support for simple-pm-bus

This type of bus is used in Linux to designate buses which have power domains and/or clocks which need to be enabled before their child devices can be used. Because power domains are automatically enabled before probing in U-Boot, we just need to enable any clocks present. Signed-off-by: Sean Ande

[PATCH v10 09/21] dm: Fix error handling for dev_read_addr_ptr

dev_read_addr_ptr had different semantics depending on whether OF_LIVE was enabled. This patch converts both implementations to return NULL on error, and converts all call sites which check for FDT_ADDR_T_NONE to check for NULL instead. This patch also removes the call to map_physmem, since we have

[PATCH v10 03/21] clk: Unconditionally recursively en-/dis-able clocks

For clocks not in the CCF, their parents will not have UCLASS_CLK, so we just enable them as normal. The enable count is local to the struct clk, but this will never result in the actual en-/dis-able op being called (unless the same struct clk is enabled twice). For clocks in the CCF, we always tr

[PATCH v10 02/21] clk: Check that ops of composite clock components exist before calling

clk_composite_ops was shared between all devices in the composite clock driver. If one clock had a feature (such as supporting set_parent) which another clock did not, it could call a null pointer dereference. This patch does three things 1. It adds null-pointer checks to all composite clock func

[PATCH v10 04/21] clk: Fix clk_get_by_* handling of index

clk_get_by_index_nodev only ever fetched clock 1, due to passing a boolean predicate instead of the index. Other clk_get_by_* functions got the clock correctly, but passed a predicate instead of the index to clk_get_by_tail. This could lead to confusing error messages. Signed-off-by: Sean Anderson

[PATCH v10 06/21] clk: Add a bypass clock for K210

This is a small driver to do a software bypass of a clock if hardware bypass is not working. I have tried to write this in a generic fashion, so that it could be potentially broken out of the kendryte code at some future date. For the K210, it is used to have aclk bypass pll0 and use in0 instead so

[PATCH v10 01/21] clk: Always use the supplied struct clk

CCF clocks should always use the struct clock passed to their methods for extracting the driver-specific clock information struct. Previously, many functions would use the clk->dev->priv if the device was bound. This could cause problems with composite clocks. The individual clocks in a composite c

[PATCH v10 00/21] riscv: Add Sipeed Maix support

This patch series adds support for Sipeed Maix boards and the Kendryte K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other models are similar. The travis build [1] is incomplete as of this writing, but I've manually ran the jobs which failed last time [2], and they passed. As a

Re: [PATCH v9 00/21] riscv: Add Sipeed Maix support

...and I forgot to bump the version. Sorry, will resend with the proper v10 revision. On 5/2/20 10:35 PM, Sean Anderson wrote: > This patch series adds support for Sipeed Maix boards and the Kendryte > K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other > models are similar. >

[PATCH v9 20/21] doc: riscv: Add documentation for Sipeed Maix Bit

This patch adds documentation for the Sipeed Maix bit, and more generally for the Kendryte K210 processor. Signed-off-by: Sean Anderson --- Changes in v9: - Mark dts code block as "none" explicitly Changes in v7: - Split off into its own patch - Fix size of clint doc/board/index.rst|

[PATCH v9 18/21] riscv: Enable cpu clock if it is present

The cpu clock is probably already enabled if we are executing code (though we could be executing from a different core). This patch prevents the cpu clock or its parents from being disabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch was previously submitted on its own as

[PATCH v9 19/21] riscv: Add device tree for K210 and Sipeed Maix BitM

Where possible, I have tried to find compatible drivers based on the layout of registers. However, many devices remain untested. All untested devices have been left disabled, but some tentative properties (such as compatible strings, and clocks, interrupts, and resets properties) have been added.

[PATCH v9 21/21] riscv: Add Sipeed Maix support

The Sipeed Maix series is a collection of boards built around the RISC-V Kendryte K210 processor. This processor contains several peripherals to accelerate neural network processing and other "ai" tasks. This includes a "KPU" neural network processor, an audio processor supporting beamforming recep

[PATCH v9 15/21] riscv: Add option to support RISC-V privileged spec 1.9

Some older processors (notably the Kendryte K210) use an older version of the RISC-V privileged specification. The primary changes between the old and new are in virtual memory, and in the merging of three separate counter enable CSRs. Using the new CSR on an old processor causes an illegal instru

[PATCH v9 17/21] riscv: Try to get cpu frequency from a "clocks" node if it exists

Instead of always using the "clock-frequency" property to determine cpu frequency, try using a clock in "clocks" if it exists. This patch also fixes a bug where there could be spurious higher frequencies if sizeof(u32) != sizeof(ulong). Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This

[PATCH v9 14/21] riscv: Clean up IPI initialization code

The previous IPI code initialized the device whenever the first call was made to a riscv_*_ipi function. This made it difficult to determine when the IPI device was initialized. This patch introduces a new function riscv_init_ipi. It is called once during arch_cpu_init_dm. Before this point, no ris

[PATCH v9 07/21] clk: Add K210 clock support

Due to the large number of clocks, I decided to use the CCF. The overall structure is modeled after the imx code. Clocks parameters are stored in several arrays, and are then instantiated at run-time. There are some translation macros (FOOIFY()) which allow for more dense packing. Signed-off-by: S

[PATCH v9 16/21] riscv: Allow use of reset drivers

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example, and disable the default reset handler when the sysreset driver is enabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v3: - New arch/riscv/lib/reset.c | 2 ++ 1 file changed, 2 insertions(+) d

[PATCH v9 12/21] riscv: Add headers for asm/global_data.h

This header depended on bd_t and ulong, but did not include the appropriate headers. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v4: - Include compiler.h not linux/compiler.h arch/riscv/include/asm/global_data.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/

[PATCH v9 11/21] lib: Always set errno in hcreate_r

This could give a confusing error message if it failed and didn't set errno. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v5: - New lib/hashtable.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/hashtable.c b/lib/hashtable.c index 907e8a64

[PATCH v9 09/21] dm: Fix error handling for dev_read_addr_ptr

dev_read_addr_ptr had different semantics depending on whether OF_LIVE was enabled. This patch converts both implementations to return NULL on error, and converts all call sites which check for FDT_ADDR_T_NONE to check for NULL instead. This patch also removes the call to map_physmem, since we have

[PATCH v9 13/21] riscv: Clear pending interrupts before enabling IPIs

On some platforms (k210), the previous stage bootloader may have not cleared pending IPIs before transferring control to U-Boot. This can cause race conditions, as multiple harts all attempt to initialize the IPI controller at once. This patch clears IPIs before enabling them, ensuring that only on

[PATCH v9 06/21] clk: Add a bypass clock for K210

This is a small driver to do a software bypass of a clock if hardware bypass is not working. I have tried to write this in a generic fashion, so that it could be potentially broken out of the kendryte code at some future date. For the K210, it is used to have aclk bypass pll0 and use in0 instead so

[PATCH v9 10/21] reset: Add generic reset driver

This patch adds a generic reset driver. It is designed to be useful when one has a register in a regmap which contains bits that reset other devices. I thought this seemed like a very generic use, so here is a generic driver. The overall structure has been modeled on the syscon-reboot driver. Sign

[PATCH v9 05/21] clk: Add K210 pll support

This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_config is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson CC: Lukasz Ma

[PATCH v9 08/21] dm: Add support for simple-pm-bus

This type of bus is used in Linux to designate buses which have power domains and/or clocks which need to be enabled before their child devices can be used. Because power domains are automatically enabled before probing in U-Boot, we just need to enable any clocks present. Signed-off-by: Sean Ande

[PATCH v9 03/21] clk: Unconditionally recursively en-/dis-able clocks

For clocks not in the CCF, their parents will not have UCLASS_CLK, so we just enable them as normal. The enable count is local to the struct clk, but this will never result in the actual en-/dis-able op being called (unless the same struct clk is enabled twice). For clocks in the CCF, we always tr

[PATCH v9 00/21] riscv: Add Sipeed Maix support

This patch series adds support for Sipeed Maix boards and the Kendryte K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other models are similar. The travis build [1] is incomplete as of this writing, but I've manually ran the jobs which failed last time [2], and they passed. As a

[PATCH v9 04/21] clk: Fix clk_get_by_* handling of index

clk_get_by_index_nodev only ever fetched clock 1, due to passing a boolean predicate instead of the index. Other clk_get_by_* functions got the clock correctly, but passed a predicate instead of the index to clk_get_by_tail. This could lead to confusing error messages. Signed-off-by: Sean Anderson

[PATCH v9 01/21] clk: Always use the supplied struct clk

CCF clocks should always use the struct clock passed to their methods for extracting the driver-specific clock information struct. Previously, many functions would use the clk->dev->priv if the device was bound. This could cause problems with composite clocks. The individual clocks in a composite c

[PATCH v9 02/21] clk: Check that ops of composite clock components exist before calling

clk_composite_ops was shared between all devices in the composite clock driver. If one clock had a feature (such as supporting set_parent) which another clock did not, it could call a null pointer dereference. This patch does three things 1. It adds null-pointer checks to all composite clock func

Re: [PATCH v9 18/21] riscv: Enable cpu clock if it is present

On 4/25/20 3:54 AM, Pragnesh Patel wrote: > Hi Sean, > >> -Original Message- >> From: U-Boot On Behalf Of Sean Anderson >> Sent: 23 April 2020 08:03 >> To: u-boot@lists.denx.de >> Cc: Rick Chen ; Bin Meng ; >> Sean Anderson >> Subject: [PATCH v9 18/21] riscv: Enable cpu clock if it is pr

Re: [PATCH 5/5] sysreset: move print_resetinfo() to sysreset-uclass.c

Hi Rasmus, On Fri, 1 May 2020 at 08:55, Rasmus Villemoes wrote: > > Moving this out of board_f.c allows board-specific SPL code to call > this rather than duplicating its implementation. > > Signed-off-by: Rasmus Villemoes > --- > common/board_f.c | 24

Re: [PATCH 4/4] clk: ccf: mux: change the get_rate helper

+Stephen Warren On Sat, 2 May 2020 at 09:59, Dario Binacchi wrote: > > The previous version of the get_rate helper does not work if the mux > clock parent is changed after the probe. This error has not been > detected because this condition has not been tested. The error occurs > because the set_

Re: [PATCH V2 3/9] test: cpu: test current cpu

On Fri, 1 May 2020 at 07:22, Peng Fan wrote: > > Add test whether the CPU is U-Boot is running from. > > Signed-off-by: Peng Fan > --- > > V2: > New > > test/dm/cpu.c | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Simon Glass

Re: [PATCH V2 1/9] uclass: cpu: Add new API to get udevice for current CPU

Hi Peng, On Fri, 1 May 2020 at 07:22, Peng Fan wrote: > > When running on SoC with multiple clusters, the boot CPU may > not be fixed, saying booting from cluster A or cluster B. > Add a API that can return the udevice for current boot CPU. > Cpu driver needs to implement is_current_cpu interface

Re: [PATCH V2 8/9] cpu: imx_cpu: Print the CPU temperature for iMX8QM A72

Hi Peng, On Fri, 1 May 2020 at 07:22, Peng Fan wrote: > > From: Ye Li > > iMX8QM registers two thermal devices for CPUs, get the temperature > from "cpu-thermal1" device for A72 > > Signed-off-by: Ye Li > Signed-off-by: Peng Fan > --- > > V2: > Per Simon's comments, use uclass_get_device > >

Re: [PATCH V2 2/9] cpu: sandbox: support is_current

On Fri, 1 May 2020 at 07:22, Peng Fan wrote: > > Support querying whether U-Boot is running on current cpu > > Signed-off-by: Peng Fan > --- > > V2: > New > > drivers/cpu/cpu_sandbox.c | 9 + > 1 file changed, 9 insertions(+) Reviewed-by: Simon Glass

Re: [PATCH v3] cmd: mvebu: bubt: fix quoted string split across lines

On Sat, 25 Apr 2020 at 20:55, Joel Johnson wrote: > > Update quoted string alignment to address checkpatch.pl warning > originally introduced in > commit f60a66ef5d7d ("cmd: mvebu: bubt: show image boot device"). > > Signed-off-by: Joel Johnson > > --- > > > I am sort of inferring that this is th

Re: [PATCH] clk: Fix clk func names in comments

On Fri, 1 May 2020 at 12:15, Jagan Teki wrote: > > clk function names in comments should be prefix with > clk instead of clock. > > Fix it. > > Cc: Simon Glass > Cc: Tom Rini > Signed-off-by: Jagan Teki > --- > include/clk.h | 12 ++-- > 1 file changed, 6 insertions(+), 6 deletions(-)

Re: [PATCH 1/8] x86: Add a new X86_RUN_64BIT_ONLY to Kconfig

Hi Aiden, On Fri, 1 May 2020 at 12:36, Park, Aiden wrote: > > Hi Bin, > > > -Original Message- > > From: Bin Meng > > Sent: Thursday, April 30, 2020 2:14 AM > > To: Park, Aiden > > Cc: Simon Glass ; U-Boot Mailing List > b...@lists.denx.de> > > Subject: Re: [PATCH 1/8] x86: Add a new X

Re: [PATCH 2/2] patman: Add an option to create patches without binary contents

On Fri, 1 May 2020 at 18:55, Bin Meng wrote: > > Some mailing lists have size limits and when we add binary contents > to our patches it's easy to exceed the size limits. > > Git supports a command line option "--no-binary" to generate patches > without any binary contents. Add an option in patman

Re: [PATCH V2] mkimage: fit: Do not tail-pad fitImage with external data

On Fri, 1 May 2020 at 09:40, Marek Vasut wrote: > > There is no reason to tail-pad fitImage with external data to 4-bytes, > while fitImage without external data does not have any such padding and > is often unaligned. DT spec also does not mandate any such padding. > > Moreover, the tail-pad fill

Re: [PATCH 1/2] patman: Sort the command line options

On Fri, 1 May 2020 at 18:55, Bin Meng wrote: > > Sort the existing command line options by: > > - help comes first > - option starts with '-' > - option starts with '--' > > Lower case followed by upper case letters, in alphabetical order. > > Signed-off-by: Bin Meng > --- > > tools/patman/main.

[PATCH v8 12/14] dt-bindings: phy-mtk-tphy: add properties of address mapping and clocks

From: Chunfeng Yun 1. add the address mapping related properties; 2. make "ref" clock optional, and add optional clock "da_ref"; 3. add the banks layout of TPHY V1 and V2; Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: no changes v7: no changes v

[PATCH v8 14/14] MAINTAINERS: MediaTek: add USB related files

From: Chunfeng Yun Add dt-binding files of xhci-mtk and phys, C files of phys. Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: no changes v7: no changes v6: add Reviewed-by Weijie v5: new patch --- MAINTAINERS | 3 +++ 1 file changed, 3 insertio

[PATCH v8 13/14] dt-bindings: usb: mtk-xhci: Add binding for MediaTek xHCI host controller

From: Chunfeng Yun Add dt-binding for MediaTek xHCI host controller Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: no changes v7: no changes v6: add Reviewed-by Weijie v2~v5: no changes --- .../usb/mediatek,mtk-xhci.txt | 40 +++

[PATCH v8 10/14] xhci: mediatek: Add support for MTK xHCI host controller

From: Chunfeng Yun This patch is used to support the on-chip xHCI controller on MediaTek SoCs, currently control/bulk/interrupt transfers are supported. Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao Reviewed-by: Jagan Teki --- v8: 1: mark xhci_mtk_phy_sh

[PATCH v8 11/14] arm: dts: mt7629: add usb related nodes

From: Chunfeng Yun Add usb, phy and clock nodes Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: no changes v7: no changes v6: add Reviewed-by Weijie v3~v5: no changes v2: 1. remove fixed clock clk20m --- arch/arm/dts/mt7629-rfb.dts | 8 +++

[PATCH v8 08/14] phy: phy-mtk-tphy: add support new version

From: Chunfeng Yun The new version removes all shared banks between multi-phys Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: no changes v7: no changes v6: add Reviewed-by Weijie v2~v5: no changes --- drivers/phy/phy-mtk-tphy.c | 68 +++

[PATCH v8 09/14] phy: phy-mtk-tphy: add a new reference clock

From: Chunfeng Yun Usually the digital and analog phys use the same reference clock, but some platforms have two separate reference clocks for each of them, so add another optional clock to support them. In order to keep the clock names consistent with PHY IP's, change the da_ref for analog phy a

[PATCH v8 07/14] phy: phy-mtk-tphy: add support USB phys

From: Chunfeng Yun Support USB2 and USB3 PHY with shared banks when support multi-phys Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: no changes v7: no changes v6: add Reviewed-by Weijie v3~v5: no changes v2: get the count of phys by dev_get_ch

[PATCH v8 03/14] phy: Add API for a bulk of phys

From: Chunfeng Yun This patch adds a "bulk" API to the phy API in order to get/init/exit/power on/off a group of phys associated with a device. The bulk API will avoid adding a copy of the same code to manage a group of phys in drivers. Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderli

[PATCH v8 06/14] usb: dwc2_udc_otg: use the phy bulk API to get phys

From: Chunfeng Yun Use the phy bulk API to get a group of phys Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: no changes v7: use new API of phy bulk v6: add Reviewed-by Weijie v5: no changes v4: new patch --- drivers/usb/gadget/dwc2_udc_otg.c

[PATCH v8 02/14] test: dm: add test item for ofnode_get_child_count()

From: Chunfeng Yun Add a test item for ofnode_get_child_count() Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Simon Glass Reviewed-by: Weijie Gao --- v8: no changes v7: add @index for nodes with reg property suggested by Fabio v6: add Reviewed-by Weijie v4~v5: n

[PATCH v8 04/14] test: dm: phy: add a test item for the phy_bulk API

From: Chunfeng Yun Add a test item for the phy_bulk API Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao Reviewed-by: Simon Glass Reviewed-by: Jagan Teki --- v8: add Reviewed-by Jagan v7: test new API v6: add Reviewed-by Weijie & Simon v5: no changes v

[PATCH v8 05/14] usb: dwc3: use the phy bulk API to get phys

From: Chunfeng Yun Get a group of phys by the phy bulk API Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: fix build-error for xilinx-board v7: use new API of phy bulk v6: add Reviewed-by Weijie v5: no changes v4: new patch --- drivers/usb/dwc3

[PATCH v8 00/14] Add support for MediaTek xHCI host controller

The series of patches are used to support xHCI host controller on MediaTek SoCs which has a glue layer IPPC (IP Port Control), and add USB function on T-PHY including T-PHY V1 and V2; Finally add USB related nodes for MT7629 platform. The files of xhci-mtk.* and phy-mtk-tphy.* are ported from Linu

[PATCH v8 01/14] dm: core: Add function to get child count of ofnode or device

From: Chunfeng Yun This patch add function used to get the child count of a ofnode or a device Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao Reviewed-by: Simon Glass --- v8: no changes v7: no changes v6: add Reviewed-by Weijie & Simon v4~v5: no changes

Re: [PATCH v8 00/14] Add support for MediaTek xHCI host controller

On 5/2/20 11:35 AM, Frank Wunderlich wrote: > The series of patches are used to support xHCI host controller on > MediaTek SoCs which has a glue layer IPPC (IP Port Control), and > add USB function on T-PHY including T-PHY V1 and V2; > Finally add USB related nodes for MT7629 platform. > > The fil

[PATCH v3 8/8] drivers/reset/Kconfig: fix typo

Signed-off-by: Trevor Woerner --- Changes in v3: None Changes in v2: None drivers/reset/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 65101ab4e8..88d3be1593 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/

[PATCH v3 7/8] rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32

Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner --- Changes in v3: None Changes in v2: None arch/arm/Kconfig | 2 +- arch/arm/Makefile | 2 +- arch/arm/mach-stm32/Kconfig| 2 +- configs/stm32f42

[PATCH v3 6/8] rename symbol: CONFIG_TEGRA -> CONFIG_ARCH_TEGRA

Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner --- Changes in v3: None Changes in v2: None Makefile | 4 ++-- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 7 +++ arch/arm/cpu/arm720t/int

[PATCH v3 3/8] rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5X

Have this symbol follow the pattern of all other such symbols. This patch removes a TODO from the code. Signed-off-by: Trevor Woerner --- Changes in v3: None Changes in v2: Update patch to work on latest master; the location where the SPL linker script is specified has changed. arch/arm/Kconf

[PATCH v3 4/8] arm: orion5x: finish moving SoC to mach-orion5x

The SPL linker script had been left in arch/$(ARCH)/cpu/$(CPU)/$(SOC); therefore move it to the already-established arch/$(ARCH)/mach-$(SOC) location. Signed-off-by: Trevor Woerner --- Changes in v3: None Changes in v2: Update patch to work on latest master; the location where the SPL linker sc

[PATCH v3 1/8] arm: lpc32xx: move SoC to mach-lpc32xx

Following the example of most other SoCs in arch/$(ARCH)/cpu/$(CPU)/$(SOC) move the lpc32xx code from arch/arm/cpu/arm926ejs/lpc32xx to arch/arm/mach-lpc32xx. Following the checklist from commit 01f14456306c ("ARM: prepare for moving SoC sources into mach-*"): [1] move files from arch/arm/cpu

[PATCH v3 2/8] arch/arm/Makefile: sort machine names

The comment immediately above the block of machine directory names implored users to keep the macro names sorted, but, alas, this is no longer the case. Put the list of machine directory names back in alphanumerical order by CONFIG_* macro name, as the comment asks. Sort all the symbols as though

[PATCH v3 5/8] rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD

Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham Signed-off-by: Trevor Woerner --- Changes in v3: None Changes in v2: Add Chris Packham's r-b Kconfig | 2 +- arch/arm/Kconfig

[PATCH v3 0/8] A small set of arm cleanups

This patch series presents a set of cleanups I stumbled across while looking at some arm-related code. A long time ago there was an effort to follow the Linux kernel's convention of putting SoC-specific code in arch/$(ARCH)/mach-$(SOC) instead of the previous location of arch/$(ARCH)/cpu/$(CPU)/$(

Re: [PATCH v7 16/22] riscv: Enable cpu clock if it is present

On 5/2/20 6:06 AM, Pragnesh Patel wrote: > The cpu clock is probably already enabled if we are executing code (though > we could be executing from a different core). This patch prevents the cpu > clock or its parents from being disabled. > > Signed-off-by: Sean Anderson If you make substantial c

Re: [PATCH v7 00/22] RISC-V SiFive FU540 support SPL

On Sat, May 2, 2020 at 3:37 PM Pragnesh Patel wrote: > > This series add support for SPL to FU540.U-Boot SPL can boot from > L2 LIM (0x0800_) and jump to OpenSBI(FW_DYNAMIC firmware) and > U-Boot proper from MMC devices. > > How to test this patch: > 1) Go to OpenSBI-dir : make PLATFORM=generi

Re: [PATCH v7 18/22] configs: fu540: Add config options for U-Boot SPL

On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel wrote: > > With sifive_fu540_defconfig: > > User can use FSBL or u-boot-spl.bin anyone at a time. > > For FSBL, > fsbl->fw_payload.bin (opensbi + U-Boot) > > For u-boot-spl.bin, > u-boot-spl.bin->FIT image (opensbi + U-Boot + dtb) > > U-Boot SPL will b

Re: [PATCH v7 19/22] sifive: dts: fu540: Enable L2 Cache in U-Boot

On Sat, May 2, 2020 at 10:12 PM Pragnesh Patel wrote: > > Hi Jagan, > > >-Original Message- > >From: Jagan Teki > >Sent: 02 May 2020 21:49 > >To: Pragnesh Patel > >Cc: U-Boot-Denx ; Atish Patra > >; Palmer Dabbelt ; Bin > >Meng ; Paul Walmsley ; > >Troy Benjegerdes ; Anup Patel > >; Saga

Re: [PATCH v7 18/22] configs: fu540: Add config options for U-Boot SPL

On Sat, May 2, 2020 at 6:25 PM Bin Meng wrote: > > Hi Pragnesh, > > On Sat, May 2, 2020 at 6:08 PM Pragnesh Patel > wrote: > > > > With sifive_fu540_defconfig: > > > > User can use FSBL or u-boot-spl.bin anyone at a time. > > > > For FSBL, > > fsbl->fw_payload.bin (opensbi + U-Boot) > > > > For

RE: [PATCH v7 22/22] doc: sifive: fu540: Add description for RISC-V FU540 U-Boot SPL

Hi Jagan, >-Original Message- >From: Jagan Teki >Sent: 02 May 2020 21:53 >To: Pragnesh Patel >Cc: U-Boot-Denx ; Atish Patra >; Palmer Dabbelt ; Bin >Meng ; Paul Walmsley ; >Troy Benjegerdes ; Anup Patel >; Sagar Kadam ; Rick Chen >; Joe Hershberger >Subject: Re: [PATCH v7 22/22] doc: si

Re: [PATCH v7 18/22] configs: fu540: Add config options for U-Boot SPL

On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel wrote: > > With sifive_fu540_defconfig: > > User can use FSBL or u-boot-spl.bin anyone at a time. > > For FSBL, > fsbl->fw_payload.bin (opensbi + U-Boot) > > For u-boot-spl.bin, > u-boot-spl.bin->FIT image (opensbi + U-Boot + dtb) > > U-Boot SPL will b

Re: [PATCH v7 15/22] riscv: sifive: dts: fu540: Add clock for cpus node

On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel wrote: > > Add clock-frequency and clocks in cpus node, so that > clock will be enabled by cpu driver. > > Signed-off-by: Pragnesh Patel > --- Squash this with 05/22

Re: [PATCH v7 10/22] clk: sifive: fu540-prci: ddr and ethernet clock initialization in SPL

On Sat, May 2, 2020 at 10:05 PM Pragnesh Patel wrote: > > Hi Jagan, > > >-Original Message- > >From: Jagan Teki > >Sent: 02 May 2020 21:44 > >To: Pragnesh Patel > >Cc: U-Boot-Denx ; Atish Patra > >; Palmer Dabbelt ; Bin > >Meng ; Paul Walmsley ; > >Troy Benjegerdes ; Anup Patel > >; Saga

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