On 08.12.19 08:41, Baruch Siach wrote:
SPL needs DM GPIO to read the SD card-detect signal. This complements
the fix in commit 70bae02f71d4 ("arm: mvebu: clearfog: fix boot from SD
card").
Signed-off-by: Baruch Siach
Reviewed-by: Stefan Roese
Thanks,
Stefan
Hi Tom,
On Wed, Dec 4, 2019 at 11:26 PM Tom Rini wrote:
>
> On Fri, Nov 29, 2019 at 12:06:33PM +0100, Belisko Marek wrote:
>
> > Hi,
> >
> > I'm trying to run mainline u-boot on amlogic a96mini device but before
> > I try to flash it does anybody have an idea if it will work on
> > mainline. As I
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1043A
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v4:
- update copyright
Changes in v3:
- none
Changes in v2:
- merge some patches to one patch
arch/arm/include/asm/gpio.h
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1046A
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v4:
- update copyright
Changes in v3:
- none
Changes in v2:
- merge some patches to one patch
arch/arm/dts/fsl-ls1046a-frwy.dts
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1012A
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v4:
- update copyright
Changes in v3:
- none
Changes in v2:
- merge some patches to one patch
arch/arm/include/asm/gpio.h
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1021A
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v4:
- update copyright
Changes in v3:
- none
Changes in v2:
- merge some patches to one patch
board/freescale/common/dcu_sii9022a.c
This adds DM_FLAG_PRE_RELOC flag to probe i2c driver
before relocation
Reviewed-by: Priyanka Jain
Signed-off-by: Biwen Li
---
Changes in v4:
- update copyright
Changes in v3:
- none
Changes in v2:
- none
drivers/i2c/mxc_i2c.c | 2 ++
1 file changed, 2 insertions(+)
d
The default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
leaves U-Boot with not enough memory to load i2c driver
before relocate, causing it to hang.
Change the default value of CONFIG_SYS_MALLOC_F_LEN
for below SoCs,
- LS1012A
- LS1021A
- LS1043A
- LS1046A
Reviewed-by: Priyanka Jain
Signed-off-by:
Add support of driver model of pcf8563
Signed-off-by: Biwen Li
---
Changes in v4:
- update commit messages
- update copyright
Changes in v3:
- update commit messages
Changes in v2:
- none
drivers/rtc/pcf8563.c | 108 ++
1
Fix below SPL build error when DM_I2C is enabled,
- arch/arm/cpu/armv8/built-in.o: In function `board_init_f:
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74: undefined reference to
`i2c_init_all'
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:(.text.board_init_f+0x30):
relocation truncated to fit: R
Adding those extra configurations allows us to successfully run UEFI
secure boot pytest on Travis CI.
Signed-off-by: AKASHI Takahiro
---
configs/sandbox64_defconfig | 3 +++
configs/sandbox_defconfig | 3 +++
2 files changed, 6 insertions(+)
diff --git a/configs/sandbox64_defconfig b/configs/
Pytest for UEFI secure boot will use several host commands.
In paricular, Test setup relies on efitools, whose version must be v1.5.2
or later. So fetch a new version of deb package directly.
Please note it has a dependency on mtools, which must also be installed
along wih efitools.
In addition, t
A fixture for UEFI secure boot tests (image authentication and variable
authentication) is defined. A small file system with test data in a single
partition formatted in fat is created.
This test requires efitools v1.5.2 or later. If the system's efitools
is older, you have to build it on your own
With this commit, image validation can be enforced, as UEFI specification
section 32.5 describes, if CONFIG_EFI_SECURE_BOOT is enabled.
Currently we support
* authentication based on db and dbx,
so dbx-validated image will always be rejected.
* following signature types:
EFI_CERT_SHA256_GUID
Provide test cases for
* image authentication for signed images
(test_efi_secboot/test_signed.py)
* image authentication for unsigned images
(test_efi_secboot/test_unsigned.py)
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/test_signed.py | 99 +
.../t
With "-at" option, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS
will be passed to SetVariable() to authenticate the variable.
Signed-off-by: AKASHI Takahiro
---
cmd/nvedit.c | 5 +++--
cmd/nvedit_efi.c | 5 -
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/cmd/nvedit
A signature database variable is associated with a specific guid.
For convenience, if user doesn't supply any guid info, "env set|print -e"
should complement it.
Signed-off-by: AKASHI Takahiro
---
cmd/nvedit_efi.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --
The following variable is exported as UEFI specification defines:
SignatureSupport: array of GUIDs representing the type of signatures
supported by the platform firmware
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_setup.c | 38 +
Provide a couple of test cases for variable authentication.
Signed-off-by: AKASHI Takahiro
---
.../py/tests/test_efi_secboot/test_authvar.py | 282 ++
1 file changed, 282 insertions(+)
create mode 100644 test/py/tests/test_efi_secboot/test_authvar.py
diff --git a/test/py/tests/
The following variable is exported as UEFI specification defines:
VendorKeys: whether the system is configured to use only vendor-provided
keys or not
The value will have to be modified if a platform has its own way of
initializing signature database, in particular, PK.
Signed-off-by:
In this commit, implemented are a couple of helper functions which will be
used to materialize variable authentication as well as image authentication
in later patches.
Signed-off-by: AKASHI Takahiro
---
include/efi_api.h | 87 +
include/efi_loader.h | 72
lib/e
UEFI specification defines several global variables which are related to
the current secure boot state. In this commit, those values will be
maintained according to operations. Currently, AuditMode and DeployedMode
are defined but not implemented.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loade
With this commit, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS
is supported for authenticated variables and the system secure state
will transfer between setup mode and user mode as UEFI specification
section 32.3 describes.
Internally, authentication data is stored as part of authenticated
efi_signature_parse_sigdb() is a helper function will be used to parse
signature database variable and instantiate a signature store structure
in later patches.
Signed-off-by: AKASHI Takahiro
---
include/efi_loader.h | 3 +
lib/efi_loader/efi_signature.c | 226 +++
Under this configuration, UEFI secure boot support will be added
in later patches.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/Kconfig | 16
1 file changed, 16 insertions(+)
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index c7027a967653..fc4199838c98 1006
The index (IMAGE_DIRECTORY_ENTRY_SECURITY) in a table points to
a region containing authentication information (image's signature)
in PE format.
WIN_CERTIFICATE structure defines an embedded signature format.
Those definitions will be used in my UEFI secure boot patch.
Signed-off-by: AKASHI Taka
One of major missing features in current UEFI implementation is "secure boot."
The ultimate goal of my attempt is to implement image authentication based
on signature and provide UEFI secure boot support which would be fully
compliant with UEFI specification, section 32[1].
(The code was originally
Enable configs related to USB Host mode, Peripheral mode and DFU.
Signed-off-by: Vignesh Raghavendra
---
configs/am65x_evm_a53_defconfig | 19 +++
1 file changed, 19 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index cec99ee1e298..
Enable USB keyboard to be used as input device at U-Boot prompt. Both
serial and USB keyboard will be active inputs simultaneously.
Signed-off-by: Vignesh Raghavendra
---
configs/am65x_evm_a53_defconfig | 3 +++
include/configs/am65x_evm.h | 1 +
2 files changed, 4 insertions(+)
diff --git
Below warning is seen when this driver is built for devices with 64 bit
physical address space.
drivers/phy/omap-usb2-phy.c: In function ‘omap_usb2_phy_probe’:
drivers/phy/omap-usb2-phy.c:187:20: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
priv->phy_base = (
Add env variables that set up dfu_alt_info for MMC/EMMC/OSPI. This
is required to allow update of firmware on these media.
Signed-off-by: Vignesh Raghavendra
---
include/configs/am65x_evm.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/include/configs/am65x_evm.h
AM654 SoC has USB2 PHY which is similar to existing USB2 PHYs on OMAP
SoCs. Add support for the same.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Marek Vasut
---
drivers/phy/omap-usb2-phy.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/phy/omap-usb2-phy.c b/
Add support for USB0 and USB1 instances on the AM6 SoC.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am65-main.dtsi | 78 ++
1 file changed, 78 insertions(+)
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index 0f5da9a563d3
This series adds USB support for AM654 SoC that has DWC3 USB controller.
Patch 1 adds new compatible for DWC3 driver. Patch 2 and 3 adds PHY
related changes and remaining patches add DT and configs related to USB
host,device and DFU support.
v2:
Rebase onto the latest master
Collect Reviewed-bys
AM654 has DWC3 USB controller that is very similar to other TI SoCs. Add
a new compatible to enable the same.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/dri
Add pinmux for USB1 and enable it as a peripheral port in U-Boot
specific dtsi since U-Boot does not support OTG.
Disable USB0 as its not available on the baseboard.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 4 +++
arch/arm/dts/k3-am654-base-board.dts
Remove redundant coherency checks before calling cache ops in UDMA
driver. This is now handled in arch specific cache operation
implementation based on Kconfig option
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 49 +---
Add new compatible to handle UDMA support for J721e SoC
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 92c7af910406..cccffb600c4c 100644
Fix up the debug prints that were dumping state of TCHAN RT registers to
use tchan for MEM_TO_DEV transfers.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/ti/k3-u
Cast pointers properly so as to avoid warnings when driver is built for
32 bit platforms
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/ti/k3-udma.c b
Exposed ring mode works well with 32 bit and 64 bit cores without need
for Proxies for 32 bit cores. Therefore switch to exposed ring mode.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
d
UDMA always expects 64 bit address pointer of the transfer descriptor in
the Ring. But on 32 bit cores like R5, pointer is always 32 bit in size.
Therefore copy over 32 bit pointer value to 64 bit variable before
pushing it over to the ring, so that upper 32 bits are 0s.
Signed-off-by: Vignesh Rag
Instead of looking getting reference to SYSFW device using name which
is not guaranteed to be constant, use phandle supplied in the DT node to
get reference to SYSFW
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/soc/ti/k3-navss-ringacc.c | 3 ++-
1 file changed,
Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygori
This series adds DMA support for J721e using exist K3 UDMA driver.
One main change is thati, on J721e, DMA resources such as DMA channels are
shared between different entities running on different cores of the SoC.
Therefore, U-Boot running on A72 core should request range of resources
allocated t
On K3 SoCs, DMA channels are shared across multiple entities, therefore
U-Boot DMA driver needs to query resource range from centralised
resource management controller i.e SystemFirmware and use DMA channels
allocated for A72 host. Add support for the same.
Signed-off-by: Vignesh Raghavendra
Revi
Import few basic bitmap functions (bitmap_{weight,fill,set,clear,or}())
and their dependencies from Linux. These are required for upcoming DMA
resource allocation support for TI's K3 SoCs.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
include/linux/bitmap.h | 133 +++
> Subject: RE: [v3 1/8] rtc: pcf8563: support driver model
>
>
>
> >-Original Message-
> >From: Biwen Li
> >Sent: Thursday, December 5, 2019 11:40 AM
> >To: Jagdish Gediya ; Priyanka Jain
> >; h...@denx.de; ja...@amarulasolutions.com;
> >aford...@gmail.com; Alison Wang ;
> >bhaskar.upad
On Thu, Dec 5, 2019 at 6:36 PM Tom Rini wrote:
>
> While we have networking use cases within SPL we do not support loading
> files via NFS at this point in time. Disable calling nfs_start() so
> that the NFS related code can be garbage collected at link time.
>
> Cc: Joe Hershberger
> Signed-off
> From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> Sent: Monday, December 09, 2019 6:29 AM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); Bin Meng; Anup Patel; Lukas Auer; Anup Patel;
> Atish Patra; Daniel Schwierzeck; Simon Glass
> Subject: [PATCH v2 2/4] riscv: add functions
On Fri, Dec 06, 2019 at 04:49:10PM -0500, Tom Rini wrote:
> On Wed, Nov 13, 2019 at 09:44:51AM +0900, AKASHI Takahiro wrote:
>
> > Adding "printk.h" will help improve portability from linux kernel
> > code (in my case, lib/asn1_decoder.c and others) where printf and
> > pr_* variant functions are
On Sat, Dec 07, 2019 at 05:34:07PM -0500, Tom Rini wrote:
> On Sat, Dec 07, 2019 at 09:51:22PM +0100, Heinrich Schuchardt wrote:
> > On 12/6/19 10:50 PM, Tom Rini wrote:
> > > On Wed, Nov 13, 2019 at 09:45:00AM +0900, AKASHI Takahiro wrote:
> > >
> > > > Imported from linux kernel v5.3:
> > > >
On Sun, Dec 08, 2019 at 04:54:06PM -0700, Simon Glass wrote:
> Hi,
>
> On Sun, 8 Dec 2019 at 06:23, Tom Rini wrote:
> >
> > On Sun, Dec 08, 2019 at 04:56:21PM +0800, Bin Meng wrote:
> > > Hi Simon,
> > >
> > > On Sat, Dec 7, 2019 at 12:43 PM Simon Glass wrote:
> > > >
> > > > Apollo Lake is an I
Add support for coral which is a range of Apollo Lake-based Chromebook
released in 2017. This also includes reef released in 2016, since it is
based on the same SoC.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7:
- Add the new documentation to the index file
Changes in v6:
The memory and silicon init parts of the FSP need support code to work.
Add this for Apollo Lake.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Drop mention of devicetree for VTD feature
- Drop mention of ramstage
- Fix various coding style problems
-
Add basic plumbing to allow Apollo Lake support to be used.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Make BOOT_FROM_FAST_SPI_FLASH a Kconfig option
Changes in v5:
- Enable SMP
Changes in v4:
- Enable HAVE_X86_FIT
- Enable INTEL_GPIO
- Switch ov
Add code to init the system both in TPL and SPL. Each phase has its own
procedure.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Change comment to apl_hostbridge_early_init_pinctrl, not apl_gpio_early_init
- Change commented-out enable_rtc_upper_bank(
Adds a driver for the Apollo Lake Primary-to-sideband bus. This supports
various child devices. It supposed both device tree and of-platdata.
Signed-off-by: Simon Glass
---
Changes in v7:
- Update comment in apl_p2sb_early_init()
Changes in v6: None
Changes in v5: None
Changes in v4:
- Detect z
These are mostly specific to a particular SoC. Add the definitions for
Apollo Lake.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Fix FSP-M and FSP-S in comments
Changes in v5: None
Changes in v4:
- apollolake -> Apollo Lake
Changes in v3:
- Add VBT
Add a driver for the Apollo Lake P-unit (power unit). It is modelled as a
syscon driver since it only needs to be probed.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Drop Glacier Lake code
- Drop platform data and pre-PCI code, since DM PCI is avail
Add loaders for SPL and TPL so that the next stage can be loaded from
memory-mapped SPI or, failing that, the Fast SPI driver.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Make BOOT_FROM_FAST_SPI_FLASH a Kconfig option
- Move image pos/size access f
Add a bare-bones CPU driver so that CPUs can be probed.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Drop unnecessary priv struct and probe method
- Make BOOT_FROM_FAST_SPI_FLASH a Kconfig option
Changes in v5:
- Add L2 cache flush function
- Drop S
Binman supports writing the position and size of U-Boot proper and SPL
into the previous phase of U-Boot. This allows the next phase to be easily
located and loaded.
Add functions to return these useful values, along with symbols to allow
TPL to load SPL.
Signed-off-by: Simon Glass
Reviewed-by:
Add a driver for the Apollo Lake Platform Controller Hub. It does not have
any functionality and is just a placeholder for now.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Tidy up header guards
- Update SPI fl
This driver models some sort of interrupt thingy but there are so many
abreviations that I cannot find out what it stands for. Possibly something
to do with interrupts.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4
This driver the LPC and provides a few functions to set up LPC features.
These should probably use ioctls() or perhaps, better, have specific
uclass methods.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Drop init of ComB since it is not used
- Drop l
This driver models the hostbridge as a northbridge. It simply sets up the
graphics BAR. It supports of-platdata.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v7: None
Changes in v6:
- Fix comments for struct apl_hostbridge_platdata
Changes in v5: None
Changes in v4:
- Avoid
Hi Bin,
On Sun, 8 Dec 2019 at 01:39, Bin Meng wrote:
>
> Hi Simon,
>
> On Sat, Dec 7, 2019 at 12:54 PM Simon Glass wrote:
> >
> > Adds a driver for the Apollo Lake Primary-to-sideband bus. This supports
> > various child devices. It supposed both device tree and of-platdata.
> >
> > Signed-off-b
This driver handles communication with the systemagent which needs to be
told when U-Boot has completed its init.
Signed-off-by: Simon Glass
---
Changes in v7:
- Add a comment to enable_bios_reset_cpl()
Changes in v6: None
Changes in v5: None
Changes in v4:
- Add a comment for enable_bios_rese
Add a driver for the Apollo Lake pinctrl. This mostly makes use of the
common Intel pinctrl support.
Signed-off-by: Simon Glass
---
Changes in v7:
- Drop Glacier Lake code
- Fix value of GPIO_28_IRQ
- Update Kconfig to avoid using def_bool
Changes in v6: None
Changes in v5: None
Changes in v4:
This driver models the hostbridge as a northbridge. It simply sets up the
graphics BAR. It supports of-platdata.
Signed-off-by: Simon Glass
---
Changes in v7: None
Changes in v6:
- Fix comments for struct apl_hostbridge_platdata
Changes in v5: None
Changes in v4:
- Avoid needing to know interna
Apollo Lake is an Intel SoC generation aimed at relatively low-end
embedded systems. It was released in 2016 but has become more popular
recently with some embedded boards using it.
This series adds support for Apollo Lake. As an example it adds an
implementation of chromebook_coral (a large range
For Apollo Lake we need to take the I2C bus controller out of reset before
using this. Add this functionality to the driver.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
---
Changes in v7: None
Changes in v6:
- Add .driver_data in the designware_pci_supported array
- Add a comment abo
These macros use __FILE__ which inserts the full path of the object file
into U-Boot, thus increasing file size. Drop these usages.
Signed-off-by: Simon Glass
---
drivers/usb/musb-new/musb_core.c | 6 ++
drivers/usb/musb-new/musb_gadget_ep0.c | 4 +++-
2 files changed, 9 insertions(+)
Hi,
On Sun, 8 Dec 2019 at 06:23, Tom Rini wrote:
>
> On Sun, Dec 08, 2019 at 04:56:21PM +0800, Bin Meng wrote:
> > Hi Simon,
> >
> > On Sat, Dec 7, 2019 at 12:43 PM Simon Glass wrote:
> > >
> > > Apollo Lake is an Intel SoC generation aimed at relatively low-end
> > > embedded systems. It was re
Hi Rick,
On Fri, 2019-12-06 at 16:26 +0800, Rick Chen wrote:
> HI Lukas
>
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Wednesday, December 04, 2019 5:40 AM
> > To: u-boot@lists.denx.de
> > Cc: Rick Jian-Zhi Chen(陳建志); Anup Patel; Bin Meng; Lukas Auer; Anup Patel;
> > An
Rick's recent patch series, which adds support for U-Boot SPL to the
Andes platform, brought several problems of the current U-Boot SPL boot
flow on RISC-V to light. Discussion on the relevant parts starts at [1].
The problem showed itself in the form of code corruption. At start,
OpenSBI relocate
Add a wait option to smp_call_function() to wait for the secondary harts
to acknowledge the call-function request. The request is considered to
be acknowledged once each secondary hart has cleared the corresponding
IPI.
As part of the call-function request, the secondary harts invalidate the
instr
At the start, OpenSBI relocates itself to its link address. If the link
address ranges of U-Boot SPL and OpenSBI overlap, the relocation can
lead to code corruption if a hart is still running U-Boot SPL during
relocation. To avoid this problem, the main hart is specified as the
preferred boot hart
Add the function riscv_get_ipi() for reading the pending status of IPIs.
The supported controllers are Andes' Platform Level Interrupt Controller
(PLIC), the Supervisor Binary Interface (SBI), and SiFive's Core Local
Interruptor (CLINT).
Signed-off-by: Lukas Auer
---
Changes in v2:
- Use the pen
OpenSBI uses a relocation lottery to determine the hart to relocate
OpenSBI to its link address. In the U-Boot SPL boot flow, the main hart
schedules the secondary harts to enter OpenSBI before doing so itself.
One of the secondary harts will therefore always be the winner of the
relocation lottery
This patch introduces support for i.MX28 based XEA board.
This board supports DM/DTS in U-Boot proper as well as DM aware drivers
in SPL (u-boot.sb) by using OF_PLATDATA.
More detailed information regarding usage of it can be found in
./board/liebherr/xea/README file.
U-Boot SPL 2019.10-rc1-00233
Hi Heinrich,
On Sat, 7 Dec 2019 at 17:31, Heinrich Schuchardt wrote:
>
> On 11/9/19 9:39 AM, Heinrich Schuchardt wrote:
> > This patch series enables the UEFI unit tests on the sandbox.
> >
> > The first patch add the missing compatible property in the device trees
> > which is required by on of
On Sun, Dec 8, 2019 at 2:03 PM Joris Offouga wrote:
>
> Signed-off-by: Joris Offouga
Reviewed-by: Otavio Salvador
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9 9981-7854 Mobile: +1 (347)
Also sync device tree with v5.5-rc1
Signed-off-by: Joris Offouga
---
arch/arm/dts/imx7d-sdb-u-boot.dtsi| 3 +
arch/arm/dts/imx7d-sdb.dts| 785 --
board/freescale/mx7dsabresd/mx7dsabresd.c | 62 --
configs/mx7dsabresd_defconfig | 6 +
co
Signed-off-by: Joris Offouga
---
board/technexion/pico-imx7d/pico-imx7d.c | 46
configs/pico-dwarf-imx7d_defconfig | 5 +++
configs/pico-hobbit-imx7d_defconfig | 5 +++
configs/pico-imx7d_bl33_defconfig| 5 +++
configs/pico-imx7d_defconfig
Signed-off-by: Joris Offouga
---
configs/mx7dsabresd_defconfig | 13 ++---
configs/mx7dsabresd_qspi_defconfig | 14 ++---
include/configs/mx7dsabresd.h | 84 ++
3 files changed, 25 insertions(+), 86 deletions(-)
diff --git a/configs/mx7dsabresd_defconfig b/c
This defconfig doesn't need it.
Signed-off-by: Joris Offouga
---
configs/mx7dsabresd_defconfig | 3 ---
1 file changed, 3 deletions(-)
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 2a9fdac338..3dac7136d2 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs
On Sun, Dec 08, 2019 at 11:49:35PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This PR includes the following x86 changes for v2020.01.
>
> - 16-bit start up codes clean up
>
> The following changes since commit d79ae6aa3087a6434b5ecdb51d20dca20c8e1596:
>
> Merge branch '2019-12-06-master-imports'
Hi Adam
follow my answer
On Sun, Dec 8, 2019 at 4:35 PM Adam Ford wrote:
>
> On Sun, Dec 8, 2019 at 6:50 AM Adam Ford wrote:
> >
> > On Sat, Dec 7, 2019 at 12:25 PM Tom Rini wrote:
> > >
> > > On Sat, Dec 07, 2019 at 08:42:32AM -0600, Adam Ford wrote:
> > >
> > > > I am trying to run the lates
Hi Tom,
This PR includes the following x86 changes for v2020.01.
- 16-bit start up codes clean up
The following changes since commit d79ae6aa3087a6434b5ecdb51d20dca20c8e1596:
Merge branch '2019-12-06-master-imports' (2019-12-06 16:45:46 -0500)
are available in the git repository at:
https
On Sun, Dec 8, 2019 at 6:50 AM Adam Ford wrote:
>
> On Sat, Dec 7, 2019 at 12:25 PM Tom Rini wrote:
> >
> > On Sat, Dec 07, 2019 at 08:42:32AM -0600, Adam Ford wrote:
> >
> > > I am trying to run the latest master
> > >
> > > 4b19b89ca4a866b7baa642533e6dbd67cd832d27
> > > with the clock patches a
On Wed, 4 Dec 2019 18:44:28 +0100
Giulio Benetti wrote:
> Add support for PLLV3 AV type.
>
> Signed-off-by: Giulio Benetti
> ---
> drivers/clk/imx/clk-pllv3.c | 76
> + 1 file changed, 76 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/
On Wed, 4 Dec 2019 18:44:34 +0100
Giulio Benetti wrote:
> Add i.MXRT compatible string and cpu type support to lpuart driver,
> to use little endian 32 bits configurations.
>
> Also according to RM, the Receive RX FIFO Enable (RXFE) field in
> LPUART FIFO register is bit 3, so this definition s
On Wed, 4 Dec 2019 18:44:33 +0100
Giulio Benetti wrote:
> This driver assumes that lpuart clock is already enabled before
> probing but using DM only lpuart won't be automatically enabled so add
> clk_enable() when probing if CONFIG_CLK is defined.
>
> Signed-off-by: Giulio Benetti
> ---
> dr
On Wed, 4 Dec 2019 18:44:32 +0100
Giulio Benetti wrote:
> Add dtsi file for i.MXRT1050.
>
> Signed-off-by: Giulio Benetti
> ---
> arch/arm/dts/imxrt1050.dtsi | 146 +++
> include/dt-bindings/pinctrl/pins-imxrt1050.h | 993
> +++ 2 files changed, 1139 insertions
On Wed, 4 Dec 2019 18:44:31 +0100
Giulio Benetti wrote:
> Add i.MXRT pinctrl driver.
>
> Signed-off-by: Giulio Benetti
> ---
> drivers/pinctrl/nxp/Kconfig | 14 ++
> drivers/pinctrl/nxp/Makefile| 1 +
> drivers/pinctrl/nxp/pinctrl-imxrt.c | 40
> ++
On Wed, 4 Dec 2019 18:44:30 +0100
Giulio Benetti wrote:
> Add i.MXRT1050 clk driver support.
>
> Signed-off-by: Giulio Benetti
> ---
> drivers/clk/imx/Kconfig | 16 ++
> drivers/clk/imx/Makefile| 2 +
> drivers/clk/imx/clk-imxrt1050.c | 2
On Wed, 4 Dec 2019 18:44:21 +0100
Giulio Benetti wrote:
> At the moment entry_point is set to image_get_load(header) that sets
> it to "load address" instead of "entry point", assuming entry_point is
> equal to load_addr, but it's not true. Then load_addr is set to
> "entry_point - header_size",
On Wed, 4 Dec 2019 18:44:29 +0100
Giulio Benetti wrote:
> Implement set_rate() for pfd.
>
> Signed-off-by: Giulio Benetti
> ---
> drivers/clk/imx/clk-pfd.c | 22 ++
> 1 file changed, 22 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-pfd.c b/drivers/clk/imx/clk-pfd.c
>
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