It is defconfig synchronization caused by commit a074667d5203
("Kconfig: Varios: Fix more SPL, TPL dependencies").
These platforms are not enabling SPL that's why SPL symbols shouldn't be
the part of defconfig.
Signed-off-by: Michal Simek
---
configs/xilinx_versal_mini_emmc0_defconfig | 1 -
co
Define default address via Kconfig. There is no need to change this address
for most of the boards but it is also possible. This one line save a lot of
lines in defconfigs that's why make sense to do it.
The similar change has been done by commit 9340d8fe8beb
("sunxi: move CONFIG_SPL_TEXT_BASE fro
Hi Giulio,
On 10/09/19 20:32, Giulio Benetti wrote:
> Hello everybody,
>
> I would like to port imxrt to u-boot and I would like to ask you:
> - do you have the interest on upstreaming it?
> if yes:
> I've seen how they've dealt with 'stm32' and 'stm32mp' that is similar
> to 'imxrt' and 'imx'. S
Heinrich,
Apologies for having not replied.
On Fri, Aug 23, 2019 at 08:09:45PM +0200, Heinrich Schuchardt wrote:
> On 8/23/19 1:34 AM, AKASHI Takahiro wrote:
> >On Thu, Aug 22, 2019 at 08:19:24PM +0200, Heinrich Schuchardt wrote:
> >>On 8/22/19 10:54 AM, AKASHI Takahiro wrote:
> >>>Sandbox's "hos
On Wed, Sep 11, 2019 at 7:28 AM Bin Meng wrote:
>
> Hi Marcus,
>
> On Tue, Sep 10, 2019 at 11:53 PM Marcus Comstedt wrote:
> >
> >
> > Hi Bin,
> >
> > Bin Meng writes:
> >
> > > So 4.14 definitely was an out-of-tree kernel
> >
> > Everything before 5.2 was out-of-tree.
> >
> >
> > > No one can g
Heinrich,
On Fri, Aug 23, 2019 at 09:04:21AM +0900, AKASHI Takahiro wrote:
> On Thu, Aug 22, 2019 at 12:52:41PM +0200, Heinrich Schuchardt wrote:
> > On 8/22/19 11:11 AM, Mark Kettenis wrote:
> > >>From: AKASHI Takahiro
> > >>Date: Thu, 22 Aug 2019 17:06:25 +0900
> > >>
> > >>Currently, a whole d
Heinrich,
On Fri, Aug 23, 2019 at 08:42:27AM +0900, AKASHI Takahiro wrote:
> On Thu, Aug 22, 2019 at 07:53:46PM +0200, Heinrich Schuchardt wrote:
> > On 8/22/19 11:03 AM, AKASHI Takahiro wrote:
> > >Heinrich,
> > >
> > >I'm now wondering whether LoadedImage's LoadOptions, which comes
> > >from "bo
> -Original Message-
> From: Jun Nie
> Sent: 2019年9月9日 21:47
> To: Peng Fan
> Cc: Stefano Babic ; Fabio Estevam ;
> Otavio Salvador ; Vanessa Maegima
> ; Bryan O'Donoghue
> ; U-Boot Mailing List
> Subject: Re: [PATCH 0/3] Support distro boot in pico-imx7d BL33 case
>
> Peng Fan 于2019
Hi Ashish,
Hi Frieder,
On 09.09.19 10:10, Schrempf Frieder wrote:
Hi Ashish,
On 27.08.19 11:56, Ashish Kumar wrote:
-Original Message-
From: Schrempf Frieder
Sent: Wednesday, August 14, 2019 5:41 PM
To: Ashish Kumar ; Ye Li ;
ja...@amarulasolutions.com
Cc: Fabio Estevam ; u-boot@li
For non-DM code, below functions had similar names.
- fsl_esdhc_initialize
- fsl_esdhc_mmc_init
- fsl_esdhc_init
However fsl_esdhc_init was mainly used to get cfg. So rename it
to fsl_esdhc_get_cfg. Fix up bus-width capability handling, and
drop controller initialization because it will be re-init
A previous patch below adding DDR mode support was actually for i.MX
platforms. Now i.MX eSDHC driver is fsl_esdhc_imx.c. For QorIQ eSDHC,
it uses different process for DDR mode. Let's drop DDR support code
for i.MX in fsl_esdhc driver.
0e1bf61 mmc: fsl_esdhc: Add support for DDR mode
Signed-off-
This patch is just to clean up code. There were not changes on function.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- Involved esdhc_ops in non-DM conditional build.
Changes for v3:
- None.
---
drivers/mmc/fsl_esdhc.c | 286
incl
Current fsl_esdhc driver had support DM_MMC with BLK enabled.
Since BLK will be hard requirement of DM_MMC, let's do this
now in fsl_esdhc driver. Don't keep BLK conditioanl compiling.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
Changes for v3:
- None.
---
drivers/mmc/fs
This patch-set is to clean up fsl_esdhc code.
Changes for v2:
- Involved esdhc_ops in non-DM conditional build.
Changes for v3:
- Added a patch to drop i.MX DDR mode code.
Yangbo Lu (4):
mmc: fsl_esdhc: make BLK as hard requirement of DM_MMC
mmc: fsl_esdhc: clean up code
mmc
Hi Marcus,
On Tue, Sep 10, 2019 at 11:53 PM Marcus Comstedt wrote:
>
>
> Hi Bin,
>
> Bin Meng writes:
>
> > So 4.14 definitely was an out-of-tree kernel
>
> Everything before 5.2 was out-of-tree.
>
>
> > No one can guarantee an out-of-tree implementation will be
> > keeping compatible after it's
> Subject: Re: [PATCH v4 0/1] imx: support i.MX8QM ROM 7720 a1 board
>
> On 10/09/19, Peng Fan wrote:
> > > Subject: [PATCH v4 0/1] imx: support i.MX8QM ROM 7720 a1 board
> > >
> > > Hello list,
> > >
> > > need some information howto avoid the imx-mkimage repo and create
> > > full boostream dire
> Subject: Re: [U-Boot] [PATCH v2 5/5] imx: add i.MX6ULZ board
>
> Hi Peng,
> Hi Fabio,
>
> On 06.09.19 09:43, Peng Fan wrote:
> >> Subject: Re: [U-Boot] [PATCH v2 5/5] imx: add i.MX6ULZ board
> >>
> >> Hi Stefan,
> >>
> >> On Thu, Sep 5, 2019 at 5:59 AM Stefan Roese wrote:
> >>
> >>> a)
> >>> W
On Tue, Sep 10, 2019 at 09:59:38AM +, Atish Patra wrote:
> On Mon, 2019-09-09 at 13:22 +0300, David Abdurachmanov wrote:
> > On Mon, Sep 9, 2019 at 8:05 AM Anup Patel wrote:
> > > Hi,
> > >
> > > I think keeping FDT placement in-sync between U-Boot and OpenSBI
> > > across platforms is going
[Adding Marek]
On Tue, Sep 10, 2019 at 5:32 AM Rasmus Villemoes
wrote:
>
> It's true that booting normally doesn't take long enough for the
> register to roll (which actually happens in a little over an hour, not
> just a few seconds). However, the counter starts at power-on, and if
> the board i
Hi Giulio,
On Tue, Sep 10, 2019 at 3:32 PM Giulio Benetti
wrote:
>
> Hello everybody,
>
> I would like to port imxrt to u-boot and I would like to ask you:
> - do you have the interest on upstreaming it?
> if yes:
> I've seen how they've dealt with 'stm32' and 'stm32mp' that is similar
> to 'imxr
On Tue, Sep 10, 2019 at 08:35:30PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This PR includes the following x86 changes for v2019.10:
> - Tangier ACPI table fixes
> - Support getting high memory size on QEMU x86
> - Show UEFI images involved in crash for x86
> - EFI loader conventional memory map fix
ssing "=" from previous fix (2019-09-09 10:55:45 -0400)
>
> are available in the Git repository at:
>
> https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git
> tags/u-boot-amlogic-20190910
>
> for you to fetch changes up to b35b8076828d1059c1fcc648ed8c8210ebe6
Vignesh Raghavendra schrieb am Di., 10. Sep. 2019, 19:07:
> Not all variants of n25q256* and n25q512* support 4 Byte stateless
> addressing opcodes and there is no easy way to discover at runtime
> whether the flash supports this feature or not.
> Therefore don't set SPI_NOR_4B_OPCODES for these
On 06/09/19 9:05 pm, Jagan Teki wrote:
> On Fri, Aug 23, 2019 at 1:56 AM Sunil Mohan Adapa wrote:
>>
>> This is a follow up a patch that didn't create a separate dts:
>> https://lists.denx.de/pipermail/u-boot/2019-July/379109.html
>>
>> A64 OLinuXino board from Olimex has three variants with onboa
A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMM
Not all variants of n25q256* and n25q512* support 4 Byte stateless
addressing opcodes and there is no easy way to discover at runtime
whether the flash supports this feature or not.
Therefore don't set SPI_NOR_4B_OPCODES for these flashes.
Signed-off-by: Vignesh Raghavendra
For n25q512ax3:
Tested
mt25qu512a is just a rebranded name for n25q512a. All the 6 bytes of JEDEC
ID bytes are same for mt25qu512a and n25q512a.
Commit 8385520f2931 ("mtd: spi: Add flash property for Micron mt25qu512a")
added new entry for mt25qu512a before n25q512a entry. So on older boards
with n25q512a "sf probe" now
Dear Patrick,
In message <9c7801afb8c94c638933cf33746ae...@sfhdag6node3.st.com> you wrote:
>
> And I agree the name seens not perfect.
>
> > > - CONFIG_SPL_ENV_SUPPORT for SPL
> > > - CONFIG_TPL_ENV_SUPPORT for TPL
>
> These pre-existing name are defined in common/spl/Kconfig
>
> With the same
Hi Bin,
Bin Meng writes:
> So 4.14 definitely was an out-of-tree kernel
Everything before 5.2 was out-of-tree.
> No one can guarantee an out-of-tree implementation will be
> keeping compatible after it's accepted in-tree.
Reviewers/maintainers can guarantee compatibility with existing
hardw
Enable the DM based GPIO driver for FU540-C000 SoC.
Signed-off-by: Sagar Shrikant Kadam
---
board/sifive/fu540/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
index 5d65080..5ca2147 100644
--- a/board/sifive/fu540/Kconfig
+++
This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.
This implementation is ported from linux base
U-Boot currently is missing GPIO support for FU540-C000 SoC which is
mounted on HiFive Unleashed A00 board. This patch is intended to add DM
based GPIO controller driver in order to access GPIO pins within the SoC
using GPIO command in U-Boot. More details on the GPIO controller within
the SoC can
Hi Marcus,
On Tue, Sep 10, 2019 at 4:52 AM Marcus Comstedt wrote:
>
>
> Hi Bin,
>
> Bin Meng writes:
>
> >> Yes, but in which Linux? This whole thing started because U-Boot will
> >
> > The latest Linux kernel v5.3.
>
> Thanks. I'll try it later. As if to prove my point, the one from
> 5.2.11
On Tue, Sep 10, 2019 at 11:01:18AM +, Patrick DELAUNAY wrote:
> Hi,
>
> > From: Wolfgang Denk
> > Sent: samedi 7 septembre 2019 13:52
> >
> > Dear Patrick,
> >
> > In message <1567530547-14331-1-git-send-email-patrick.delau...@st.com> you
> > wrote:
> > > Add a new flag CONFIG_ENV_SUPPORT t
On Tue, Sep 10, 2019 at 7:54 AM Tom Rini wrote:
>
> On Tue, Sep 10, 2019 at 10:29:04AM +0200, Wolfgang Denk wrote:
> > Dear Tom,
> >
> > In message <20190909210130.GU6927@bill-the-cat> you wrote:
> > >
> > > On Wed, Sep 04, 2019 at 01:30:02PM -0500, Joe Hershberger wrote:
> > ...
> > > > I would g
On 10/09/19, Peng Fan wrote:
> > Subject: [PATCH v4 0/1] imx: support i.MX8QM ROM 7720 a1 board
> >
> > Hello list,
> >
> > need some information howto avoid the imx-mkimage repo and create full
> > boostream directly from u-boot with all the binary blobs.
>
> Try the diff, and see whether it he
On Tue, Sep 10, 2019 at 10:29:04AM +0200, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20190909210130.GU6927@bill-the-cat> you wrote:
> >
> > On Wed, Sep 04, 2019 at 01:30:02PM -0500, Joe Hershberger wrote:
> ...
> > > I would gladly volunteer for this role if Wolfgang would co-maintain
> > >
Hi Tom,
This PR includes the following x86 changes for v2019.10:
- Tangier ACPI table fixes
- Support getting high memory size on QEMU x86
- Show UEFI images involved in crash for x86
- EFI loader conventional memory map fix
The following changes since commit c705fc3b40b88bfbf465448643c91da71426d
Hi Peng,
Hi Fabio,
On 06.09.19 09:43, Peng Fan wrote:
Subject: Re: [U-Boot] [PATCH v2 5/5] imx: add i.MX6ULZ board
Hi Stefan,
On Thu, Sep 5, 2019 at 5:59 AM Stefan Roese wrote:
a)
Why is SPL not used in the mainline i.MX6ULL/ULZ port? The i.MX6UL
(14x14) does use SPL.
Yes, I think it coul
Hi Eugeniy,
One more request:
I am trying to find a better way to identify parts that don't support
4byte addressing.
Could you enable CONFIG_SPI_FLASH_SFDP_SUPPORT and also enable debug
prints in spi_mem_exec_op() (in drivers/spi/spi-mem.c like before) and
provide logs?
Just logs of "sf probe"
On 10/09/19 5:11 PM, Eugeniy Paltsev wrote:
> Hi Vignesh,
>
> that patch helps - both erase and write works fine.
>
Thanks for testing! I will cleanup the patches and send formal patches
to the list with your tested by.
Regards
Vignesh
> For n25q512ax3:
> Tested-by: "Eugeniy Paltsev "
>
>
Hi Vignesh,
that patch helps - both erase and write works fine.
For n25q512ax3:
Tested-by: "Eugeniy Paltsev "
---
Eugeniy Paltsev
From: Vignesh Raghavendra
Sent: Tuesday, September 10, 2019 08:07
To: Eugeniy Paltsev; Jagan Teki
Cc: u-boot@lists.denx.
Hi,
It's a gentle reminder to not forgot this patch.
Thanks
Patrice
On 8/26/19 1:50 PM, Patrice Chotard wrote:
> Regulator should not be enabled at probe time if regulator-boot-on
> property is not in the dt node.
>
> "enable-active-high" property is only used to indicate the GPIO
> polarity.
>
Sorry it's not the correct patch version. I will send the reminder on the
correct one (v2).
Patrice
On 9/10/19 11:54 AM, Patrice CHOTARD wrote:
> Hi,
>
> It's a gentle reminder to not forgot this patch
>
> Thanks
>
> Patrice
>
> On 7/25/19 9:12 AM, Patrice Chotard wrote:
>> Regulator should not
mlogic.git
tags/u-boot-amlogic-20190910
for you to fetch changes up to b35b8076828d1059c1fcc648ed8c8210ebe6a3dd:
usb: xhci-dwc3: Add support for dis_u2_susphy_quirk (2019-09-10 10:00:53
+0200)
- Add support for dis_u2_susphy_qu
From: Mans Rullgard
This patch introduces support for i.MX28 based XEA board.
This board supports DM/DTS in U-Boot proper as well as DM aware drivers
in SPL (u-boot.sb).
More detailed information regarding usage of it can be found in
./board/liebherr/xea/README file.
U-Boot SPL 2019.10-rc1-0023
Hi,
> From: Wolfgang Denk
> Sent: samedi 7 septembre 2019 13:52
>
> Dear Patrick,
>
> In message <1567530547-14331-1-git-send-email-patrick.delau...@st.com> you
> wrote:
> > Add a new flag CONFIG_ENV_SUPPORT to compile all the environment
> > features in U-Boot (attributes, callbacks and flags)
From: Joseph Chen
The RK817 is a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators(4*BUCKs, 1* BOOST, 9*LDOs, 1*SWITCH)
- RTC
- Clocking
Signed-off-by: Joseph Chen
Signed-off-by: Elaine Zhang
---
drivers/power/pmic
From: Joseph Chen
Signed-off-by: Joseph Chen
Signed-off-by: Elaine Zhang
---
drivers/power/pmic/rk8xx.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 00c8a2e091d8..df2056913ced 100644
-
From: Joseph Chen
The RK809 is a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators(5*BUCKs, 9*LDOs, 2*SWITCHs)
- RTC
- Clocking
Signed-off-by: Joseph Chen
Signed-off-by: Elaine Zhang
---
drivers/power/pmic/rk8xx.c
Yinbo,
Priyanka is the maintainer now for NXP platforms.
York
> On Sep 9, 2019, at 20:10, Yinbo Zhu wrote:
>
> Hi York Sun,
>
> Could you help me merge that series patch to uboot upstream tree.
>
> Regards,
> Yinbo Zhu
> Original Message-
> From: Peng Fan
> Sent: 2019年8月28日 9:04
> T
From: Joseph Chen
Signed-off-by: Joseph Chen
Signed-off-by: Elaine Zhang
---
drivers/power/pmic/pmic-uclass.c | 11 +++
include/power/pmic.h | 9 +
2 files changed, 20 insertions(+)
diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
i
The RK805 are a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators(4*BUCKs, 3*LDOs)
- RTC
- Clocking
Signed-off-by: Elaine Zhang
---
drivers/power/pmic/rk8xx.c | 1 +
drivers/power/regulator/rk8xx.c | 17
The RK816 is a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators(4*BUCKs, 1*BOOST, 6*LDOs, 1*SWITCH)
- RTC
- Clocking
Signed-off-by: Elaine Zhang
---
drivers/power/pmic/rk8xx.c | 1 +
drivers/power/regulator/rk
This enables reading the cpuid from e-fuse, and deriving a static
MAC address from it. Without this, the ethernet interface on the
rockpro64 can't be used to boot.
Signed-off-by: Hugh Cole-Baker
Cc: Philipp Tomsich
---
configs/rockpro64-rk3399_defconfig | 3 +++
1 file changed, 3 insertions(+)
In order to adapt the following pmics, make the interface more compatible.
Support buck and ldo suspend voltage setting and getting.
Supprot buck and ldo suspend enable/disable setting and getting.
Signed-off-by: Elaine Zhang
---
drivers/power/regulator/rk8xx.c | 547
Support more PMIC and improve compatibility between pmics.
Change in V2:
[PATCH v2 1/8]: Add regulator suspend volatge and en/disable test.
[PATCH v2 2/8]: Split the [PATCH v1 2/7], rk808 and rk818 updates.
[PATCH v2 3/8]: Split the [PATCH v1 2/7], support rk816 pmic and update commit
message.
[P
From: Joseph Chen
support parse regulator standard property:
regulator-off-in-suspend;
regulator-init-microvolt;
regulator-suspend-microvolt:
regulator_get_suspend_enable
regulator_set_suspend_enable
regulator_get_suspend_value
regulator_set_suspend_value
Signed-off-by: Joseph Chen
Signed-o
Hi Frieder,
> On Mon, 9 Sep 2019 11:11:50 +
> Schrempf Frieder wrote:
>
> > Hi Lukasz,
> >
> > On 05.09.19 20:09, Tom Rini wrote:
> > > On Thu, Sep 05, 2019 at 12:16:36AM +0200, Lukasz Majewski wrote:
> > >
> > >> This patch series introduces new SPL and TPL specific Kconfig
> > >> ent
On Mon, 2019-09-09 at 13:22 +0300, David Abdurachmanov wrote:
> On Mon, Sep 9, 2019 at 8:05 AM Anup Patel wrote:
> > Hi,
> >
> > I think keeping FDT placement in-sync between U-Boot and OpenSBI
> > across platforms is going to be painful.
> >
> > I suggest that for all platforms U-Boot explicitl
Hi,
It's a gentle reminder to not forgot this patch
Thanks
Patrice
On 7/25/19 9:12 AM, Patrice Chotard wrote:
> Regulator should not be enabled at probe time if regulator-boot-on
> property is not in the dt node.
>
> "enable-active-high" property is only used to indicate the GPIO
> polarity.
>
readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.
Signed-off-by: Rasmus Villemoes
---
arch/arm/include/asm/io.h | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 78b
No ARM board seems to define __mem_pci - and if it did, one would get tons of
./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined
warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first defini
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
No functional change.
Signed-off-by: Ley Foon Tan
---
v2:
- Change to use writel(), readl() and etc.
- Get base address from DT.
- Add prefix to defines.
---
arch/arm/mach-socfpga/clock_manager_s10.c | 4 +-
Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
No functional change.
Signed-off-by: Ley Foon Tan
---
v2:
- Get base address from DT
- Change to use writel(), readl(), setbits_le32() and clrbits_le32().
- Add prefix to defines.
---
arch/arm/mach-socfpga/include/m
Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
No functional change.
Signed-off-by: Ley Foon Tan
---
v2:
- Change to use writel(), readl() and etc.
- Get base address from DT.
- Add prefix to defines.
---
arch/arm/mach-socfpga/clock_manager.c | 12 +-
a
Add u-boot,dm-pre-reloc for sysmgr and clkmgr nodes to use it in SPL.
In preparation to get base address from DT.
Signed-off-by: Ley Foon Tan
---
arch/arm/dts/socfpga-common-u-boot.dtsi | 8
arch/arm/dts/socfpga.dtsi| 2 +-
arch/arm/dts/socfpga_arria10.d
This is 2nd version of patchset to convert reset, system and clock manager
drivers to use #define instead of struct.
Tested on Cyclone 5, Arria 10 and Stratix 10 devices.
Patch 1 is new one, patch 2 to 4 have changes.
Main changes in this version are:
- Get base address from DT
- Change to use w
It's true that booting normally doesn't take long enough for the
register to roll (which actually happens in a little over an hour, not
just a few seconds). However, the counter starts at power-on, and if
the board is held in reset to be booted over USB, one actually risks
hitting wrap-around durin
Dear Tom,
In message <20190909210130.GU6927@bill-the-cat> you wrote:
>
> On Wed, Sep 04, 2019 at 01:30:02PM -0500, Joe Hershberger wrote:
...
> > I would gladly volunteer for this role if Wolfgang would co-maintain
> > to keep me in line. He seems to have an uncanny ability to keep all
> > the ca
On Tue, Sep 10, 2019 at 4:14 PM Bin Meng wrote:
>
> On Thu, Aug 29, 2019 at 10:04 PM Andy Shevchenko
> wrote:
> >
> > For sake of consistency use spaces over TABs in ASL code.
> >
> > Signed-off-by: Andy Shevchenko
> > ---
> > .../asm/arch-tangier/acpi/southcluster.asl| 26 +
Dear Philippe,
In message <992029351.2212296.1568047262683.javamail.zim...@softathome.com> you
wrote:
>
> I have severals layers in my boot chain, and I want to use bootcount
> in severals layers to manage boot issues. If severals layers use the
> same variable name (bootcount) and a boot issue h
On Tue, Sep 10, 2019 at 4:14 PM Bin Meng wrote:
>
> On Thu, Aug 29, 2019 at 10:04 PM Andy Shevchenko
> wrote:
> >
> > Intel iDMA 32-bit controller has 17 bits for the maximum block size value.
> > Due to nature of the binary number representation the maximum value is
> > 2^17 - 1. The original co
Hi Peng,
Any comments on this patch-set?
Thanks a lot.
Best regards,
Yangbo Lu
> -Original Message-
> From: Yangbo Lu
> Sent: Friday, September 6, 2019 2:05 PM
> To: u-boot@lists.denx.de; Peng Fan
> Cc: Y.b. Lu
> Subject: [v2, 0/3] mmc: fsl_esdhc: clean up code
>
> This patch-set is
On Tue, Sep 10, 2019 at 4:14 PM Bin Meng wrote:
>
> On Thu, Aug 29, 2019 at 10:04 PM Andy Shevchenko
> wrote:
> >
> > Per PCI firmware specification the ACPI has to reserve the memory
> > which is defined as PCI ECAM.
> >
> > Fixes: 39665beed6f7 ("x86: tangier: Enable ACPI support for Intel Tangi
On Tue, Sep 10, 2019 at 4:14 PM Bin Meng wrote:
>
> Hi Andy,
>
> On Thu, Aug 29, 2019 at 10:29 PM Andy Shevchenko
> wrote:
> >
> > On Thu, Aug 29, 2019 at 5:13 PM Bin Meng wrote:
> > >
> > > Hi Andy,
> > >
> > > On Thu, Aug 29, 2019 at 10:04 PM Andy Shevchenko
> > > wrote:
> > > >
> > > > GCC s
On Thu, Aug 29, 2019 at 10:04 PM Andy Shevchenko
wrote:
>
> For sake of consistency use spaces over TABs in ASL code.
>
> Signed-off-by: Andy Shevchenko
> ---
> .../asm/arch-tangier/acpi/southcluster.asl| 26 +--
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
Reviewed
On Thu, Aug 29, 2019 at 10:04 PM Andy Shevchenko
wrote:
>
> Per PCI firmware specification the ACPI has to reserve the memory
> which is defined as PCI ECAM.
>
> Fixes: 39665beed6f7 ("x86: tangier: Enable ACPI support for Intel Tangier")
> Signed-off-by: Andy Shevchenko
> ---
> arch/x86/cpu/tang
On Thu, Aug 29, 2019 at 10:04 PM Andy Shevchenko
wrote:
>
> Intel iDMA 32-bit controller has 17 bits for the maximum block size value.
> Due to nature of the binary number representation the maximum value is
> 2^17 - 1. The original code misses the latter part in equation.
>
> Fixes: 5e99fde34a77
Hi Andy,
On Thu, Aug 29, 2019 at 10:29 PM Andy Shevchenko
wrote:
>
> On Thu, Aug 29, 2019 at 5:13 PM Bin Meng wrote:
> >
> > Hi Andy,
> >
> > On Thu, Aug 29, 2019 at 10:04 PM Andy Shevchenko
> > wrote:
> > >
> > > GCC starts complaining about possible pointer misalignment of pointers to
> > >
Hi,
> -Original Message-
> From: Peng Fan
> Sent: Tuesday, September 10, 2019 9:29 AM
> To: Sébastien Szymanski ;
> u-boot@lists.denx.de; Y.b. Lu
> Cc: Fabio Estevam ; Otavio Salvador
>
> Subject: RE: [PATCH 1/2] Convert CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
> to Kconfig
>
> +Y.b
>
> > ---
Hi Neil,
On Tue, Sep 10, 2019 at 3:58 PM Neil Armstrong wrote:
>
> Hi Bin, Marek,
>
> On 10/09/2019 03:56, Bin Meng wrote:
> > On Tue, Sep 10, 2019 at 2:52 AM Neil Armstrong
> > wrote:
> >>
> >> This quirk is necessary for the Amlogic GXL SoCs otherwise the
> >> Port 2 PHY doesn't get out of su
Hi Bin, Marek,
On 10/09/2019 03:56, Bin Meng wrote:
> On Tue, Sep 10, 2019 at 2:52 AM Neil Armstrong
> wrote:
>>
>> This quirk is necessary for the Amlogic GXL SoCs otherwise the
>> Port 2 PHY doesn't get out of suspend and U-Boot resets the board after:
>>
>> XHCI timeout on event type 33... ca
Thanks Bin!
> -Original Message-
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Monday, September 9, 2019 11:31 PM
> To: Park, Aiden
> Cc: Heinrich Schuchardt ; Alexander Graf
> ; u-boot@lists.denx.de
> Subject: Re: [PATCH v3 2/2] x86: efi_loader: Use
> efi_add_conventional_memory_m
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