On Wed, Dec 12, 2018 at 12:14:27PM +0530, Sumit Garg wrote:
> On Wed, 12 Dec 2018 at 07:09, Takahiro Akashi
> wrote:
> >
> > On Tue, Dec 11, 2018 at 06:04:05PM +0530, Sumit Garg wrote:
> > > On Mon, 26 Nov 2018 at 16:51, Sumit Garg wrote:
> > > >
> > > > Currently on qemu-arm platforms environmen
Commit 4687919684e0 ("serial: Remove DM_FLAG_PRE_RELOC flag in various
drivers") essentially drops flag DM_FLAG_PRE_RELOC from serial_pl01x
driver for Poplar platform, because the platform falls into the
following strategy category made by the commit.
Surround DM_FLAG_PRE_RELOC flag with OF_CONT
In arch_cpu_init_dm() do some basic architecture level cpu
initialization, like FPU enable, etc.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3:
- only initialize mcounteren CSR for S-mode
- only touch satp in M-mode U-Boot
- move the implementation to ar
With current csr_xxx ops, we cannot pass a macro to parameter
'csr', hence we need add another level to allow the parameter
to be a macro itself, aka indirect stringification.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- new patch
This updates supports_extension() implementation to use the desc
string from the cpu driver whenever possible, which avoids the
reading of misa CSR for S-mode U-Boot.
Signed-off-by: Bin Meng
---
Changes in v4:
- print warnings for S-mode without CONFIG_CPU
Changes in v3:
- new patch to update
The standard RISC-V ISA sets aside a 12-bit encoding space for up
to 4096 CSRs. This adds all known CSR numbers as defined in the
RISC-V Privileged Architecture Version 1.10.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3:
- add sedeleg (0x102) and sidele
This adds all exception codes in encoding.h.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/riscv/include/asm/encoding.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/riscv/include/asm/encoding.h
Currently the M-mode trap handler codes are in start.S. For future
extension, move them to a separate file mtrap.S.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/riscv/cpu/Makefile | 2 +-
arch/riscv/cpu/mtrap.S | 111 +
This is not used by any board. Remove it.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3:
- new patch to remove ae350.dts
Changes in v2: None
arch/riscv/dts/ae350.dts | 229 ---
1 file changed, 229 deletions(
From: Anup Patel
So far we have a Kconfig option for supervisor mode. This adds an
option for the machine mode.
Signed-off-by: Anup Patel
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- incorporated and reworked Anup's S-mode time
At present the hart id passed via a0 in the U-Boot entry is saved
to s0 at the beginning but does not preserve later. Save it to the
global data structure so that it can be used later.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3:
- new patch to save bo
Add the QEMU RISC-V platform-specific Kconfig options, to include
CPU and timer drivers.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- add CMD_CPU as well
arch/riscv/Kconfig | 1 +
arch/riscv/cpu/qemu/Kconfig
This calls cpu_probe_all() to probe all available cpus.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3:
- probe cpus in the pre-relocation stage too
Changes in v2:
- move to arch/riscv/cpu/cpu.c
arch/riscv/cpu/cpu.c| 26
At present the trap handler returns to hardcoded M-mode/S-mode.
Change to returning to previous privilege level instead.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/riscv/cpu/mtrap.S | 8
1 file changed, 8 delet
Avoid reading mhartid CSR directly, instead use the one we saved
in the global data structure before.
With this patch, BBL no longer needs to be hacked to provide the
mhartid CSR emulation for S-mode U-Boot.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3
sp cannot be loaded before restoring other registers.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/riscv/cpu/mtrap.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/
With this change, we can avoid a forward declaration.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- rebase on u-boot/master
- drop the patch "riscv: Pass correct exception code to _exit_trap()"
- drop the patch "riscv: Refactor han
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.
This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as som
Increase the heap size for the pre-relocation stage, so that CPU
driver can be loaded.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/riscv/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/riscv/Kconfig b
From: Anup Patel
This adds an implementation of riscv_get_time() API that is using
rdtime instruction.
This is the case for S-mode U-Boot, and is useful for processors
that support rdtime in M-mode too.
Signed-off-by: Anup Patel
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes i
With DM CPU driver, the non-DM version of print_cpuinfo() is no
longer needed.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3:
- new patch to remove non-DM version of print_cpuinfo()
Changes in v2: None
arch/riscv/cpu/cpu.c | 37 ---
There is no need to expose RISCV_NDS to the Kconfig menu as it is
an ax25-specific option.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/riscv/cpu/ax25/Kconfig | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
RISC-V privileged architecture v1.10 defines a real-time counter,
exposed as a memory-mapped machine-mode register - mtime. mtime must
run at constant frequency, and the platform must provide a mechanism
for determining the timebase of mtime. The mtime register has a
64-bit precision on all RV32, R
This adds a driver for RISC-V CPU. Note the driver will bind
a RISC-V timer driver if "timebase-frequency" property is
present in the device tree.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- pass NULL as the timer device to devic
To enumerate devices on the /soc/ node, create a "simple-bus"
driver to match "riscv-virtio-soc".
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- add DM_FLAG_PRE_RELOC flag to the simple-bus driver
arch/riscv/cpu/qemu/cpu.c | 14 ++
From: Lukas Auer
RISC-V has two code models, medium low (medlow) and medium any (medany).
Medlow limits addressable memory to a single 2 GiB range between the
absolute addresses -2 GiB and +2 GiB. Medany limits addressable memory
to any single 2 GiB address range.
By default, medlow is selected
This adds a timebase_freq member to the 'struct cpu_platdata', to
hold the "timebase-frequency" value in the cpu or /cpus node.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Reviewed-by: Lukas Auer
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use 'Hz' instead of 'HZ'
incl
This adds DM drivers to support RISC-V CPU and timer, plus some bug fixes.
This series is available at u-boot-x86/riscv-working for testing.
Changes in v4:
- print warnings for S-mode without CONFIG_CPU
Changes in v3:
- remove 'select RISCV_CLINT' in Kconfig
- do not mention the spec version num
Hi Lukas,
On Wed, Dec 12, 2018 at 7:40 AM Auer, Lukas
wrote:
>
> Hi Bin,
>
> On Tue, 2018-12-11 at 01:34 -0800, Bin Meng wrote:
> > This updates supports_extension() implementation to use the desc
> > string from the cpu driver whenever possible, which avoids the
> > reading of misa CSR for S-mod
On Wed, 12 Dec 2018 at 07:09, Takahiro Akashi
wrote:
>
> On Tue, Dec 11, 2018 at 06:04:05PM +0530, Sumit Garg wrote:
> > On Mon, 26 Nov 2018 at 16:51, Sumit Garg wrote:
> > >
> > > Currently on qemu-arm platforms environment is kept in RAM. Instead
> > > use pflash device 1 to provide persistent
On Tue, Dec 11, 2018 at 11:02 PM Anup Patel wrote:
>
> This patch enables SiFive UART driver for QEMU RISC-V emulation
> by implying SIFIVE_SERIAL on BOARD_SPECIFIC_OPTIONS.
>
> Signed-off-by: Anup Patel
> ---
> board/emulation/qemu-riscv/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
Review
On Tue, Dec 11, 2018 at 11:02 PM Anup Patel wrote:
>
> This patch adds SiFive UART driver. The driver is 100% DM driver
> and it determines input clock using clk framework.
>
> Signed-off-by: Anup Patel
> Reviewed-by: Palmer Dabbelt
> ---
> drivers/serial/Kconfig | 13 +++
> drivers/se
On Wed, Dec 12, 2018 at 12:20 AM Anup Patel wrote:
>
> On Tue, Dec 11, 2018 at 9:45 PM Bin Meng wrote:
> >
> > Hi Anup,
> >
> > On Wed, Dec 12, 2018 at 12:07 AM Anup Patel wrote:
> > >
> > > On Tue, Dec 11, 2018 at 9:03 PM Bin Meng wrote:
> > > >
> > > > Hi Anup,
> > > >
> > > > On Tue, Dec 11,
Hello all,
just found out, that since patch:
commit 1473f6ac882fde8078826ca828aa3494ff98bf08
Author: Prasanthi Chellakumar
Date: Tue Oct 9 11:46:40 2018 -0700
arm: at91: wdt: Convert watchdog driver to dm/dt
Convert the Watchdog driver for AT91SAM9x processors to support
the dri
Hi, I have found the bug causing this issue.
If I understand the algorithm in get_ram_size correctly, it does
approximately this. Suppose A, B, C, D, E, F are different constatnts.
X(i) is a value at address 1< wrote:
> On 11.12.18 15:53, Marek Behún wrote:
> > On Tue, 11 Dec 2018 15:28:11 +0100
travis-ci reports
"tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected operator"
After use bash, no error, so use bash instead of sh.
Signed-off-by: Peng Fan
---
tools/imx8m_image.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/imx8m_image.sh b/tools/imx8m
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: 2018年12月12日 9:48
> To: Peng Fan
> Cc: Stefano Babic ; U-Boot-Denx
> Subject: Re: [U-Boot] [imx/next] tools: imx8m_image: use bash
>
> Hi Peng,
>
> On Tue, Dec 11, 2018 at 11:46 PM Peng Fan wrote:
> >
> > U
Hi Peng,
On Tue, Dec 11, 2018 at 11:46 PM Peng Fan wrote:
>
> Use bash instead of sh
Please explain the reason in the commit log.
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
> -Original Message-
> From: Otavio Salvador [mailto:ota...@ossystems.com.br]
> Sent: 2018年12月12日 2:41
> To: U-Boot Mailing List
> Cc: Stefano Babic ; Fabio Estevam
> ; Marek Vasut ; Richard Hu
> ; John Weber ;
> Fabio Estevam ; Otavio Salvador
> ; Ye Li ; Peng Fan
> ; Bryan O'Donoghue ;
Use bash instead of sh
Signed-off-by: Peng Fan
---
V1: CI report tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected
operator
tools/imx8m_image.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/imx8m_image.sh b/tools/imx8m_image.sh
index 6346fb64d8..0e9df
On Tue, Dec 11, 2018 at 06:04:05PM +0530, Sumit Garg wrote:
> On Mon, 26 Nov 2018 at 16:51, Sumit Garg wrote:
> >
> > Currently on qemu-arm platforms environment is kept in RAM. Instead
> > use pflash device 1 to provide persistent environment support across
> > device reset.
> >
> > Also (optiona
Christoph,
> On 12.12.2018, at 01:57, Christoph Muellner
> wrote:
>
> This patch series allows to tune VDD_LOG on RK3399-Q7 Puma boards
> to a voltage level defined in the DTS using a PWM adjustable regulator.
>
> To do so a reimplemenation of the RK3399 pinctrl driver has been done.
> Althoug
pinctrl_decode_pin_config_dm() is basically a feature-equivalent
implementation of pinctrl_decode_pin_config(), which operates
on struct udevice devices and uses the dev_read_*() API.
Signed-off-by: Christoph Muellner
---
Changes in v2: None
drivers/pinctrl/pinctrl-uclass.c | 15 ++
> On 12.12.2018, at 01:57, Christoph Muellner
> wrote:
>
> This patch eliminates the non-standard entries "rockchip,pwm_id"
> and "rockchip,pwm_voltage". They are neither documented nor
> read out by any driver.
>
> Additionally it introduces the entry regulator-init-microvolt
> and sets it t
This patch allows to enable the PWM regulator driver
independent for U-Boot and SPL.
Signed-off-by: Christoph Muellner
---
Changes in v2: None
drivers/power/regulator/Kconfig | 7 +++
drivers/power/regulator/Makefile | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/dr
This patch sets VDD_LOG to 950 mV on RK3399-Q7.
This is required to address stability issues on Puma
in heavy-load use-cases.
Reported-by: Assaf Agmon
Signed-off-by: Philipp Tomsich
Signed-off-by: Christoph Muellner
---
Changes in v2:
- Changed patches according to review feedback.
- Fix pi
This patch enables the PWM regulator driver in the defconfig
for the RK3399-Q7.
Signed-off-by: Christoph Muellner
---
Changes in v2: None
configs/puma-rk3399_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index a45a34
The current pinctrl driver for the RK3399 has a range of qulity issues.
E.g. it only implements the .set_state_simple() callback, it
does not parse the available pinctrl information from the DTS
(instead uses hardcoded values), is not flexible enough to cover
devices without 'interrupt' field in th
This patch series allows to tune VDD_LOG on RK3399-Q7 Puma boards
to a voltage level defined in the DTS using a PWM adjustable regulator.
To do so a reimplemenation of the RK3399 pinctrl driver has been done.
Although the new pinctrl driver is written in a way, that we could
merge it with other ro
This patch eliminates the non-standard entries "rockchip,pwm_id"
and "rockchip,pwm_voltage". They are neither documented nor
read out by any driver.
Additionally it introduces the entry regulator-init-microvolt
and sets it to 900 mV, which is the default target value
for VDD_LOG.
Signed-off-by: C
> On 12.12.2018, at 01:32, Christoph Muellner
> wrote:
>
> vcc5v0_host and usbhub_enable share gpio4 RK_PA3,
> which is a problem during probing (the second probe
> will trigger a -EBUSY, when trying to get the gpio handle).
>
> An analysis of the situation shows, that both regulators
> are a
vcc5v0_host and usbhub_enable share gpio4 RK_PA3,
which is a problem during probing (the second probe
will trigger a -EBUSY, when trying to get the gpio handle).
An analysis of the situation shows, that both regulators
are actually describing the same supply.
This patch removes the (currenlty not
Hi Bin,
On Tue, 2018-12-11 at 01:34 -0800, Bin Meng wrote:
> This updates supports_extension() implementation to use the desc
> string from the cpu driver whenever possible, which avoids the
> reading of misa CSR for S-mode U-Boot.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v3:
> - new
On Tue, 2018-12-11 at 01:35 -0800, Bin Meng wrote:
> This is not used by any board. Remove it.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v3:
> - new patch to remove ae350.dts
>
> Changes in v2: None
>
> arch/riscv/dts/ae350.dts | 229 ---
> ---
On Tue, 2018-12-11 at 01:35 -0800, Bin Meng wrote:
> Avoid reading mhartid CSR directly, instead use the one we saved
> in the global data structure before.
>
> With this patch, BBL no longer needs to be hacked to provide the
> mhartid CSR emulation for S-mode U-Boot.
>
> Signed-off-by: Bin Meng
On Tue, 2018-12-11 at 01:34 -0800, Bin Meng wrote:
> At present the hart id passed via a0 in the U-Boot entry is saved
> to s0 at the beginning but does not preserve later. Save it to the
> global data structure so that it can be used later.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v3
On Tue, 2018-12-11 at 01:34 -0800, Bin Meng wrote:
> In arch_cpu_init_dm() do some basic architecture level cpu
> initialization, like FPU enable, etc.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v3:
> - only initialize mcounteren CSR for S-mode
> - only touch satp in M-mode U-Boot
> - m
On Tue, 2018-12-11 at 01:34 -0800, Bin Meng wrote:
> With DM CPU driver, the non-DM version of print_cpuinfo() is no
> longer needed.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v3:
> - new patch to remove non-DM version of print_cpuinfo()
>
> Changes in v2: None
>
> arch/riscv/cpu/cp
On Tue, 2018-12-11 at 01:34 -0800, Bin Meng wrote:
> This adds U-Boot syscon driver for SiFive's Core Local Interruptor
> (CLINT). The CLINT block holds memory-mapped control and status
> registers associated with software and timer interrupts.
>
> This driver implements the riscv_get_time() API a
Hi Boris,
On Mon, Dec 10, 2018 at 04:38:50PM +0100, Boris Brezillon wrote:
> The only implementer of this function has been patched to use
> CONFIG_MTD{IDS,PARTS}_DEFAULT instead. Let's get rid of this function
> and the associated CONFIG_SYS_MTDPARTS_RUNTIME option.
the only implementer of this
On Tue, 11 Dec 2018 16:46:01 +0100
Jean-Jacques Hiblot wrote:
> On 11/12/2018 16:25, Jean-Jacques Hiblot wrote:
> > Hi Tom,
> >
> > Is there such a policy described somewhere ?
> >
> > There are quite a pieces of code that are not used/compiled because
> > no config enables it.
> >
> > A random p
Am 11.12.2018 um 21:10 schrieb Tom Rini:
On Tue, Dec 11, 2018 at 04:19:44PM +0100, Simon Goldschmidt wrote:
Hi Tom,
[truncated the CC list a bit since I got "too many recipients" errors last
time]
Am 11.12.2018 um 14:31 schrieb Tom Rini:
On Sun, Dec 09, 2018 at 09:45:13PM +0100, Simon Goldsch
Hi Neil,
On Tue, 11 Dec 2018 at 01:27, Neil Armstrong wrote:
>
> On 10/12/2018 01:11, Simon Glass wrote:
> > At present one of the regmap tests takes 5 seconds to run since it waits
> > for a timeout. This should be handled using sandbox_timer_add_offset()
> > which advances time for test purpose
On Tue, 11 Dec 2018 at 04:24, Boris Brezillon
wrote:
>
> Hi Simon,
>
> On Mon, 10 Dec 2018 18:04:20 -0700
> Simon Glass wrote:
>
> > Hi Boris,
> >
> > On Mon, 3 Dec 2018 at 14:54, Boris Brezillon
> > wrote:
> > >
> > > When auto-completing command arguments, the last argument is not
> > > necess
On Tue, Dec 11, 2018 at 04:19:44PM +0100, Simon Goldschmidt wrote:
> Hi Tom,
>
> [truncated the CC list a bit since I got "too many recipients" errors last
> time]
>
> Am 11.12.2018 um 14:31 schrieb Tom Rini:
> >On Sun, Dec 09, 2018 at 09:45:13PM +0100, Simon Goldschmidt wrote:
> >
> >>This serie
On 11/15/18 5:58 AM, AKASHI Takahiro wrote:
> Currently, efi_init_obj_list() scan disk devices only once, and never
> change a list of efi disk devices. This will possibly result in failing
> to find a removable storage which may be added later on. See [1].
>
> In this patch, called is efi_disk_up
Hello Ryder,
commit 3b975a147c3c ("tools: MediaTek: add MTK boot header generation to
mkimage") leads to build warnings:
In function ‘mtk_image_set_gen_header’,
inlined from ‘mtk_image_set_header’ at tools/mtk_image.c:733:3:
tools/mtk_image.c:659:2: warning: ‘strncpy’ specified bound 12 equal
On Tue, 11 Dec 2018, Tom Rini wrote:
... snip ...
> > This is not a small list and a lot of them we probably want to keep.
> >
> > ['CONFIG_MX8M', 'CONFIG_POWER_PMIC_MAX77693', 'CONFIG_TPM2_TIS_SANDBOX',
> > 'CONFIG_TPM_ST33ZP24_SPI', 'CONFIG_USB_SL811HS', 'CONFIG_RAM_SUPPORT',
> > 'CONFIG_BCM283
Hi Stephen,
On Mon, 10 Dec 2018 at 11:23, Stephen Warren wrote:
>
> The following commit:
>
> > dm: i2c: Make i2c_get_chip_for_busnum() fail if the chip is not detected
> >
> > i2c_get_chip_for_busnum() really should check the presence of the chip
> > on
> > the bus. Most of the users of
On 11/28/18 7:00 AM, AKASHI Takahiro wrote:
> See UEFI specification v2.7a, section 3.3 for details attributes.
This patch is not applicable to U-Boot master not to efi-next. There is
no preceding patch in
https://patchwork.ozlabs.org/project/uboot/list/?submitter=61166
I have no clue what this p
On 11/28/18 7:00 AM, AKASHI Takahiro wrote:
> See UEFI specification v2.7a, section 3.3 for details attributes.
I cannot find file cmd/efishell.c in U-Boot. And I cannot find it in
https://patchwork.ozlabs.org/project/uboot/list/?submitter=61166
So I have no clue what this patch is based on.
Bes
Commit f32a8007ef0f ("dm: i2c: Make i2c_get_chip_for_busnum() fail if the
chip is not detected") introduced a regression for the NVIDIA Jetson TX2.
For some reason the xfer callback of the tegra i2c driver doesn't support
probing the I2C devices with a 0-length message.
Fixing the regression by pr
On 11/28/18 7:00 AM, AKASHI Takahiro wrote:
> With -nv specified, a variable to be created will have NON_VOLATILE
> attribute.
>
> Signed-off-by: AKASHI Takahiro
Why would we only make the NON_VOLATILE attribute available and not all
the other attributes like EFI_VARIABLE_BOOTSERVICE_ACCESS?
Wh
On 11/12/2018 19:22, Stephen Warren wrote:
On 12/11/18 11:12 AM, Stephen Warren wrote:
On 12/11/18 10:41 AM, Jean-Jacques Hiblot wrote:
On 11/12/2018 18:10, Stephen Warren wrote:
On 12/11/18 2:44 AM, Jean-Jacques Hiblot wrote:
On 11/12/2018 05:41, Heiko Schocher wrote:
Hello Stephen,
Am
From: Fabio Estevam
Add the TechNexion's logo from their internal U-Boot tree.
Signed-off-by: Fabio Estevam
Signed-off-by: Otavio Salvador
---
tools/logos/technexion.bmp | Bin 0 -> 22390 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
create mode 100644 tools/logos/technexion.bmp
di
From: Fabio Estevam
Add support for the VXT VL050-8048NT-C01 panel connected through
the 24 bit parallel LCDIF interface.
Signed-off-by: Fabio Estevam
Signed-off-by: Otavio Salvador
---
board/technexion/pico-imx7d/pico-imx7d.c | 55
configs/pico-hobbit-imx7d_defconfi
From: Fabio Estevam
Like it was done on imx6 in commit 9236269de57d ("imx: mx6: Fix
implementantion reset_misc")
Do not call lcdif_power_down() in the SPL case to fix the following
build error:
LD spl/u-boot-spl
MKIMAGE u-boot.img
arch/arm/mach-imx/built-in.o: In function `reset_misc':
On 11/28/18 7:00 AM, AKASHI Takahiro wrote:
> An EFI variable is nothing but a wrapper of a corresponding u-boot
> environment variable (See efi_variable.c), but under the current
> implementation, NON_VOLATILE attribute is not honored while u-boot
> environment variables can be saved/restored in s
On 12/11/18 11:12 AM, Stephen Warren wrote:
On 12/11/18 10:41 AM, Jean-Jacques Hiblot wrote:
On 11/12/2018 18:10, Stephen Warren wrote:
On 12/11/18 2:44 AM, Jean-Jacques Hiblot wrote:
On 11/12/2018 05:41, Heiko Schocher wrote:
Hello Stephen,
Am 10.12.2018 um 19:23 schrieb Stephen Warren:
On Tue, Dec 11, 2018 at 06:01:23PM +0100, Jean-Jacques Hiblot wrote:
>
> On 11/12/2018 17:35, Tom Rini wrote:
> >On Tue, Dec 11, 2018 at 04:46:01PM +0100, Jean-Jacques Hiblot wrote:
> >>On 11/12/2018 16:25, Jean-Jacques Hiblot wrote:
> >>>Hi Tom,
> >>>
> >>>Is there such a policy described somewhe
On 12/11/18 10:41 AM, Jean-Jacques Hiblot wrote:
On 11/12/2018 18:10, Stephen Warren wrote:
On 12/11/18 2:44 AM, Jean-Jacques Hiblot wrote:
On 11/12/2018 05:41, Heiko Schocher wrote:
Hello Stephen,
Am 10.12.2018 um 19:23 schrieb Stephen Warren:
The following commit:
dm: i2c: Make i2c_get_
On 11/12/2018 18:10, Stephen Warren wrote:
On 12/11/18 2:44 AM, Jean-Jacques Hiblot wrote:
On 11/12/2018 05:41, Heiko Schocher wrote:
Hello Stephen,
Am 10.12.2018 um 19:23 schrieb Stephen Warren:
The following commit:
dm: i2c: Make i2c_get_chip_for_busnum() fail if the chip is not
detecte
Use defconfig instead of header file for CONFIG_BOOTCOMMAND.
Signed-off-by: Andy Shevchenko
---
include/configs/edison.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/edison.h b/include/configs/edison.h
index 8e312da2da..7e2f9c129e 100644
--- a/include/configs/edison.h
++
Since some options had been moved to defconfig from header,
the leftover comments are not needed anymore. Remove them.
Signed-off-by: Andy Shevchenko
---
include/configs/edison.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/configs/edison.h b/include/configs/edison.h
index 7e2f
Use defconfig instead of header file for CONFIG_CMD_PCI.
Signed-off-by: Andy Shevchenko
---
configs/edison_defconfig | 1 -
include/configs/edison.h | 3 ---
2 files changed, 4 deletions(-)
diff --git a/configs/edison_defconfig b/configs/edison_defconfig
index b523fe92ce..e376c0cea6 100644
---
On 12/11/18 2:44 AM, Jean-Jacques Hiblot wrote:
On 11/12/2018 05:41, Heiko Schocher wrote:
Hello Stephen,
Am 10.12.2018 um 19:23 schrieb Stephen Warren:
The following commit:
dm: i2c: Make i2c_get_chip_for_busnum() fail if the chip is not
detected
i2c_get_chip_for_busnum() really should
On 12/10/18 9:41 PM, Heiko Schocher wrote:
Hello Stephen,
Am 10.12.2018 um 19:23 schrieb Stephen Warren:
The following commit:
dm: i2c: Make i2c_get_chip_for_busnum() fail if the chip is not detected
i2c_get_chip_for_busnum() really should check the presence of the
chip on
the bus. M
On 11/12/2018 17:35, Tom Rini wrote:
On Tue, Dec 11, 2018 at 04:46:01PM +0100, Jean-Jacques Hiblot wrote:
On 11/12/2018 16:25, Jean-Jacques Hiblot wrote:
Hi Tom,
Is there such a policy described somewhere ?
There are quite a pieces of code that are not used/compiled because no
config enables
I am trying to find out where the IOB windows are setup. I see that
the values do not matched the documented defaults, but I also do not
see access from u-boot to these registers. I am especially interested
where the values for CP-0/PEX0 are coming from (and how to to properly
modify them).
Cheers
On Tue, Dec 11, 2018 at 04:46:01PM +0100, Jean-Jacques Hiblot wrote:
>
> On 11/12/2018 16:25, Jean-Jacques Hiblot wrote:
> >Hi Tom,
> >
> >Is there such a policy described somewhere ?
> >
> >There are quite a pieces of code that are not used/compiled because no
> >config enables it.
> >
> >A rando
On 12/11/2018 10:20 AM, Sam Protsenko wrote:
Android code base is growing, so since Android "Pie" the size of
system.img grew up to be about 740 MiB. Let's increase system.img to
1 GiB to accommodate for those changes and leave some margin for future
changes. We don't want to make it more than 1
When arguments are not supplied the error message is misleading and
doesn't tell what exactly has to be done.
Fix this by adding usage() and call it if above circumstance occurs.
Signed-off-by: Andy Shevchenko
---
scripts/check-config.sh | 9 +
1 file changed, 9 insertions(+)
diff --gi
Hi!
Since X86 implies SCSI and Intel Edison board does not use it, I have got a
= WARNING ==
This board does not use CONFIG_DM_SCSI. Please update
the storage controller to use CONFIG_DM_SCSI before the v2019.07 release.
Failure to update by the deadline may
On Tue, Dec 11, 2018 at 9:45 PM Bin Meng wrote:
>
> Hi Anup,
>
> On Wed, Dec 12, 2018 at 12:07 AM Anup Patel wrote:
> >
> > On Tue, Dec 11, 2018 at 9:03 PM Bin Meng wrote:
> > >
> > > Hi Anup,
> > >
> > > On Tue, Dec 11, 2018 at 11:02 PM Anup Patel wrote:
> > > >
> > > > This patchset adds SiFi
Android code base is growing, so since Android "Pie" the size of
system.img grew up to be about 740 MiB. Let's increase system.img to
1 GiB to accommodate for those changes and leave some margin for future
changes. We don't want to make it more than 1 GiB, because we should
keep userdata partition
Hi Anup,
On Wed, Dec 12, 2018 at 12:07 AM Anup Patel wrote:
>
> On Tue, Dec 11, 2018 at 9:03 PM Bin Meng wrote:
> >
> > Hi Anup,
> >
> > On Tue, Dec 11, 2018 at 11:02 PM Anup Patel wrote:
> > >
> > > This patchset adds SiFive UART driver for SiFive UART
> > > found on SiFive boards.
> > >
> > >
Hi Alex,
Tested successfully on Khadas VIM board, fix my panic with efivars.
Tested-by: Loic Devulder
On 12/11/18 10:00 AM, Alexander Graf wrote:
> While changing the RTS alignment to 64KB in commit 7a82c3051c8f
> ("efi_loader: Align runtime section to 64kb") the relocation code
> started to br
On Tue, Dec 11, 2018 at 9:03 PM Bin Meng wrote:
>
> Hi Anup,
>
> On Tue, Dec 11, 2018 at 11:02 PM Anup Patel wrote:
> >
> > This patchset adds SiFive UART driver for SiFive UART
> > found on SiFive boards.
> >
> > The driver is tested on QEMU sifive_u machine. In fact,
> > with this patchset same
On 11/12/2018 16:25, Jean-Jacques Hiblot wrote:
Hi Tom,
Is there such a policy described somewhere ?
There are quite a pieces of code that are not used/compiled because no
config enables it.
A random pick among many others:
- CONFIG_FPGA_LATTICE
- CONFIG_MESON_SPIFC
- CONFIG_POWER_BATTER
Hi Anup,
On Tue, Dec 11, 2018 at 11:02 PM Anup Patel wrote:
>
> This patchset adds SiFive UART driver for SiFive UART
> found on SiFive boards.
>
> The driver is tested on QEMU sifive_u machine. In fact,
> with this patchset same U-Boot binary boots on QEMU virt
> machine and QEMU sifive_u machin
1 - 100 of 154 matches
Mail list logo