Hi Tom,
On 12/07/2018 10:13 PM, Tom Rini wrote:
> On Fri, Dec 07, 2018 at 02:24:22PM +0100, Philipp Tomsich wrote:
>> Kever,
>>
>>> On 07.12.2018, at 02:39, Kever Yang wrote:
>>>
>>> Hi Philipp,
>>>
>>> On 12/06/2018 09:50 PM, Philipp Tomsich wrote:
+Tom
> On 05.12.2018, at 03:25,
On Thu, Dec 06, 2018 at 08:02:19AM +, eugen.hris...@microchip.com wrote:
>
>
> On 05.12.2018 22:38, Robert Nelson wrote:
> > On Wed, Dec 5, 2018 at 8:37 AM wrote:
> >>
> >>
> >>
> >> On 05.12.2018 02:15, Daniel Evans wrote:
> >>> Trying to get uboot SPL boot.bin to run on an SD card for the
The contents of the test subdirectories only make sense when we have
CONFIG_UNIT_TEST set. We will otherwise attempt to build code on for
example sandbox that needs CONFIG_UNIT_TEST otherwise and rather than
complicate the Makefiles simply leave them out when we can.
Signed-off-by: Tom Rini
---
From: Otavio Salvador
The motivation for this is to allow distributions to distribute all
possible tools in a generic way, avoiding the need of specific tools
building for each machine.
Especially on OpenEmbedded / Yocto Project ecosystem, it is very
common each BSP to end providing their specif
The "dm" command under CONFIG_CMD_DM should live under cmd/ rather than
test/dm/ so move it.
Signed-off-by: Tom Rini
---
cmd/Makefile | 1 +
cmd/dm.c | 88
test/dm/Makefile | 1 -
test/dm/cmd_dm.c | 88 ---
With the defconfig options enabling DM_USB, the legacy code
can be removed.
Signed-off-by: Adam Ford
diff --git a/board/logicpd/omap3som/omap3logic.c
b/board/logicpd/omap3som/omap3logic.c
index 691d38fdf2..144e6f68a4 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/
The following NXP application notes and manual recommend to ensure the
IVT DCD pointer is Null prior to calling HAB API authenticate_image()
function:
- AN12263: HABv4 RVT Guidelines and Recommendations
- AN4581: Secure Boot on i.MX50, i.MX53, i.MX 6 and i.MX7 Series using
HABv4
- CST docs: High
Hello Stefano,
On Fri, 2018-12-07 at 19:55 +0100, Stefano Babic wrote:
> Hi Harald,
>
> On 07/12/18 13:18, Marek Vasut wrote:
> > On 12/07/2018 01:15 PM, Harald Seiler wrote:
> > > Hello Marek,
> >
> > Hi,
> >
> > > On Fri, 2018-12-07 at 12:48 +0100, Marek Vasut wrote:
> > > > On 12/07/2018 10:
Hi Tom,
Please pull this PR.
thanks,
Jagan.
The following changes since commit 57dbc151437b36cc1105857d222df28b095236d7:
rockchip: rk3399: Add MAINTAINERS entry (2018-12-06 10:24:12 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-sunxi.git master
for you to fetch
On Mon, Dec 03, 2018 at 08:06:28AM -0600, Adam Ford wrote:
> The DTS file for the AM3517 had the incorrect CD polarity. Resync with
> the fixed DTS file from Linux.
>
> Signed-off-by: Adam Ford
>
> diff --git a/arch/arm/dts/am3517-evm-ui.dtsi b/arch/arm/dts/am3517-evm-ui.dtsi
> new file mode 1
The existing config is setup as a gadget but it doesn't use
DM_USB. This patch converts all boards to DM_USB, but as host.
As host, it is able to mount USB drives and browse them.
Signed-off-by: Adam Ford
diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig
index 80219e
On Mon, Dec 03, 2018 at 05:09:13PM +0300, Alexey Brodkin wrote:
> Build tested in Travis, see:
> https://travis-ci.org/abrodkin/u-boot/jobs/462808237
>
> Signed-off-by: Alexey Brodkin
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Dec 03, 2018 at 08:15:59AM -0600, Adam Ford wrote:
> There have been a few fixes to the device trees, so this
> re-syncs the dts/dtsi files with Linux
>
> Signed-off-by: Adam Ford
>
> diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
> b/arch/arm/dts/logicpd-som-lv-35xx-devkit.d
On Mon, Dec 03, 2018 at 11:23:41AM +0100, Frank Wunderlich wrote:
> Hi,
>
> setting active menuitem currently can be outside of menu which results in
> invisible selection
>
> attached Patch fixes this
>
> regards Frank
>
> >From 1d9c4cb8b3e2dd9b0a7a6a2d4a21684d0a099dbf Mon Sep 17 00:00:00 20
On Mon, Dec 03, 2018 at 10:52:52AM +0100, Patrice Chotard wrote:
> To allow access to this define by other driver, move
> it into gpio.h
>
> Signed-off-by: Patrice Chotard
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Dec 05, 2018 at 02:53:42PM +0100, Felix Brack wrote:
> This patch synchronizes the am33xx SoC specific files with those from
> Linux 4.20.0. Hence all board maintainers of am33xx based boards are
> on the cc list.
> The main purpose of this patch is to prevent further diverging of the
> dt
On Fri, Nov 30, 2018 at 10:23:36AM +0100, Felix Brack wrote:
> This patch enables CONFIG_BLK as well as CONFIG_DM_MMC for the PDU001
> board. It depends on Patrice Chotard's patch 'power: regulator: denied
> disable on always-on regulator' which prevents power cycling the vmmc
> supply. Without th
On Wed, Dec 05, 2018 at 11:29:54AM +0100, Heiko Schocher wrote:
> commit d6330064634a ("spl: Add a define for SPL_TPL_PROMPT")
>
> changes the SPL/TPL banner from upper case into lower
> case. As SPL and TPL are three-letter acronyms and they
> are written in upper case, change it back to upper c
On Mon, Dec 03, 2018 at 03:12:25PM +0100, Felix Brack wrote:
> This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
> early debugging UART. The code is basically copied from the ns16550
> driver.
>
> Signed-off-by: Felix Brack
Applied to u-boot/master, thanks!
--
Tom
signa
On Mon, Dec 03, 2018 at 10:52:54AM +0100, Patrice Chotard wrote:
> Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must
> be updated.
>
> stm32_pinctrl_get_gpio_dev() returns from a given pin selectors
> the corresponding bank gpio device and the gpio_offset inside this
> gpio bank.
>
On Mon, Dec 03, 2018 at 10:52:51AM +0100, Patrice Chotard wrote:
> In some STM32 SoC packages, GPIO bank has not always 16 gpios.
> Several cases can occur, gpio hole can be located at the beginning,
> middle or end of the gpio bank or a combination of these 3
> configurations.
>
> For that, gpio
On Sat, Dec 01, 2018 at 06:42:09PM +0100, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas
Applied to u-boot/master, thanks!
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On Mon, Dec 03, 2018 at 08:29:44AM -0600, Adam Ford wrote:
> There has been some natural evolution of the device tree, so
> resync with 4.20
>
> Signed-off-by: Adam Ford
>
> diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts
> index 0e82bb988f..a3c9b34672 100644
Applied to u-
On Mon, Dec 03, 2018 at 08:17:29AM -0600, Adam Ford wrote:
> Migrate some small device tree fixes from Linux 4.20.
>
> Signed-off-by: Adam Ford
>
> diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
> b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
> index 9d5d53fbe9..c39cf2ca54 100644
On Tue, Nov 27, 2018 at 01:49:53PM +0100, Benjamin Gaignard wrote:
> Protect configuration registers with a hardware spinlock.
>
> If a hwspinlock is defined in the device-tree node used it
> to be sure that none of the others processors on the SoC could
> change the configuration at the same tim
On Tue, Nov 27, 2018 at 01:49:51PM +0100, Benjamin Gaignard wrote:
> From: Benjamin Gaignard
>
> Add hardware spinlock in the list of the clocks.
>
> Signed-off-by: Benjamin Gaignard
> Reviewed-by: Simon Glass
> Reviewed-by: Patrice Chotard
Applied to u-boot/master, thanks!
--
Tom
signa
On Mon, Dec 03, 2018 at 08:29:42AM -0600, Adam Ford wrote:
> Re-sync with 4.20 due some some natural evolution.
>
> Signed-off-by: Adam Ford
>
> diff --git a/arch/arm/dts/da850.dtsi b/arch/arm/dts/da850.dtsi
> index c66cf78953..47aa53ba6b 100644
Applied to u-boot/master, thanks!
--
Tom
sig
On Wed, Nov 28, 2018 at 10:56:06AM -0600, Andrew F. Davis wrote:
> UART booting requires YMODEM support. Add this here.
>
> Signed-off-by: Andrew F. Davis
> Reviewed-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 28, 2018 at 09:33:43AM +, eugen.hris...@microchip.com wrote:
> Add test for the SPL binary size and the bss section size.
> This will throw an error at build time if the SPL sections
> do not fit in the designated RAM area, thus avoiding oversizing the SPL.
>
> Based on original w
On Mon, Dec 03, 2018 at 08:29:43AM -0600, Adam Ford wrote:
> Re-synce the device tree files from Linux 4.20
>
> Signed-off-by: Adam Ford
>
> diff --git a/arch/arm/dts/da850-lcdk.dts b/arch/arm/dts/da850-lcdk.dts
> index a1f4d6d5a5..0177e3ed20 100644
Applied to u-boot/master, thanks!
--
Tom
On Mon, Dec 03, 2018 at 10:52:53AM +0100, Patrice Chotard wrote:
> As all STM32 SoCs supports CONFIG_CLK flag,
> it becomes useless in this driver, remove it.
>
> Signed-off-by: Patrice Chotard
Applied to u-boot/master, thanks!
--
Tom
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On Sat, Dec 01, 2018 at 06:42:08PM +0100, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas
Applied to u-boot/master, thanks!
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On Wed, Nov 28, 2018 at 07:17:51PM +0100, Álvaro Fernández Rojas wrote:
> From: Grygorii Strashko
>
> Add a sandbox DMA driver implementation (provider) and corresponding DM
> test.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Grygorii Strashko
> Reviewed-by: Simon Glass
> Acked-by: Álvaro Fer
On Mon, Dec 03, 2018 at 10:52:50AM +0100, Patrice Chotard wrote:
> Move gpio_dev list filling outside probe() to speed-up U-boot
> boot sequence execution. This list is populated only when needed.
>
> Signed-off-by: Patrice Chotard
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 28, 2018 at 07:17:50PM +0100, Álvaro Fernández Rojas wrote:
> This adds channels support for dma controllers that have multiple channels
> which can transfer data to/from different devices (enet, usb...).
>
> DMA channle API:
> dma_get_by_index()
> dma_get_by_name()
> dma_request()
On Thu, Nov 29, 2018 at 01:45:06PM +0100, Felix Brack wrote:
> When a micro SD card is inserted in the PDU001 card cage, the card
> detection switch is opened and the corresponding GPIO input is driven
> by a pull-up. Hence change the active level of the card detection
> input from low to high.
>
On Sat, Dec 01, 2018 at 06:42:07PM +0100, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas
Applied to u-boot/master, thanks!
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On Tue, Nov 27, 2018 at 01:49:50PM +0100, Benjamin Gaignard wrote:
> This is uclass for Hardware Spinlocks.
> It implements two mandatory operations: lock and unlock
> and one optional relax operation.
>
> Signed-off-by: Benjamin Gaignard
> Reviewed-by: Simon Glass
> Reviewed-by: Patrice Chotar
On Tue, Nov 27, 2018 at 01:49:52PM +0100, Benjamin Gaignard wrote:
> Implement hardware spinlock support for STM32MP1.
>
> Signed-off-by: Benjamin Gaignard
> Reviewed-by: Simon Glass
> Reviewed-by: Patrice Chotard
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Nov 28, 2018 at 07:17:49PM +0100, Álvaro Fernández Rojas wrote:
> Move dma_ops to a separate header file, following other uclass
> implementations. While doing so, this patch also improves dma_ops
> documentation.
>
> Reviewed-by: Tom Rini
> Reviewed-by: Simon Glass
> Signed-off-by: Álv
On Mon, Nov 26, 2018 at 08:20:19PM +0100, Philipp Tomsich wrote:
> In commit e5e06b65ad65 ("clk: Allow clock defaults to be set also
> during re-reloc state") the earlier guard against setting clock
> defaults in pre-reloc state was removed. While it is easy to filter
> 'assigned-clocks' properti
On Tue, Nov 27, 2018 at 05:52:41PM +0530, Keerthy wrote:
> Currently k2 spi boot is broken as the image header
> is getting copied to an invalid memory location
>
> CONFIG_SYS_TEXT_BASE - sizeof (struct image_size)
> which maps to 0xc00 - 0x40 = 0xbc0 being a reserved
> location.
>
> We
On Mon, Nov 26, 2018 at 03:58:13PM +0100, Patrick Wildt wrote:
> The long name apparently can be accumulated using multiple
> 13-byte slots. Unfortunately we never checked how many we
> can actually fit in the buffer we are reading to.
>
> Signed-off-by: Patrick Wildt
Applied to u-boot/master,
On Mon, Nov 26, 2018 at 03:56:57PM +0100, Patrick Wildt wrote:
> The cluster size specifies how many sectors make up a cluster. A
> cluster size of zero makes no sense, as it would mean that the
> cluster is made up of no sectors. This will later lead into a
> division by zero in sect_to_clust()
On Mon, Nov 26, 2018 at 01:42:32PM +0100, Patrice Chotard wrote:
> Since commit 8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops")
> stm32f746-disco can't boot.
>
> This is due to new memory allocation into STM32 pinctrl driver,
> increase SYS_MALLOC_F_LEN from 0xC00 to 0xE00.
>
> Signed-
On Sun, Nov 25, 2018 at 08:05:54PM -0700, Simon Glass wrote:
> Now that many things are converted to Kconfig we can drop most of the
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
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On Fri, Nov 23, 2018 at 10:53:06AM +0100, Martin Fuzzey wrote:
> Sometimes enumeration fails (about 1 in 50 times on my custom board).
>
> The underlying reason is probably electrical but Linux does not have
> the problem.
>
> Comparing the Linux / u-boot implementations shows that Linux
> retri
Dear Fabio,
In message
you wrote:
>
> I replaced it on the main Makefile and also in the imx one and it
> works as expected now.
Thanks.
> When you send the v2, you can add:
>
> Tested-by: Fabio Estevam
Done. Thanks for your patience.
Best regards,
Wolfgang Denk
--
DENX Software Enginee
So far, the use of CONFIG_BOARD_SIZE_LIMIT would only work with
plain numeric constants. Extend it to allow for expressions, so one
can for example use
#define CONFIG_BOARD_SIZE_LIMIT (768 << 10)
in the board configuration.
Signed-off-by: Wolfgang Denk
Tested-by: Fabio Estevam
Cc: Fa
Hi Harald,
On 07/12/18 13:18, Marek Vasut wrote:
> On 12/07/2018 01:15 PM, Harald Seiler wrote:
>> Hello Marek,
>
> Hi,
>
>> On Fri, 2018-12-07 at 12:48 +0100, Marek Vasut wrote:
>>> On 12/07/2018 10:19 AM, Harald Seiler wrote:
Currently, U-Boot ignores the BBT stored in the last 4 blocks o
On Fri, Dec 7, 2018 at 6:58 AM Vignesh R wrote:
>
> On 07/12/18 12:47 AM, Simon Goldschmidt wrote:
> > Am 06.12.2018 um 18:39 schrieb Vignesh R:
> >> On 06/12/18 10:06 PM, Simon Goldschmidt wrote:
> >>> Am 06.12.2018 um 14:54 schrieb Simon Goldschmidt:
> On Thu, Dec 6, 2018 at 2:45 PM Vignesh
On 12/6/18 8:20 AM, Joakim Tjernlund wrote:
> -msingle-pic-base is a new gcc(from 4.6) option for ppc and
> it reduces the size of my u-boot with about 4-5 KB.
> While at it, add -fno-jump-tables too to save a
> few more bytes.
>
> e5500 core:
> size u-boot.bef
>text data bss d
On Thu, Dec 6, 2018 at 2:11 PM Maxime Ripard wrote:
>
> On Thu, Dec 06, 2018 at 01:25:57AM +, Andre Przywara wrote:
> > Now that the Allwinner port in the official mainline ARM Trusted
> > Firmware repository has reached feature parity with the "legacy" ATF
> > port, let's use the opportunity
On Wed, Nov 21, 2018 at 11:35 PM Priit Laes wrote:
>
> This is a resend/v2 of a "Stop AXP from crashing when enabling LDO3" series,
> posted by Olliver Schinagl in March 2017. Unfortunately it never got past
> initial discussion [1], but most Olimex Lime2 boards are still running
> into this bug.
Hi Wolfgang,
On Fri, Dec 7, 2018 at 1:21 PM Wolfgang Denk wrote:
> This should also work - replace the line
>
> @(echo $$(($(CONFIG_BOARD_SIZE_LIMIT))); wc -c $@ ) | \
>
> by
>
> @(awk "END { print $$(echo $(CONFIG_BOARD_SIZE_LIMIT)) }" /dev/null;
> wc -c $@ ) | \
>
>
> Can you
Dear Fabio,
In message
you wrote:
>
> > /bin/sh: 1: arithmetic expression: expecting primary: ""(1 * 1024)""
D*mn. I really thought I had tried this in a dash based
environment, too. Sorry for causing such confusion.
> SHELL = /bin/bash"
Yes, if this is really a bash only feature that would
From: Takeshi Kihara
This patch fixes the problem that u-boot will not start unless icache is
enabled early.
Signed-off-by: Takeshi Kihara
Signed-off-by: Hiroyuki Yokoyama
Signed-off-by: Marek Vasut
---
arch/arm/mach-rmobile/cpu_info.c| 4 ++--
arch/arm/mach-rmobile/memmap-gen3.c | 4 +++
From: Takeshi Kihara
This patch fixes the problem that "main memory domain AXI secure access
protection error" occurs. Exclude the area (0x43f0 to 0x47DF)
set by DBSC from the map area.
Signed-off-by: Takeshi Kihara
Signed-off-by: Hiroyuki Yokoyama
Signed-off-by: Marek Vasut
---
arch
From: Hiroyuki Yokoyama
This patch fixes the problem that "main memory domain AXI secure
access protection error" occurs when booting Cortex-A53. Exclude
the area (0x43f0 to 0x47DF) set by DBSC from the map area.
Signed-off-by: Hiroyuki Yokoyama
Signed-off-by: Marek Vasut
---
arch/arm
On Fri, Dec 07, 2018 at 02:50:36PM +0100, Jean-Jacques Hiblot wrote:
> This series remove the usage of the DM_I2C_COMPAT option for all the ti
> platforms. It also takes this opportunity to not disable DM_I2C in the SPL.
>
> There are a couples of issues to fix:
> - CMD_EEPROM does not support th
On 12/07/2018 01:59 PM, Alex Kiernan wrote:
> On Fri, Dec 7, 2018 at 12:30 PM Marek Vasut wrote:
>>
>> On 12/07/2018 01:29 PM, Alex Kiernan wrote:
>>> On Fri, Dec 7, 2018 at 11:54 AM Marek Vasut wrote:
On 12/07/2018 09:56 AM, Alex Kiernan wrote:
[...]
> +++ b/drivers/usb/musb-n
On Fri, Dec 07, 2018 at 02:50:50PM +0100, Jean-Jacques Hiblot wrote:
> am57xx configs uses DM_I2C both in SPL and u-boot.
> Remove code for non-DM I2C support.
>
> Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini
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On Fri, Dec 07, 2018 at 02:50:49PM +0100, Jean-Jacques Hiblot wrote:
> DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
> API when DM_I2C is used. The goal is to eventually remove DM_I2C_COMPAT
> when all I2C "clients" have been migrated to use the DM API.
> This a step in t
On Fri, Dec 07, 2018 at 02:50:47PM +0100, Jean-Jacques Hiblot wrote:
> From: Andreas Dannenberg
>
> The EEPROM reading in the board detection code is done through legacy
> I2C functions which on platforms using DM_I2C this functionality is
> provided via the CONFIG_DM_I2C_COMPAT layer. To allow
On Fri, Dec 07, 2018 at 02:50:46PM +0100, Jean-Jacques Hiblot wrote:
> Those driver are not DM drivers per se (not using the PMIC/regulator
> framework) and are using the legacy I2C API. Make them compatible with
> the DM_I2C API.
>
> This impacts the following drivers:
> - palmas (used by am57xx
On Fri, Dec 07, 2018 at 02:50:43PM +0100, Jean-Jacques Hiblot wrote:
> If DM_I2C is used , the I2C controllers must be registered as U_BOOT_DEVICE
> because OF_CONTROL is not used in the SPL.
>
> Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini
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On Fri, Dec 07, 2018 at 02:50:45PM +0100, Jean-Jacques Hiblot wrote:
> In order to use DM_I2C, we need to move the board detection after the
> early SPL initialization.
>
> Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini
--
Tom
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On Fri, Dec 07, 2018 at 02:50:55PM +0100, Jean-Jacques Hiblot wrote:
> The DRA7 platforms requires that the dtb used in the SPL really matches the
> platform to have the best MMC performances.
> To detect the board type/version an I2C EEPROM is read. This requires that
> DM is initialized before
On Fri, Dec 07, 2018 at 02:50:53PM +0100, Jean-Jacques Hiblot wrote:
> It is currently not possible to include the support to remove devices in
> the SPL. This is however needed by platforms that re-select their dtb after
> DM is initialized; they need to remove all the previously bound devices
>
On Fri, Dec 07, 2018 at 02:50:42PM +0100, Jean-Jacques Hiblot wrote:
> This allows the driver to be used without OF_CONTROL.
> AM335x support DM_SPL but does not use SPL_OF_CONTROL. Enabling DM_I2C in
> SPL thus requires that the omap I2C can be passed platdata.
>
> Signed-off-by: Jean-Jacques Hi
On 06/12/2018 07:42, Maxime Ripard wrote:
Hi,
> On Thu, Dec 06, 2018 at 12:02:20AM +, Andre Przywara wrote:
>> Using memcpy() for MMIO operations is, however tempting, not a good
>> idea: It depends on the specific implementation of memcpy, also
>> lacks barriers. In this particular case the
On Fri, Dec 07, 2018 at 02:50:51PM +0100, Jean-Jacques Hiblot wrote:
> This is required to take advantage of MULTI_DTB_FIT before relocation.
> If it is too low, DM will be initialized only after relocation has
> taken place. That is too late for the DRA7 because I2C DM is used before
> the reloca
On Fri, Dec 07, 2018 at 02:50:40PM +0100, Jean-Jacques Hiblot wrote:
> Those platforms need CONFIG_SPL_DM_SEQ_ALIAS because they enable both
> DM_I2C and SPL_DM. Without CONFIG_SPL_DM_SEQ_ALIAS, it is not possible to
> get the I2C bus with i2c_get_chip_for_busnum().
>
> Signed-off-by: Jean-Jacque
On Fri, Dec 07, 2018 at 02:50:44PM +0100, Jean-Jacques Hiblot wrote:
> Signed-off-by: Jean-Jacques Hiblot
> Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
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On Fri, Dec 07, 2018 at 02:50:37PM +0100, Jean-Jacques Hiblot wrote:
> The implementation of the EEPROM commands does not support the DM I2C API.
> Prevent compilation breakage by not enabling it if the non-DM API is not
> available (if DM_I2C is used without DM_I2C_COMPAT)
>
> Signed-off-by: Jea
On Fri, Dec 07, 2018 at 02:50:41PM +0100, Jean-Jacques Hiblot wrote:
> From: Vignesh R
>
> Move away from SoC specific headers to handle different register layout.
> Instead use driver data to get appropriate register layouts like in the
> kernel. While at it, perform some mostly cosmetic alignm
Currently the M-mode trap handler codes are in start.S. For future
extension, move them to a separate file mtrap.S.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2: None
arch/riscv/cpu/Makefile | 2 +-
arch/riscv/cpu/mtrap.S | 111 +
Implement arch_cpu_init() to do some basic architecture level cpu
initialization, like FPU enable, etc.
Signed-off-by: Bin Meng
---
Changes in v2:
- use csr_set() to set MSTATUS_FS
- only enabling the cycle, time, and instret counters
- change to use satp
arch/riscv/cpu/cpu.c | 19 +++
This adds all exception codes in encoding.h.
Signed-off-by: Bin Meng
---
Changes in v2: None
arch/riscv/include/asm/encoding.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/riscv/include/asm/encoding.h
b/arch/riscv/include/asm/encoding.h
index c910d5c..e6d905a 1006
Add the QEMU RISC-V platform-specific Kconfig options, to include
CPU and timer drivers.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2:
- add CMD_CPU as well
arch/riscv/Kconfig | 1 +
arch/riscv/cpu/qemu/Kconfig| 11 +++
board/emulation/qe
At present the trap handler returns to M-mode only. Change to
returning to previous privilege level instead.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2: None
arch/riscv/cpu/mtrap.S | 8
1 file changed, 8 deletions(-)
diff --git a/arch/riscv/cpu/mtrap.S b/arch/
Increase the heap size for the pre-relocation stage, so that CPU
driver can be loaded.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2: None
arch/riscv/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 39ca2d8..c45e4
There is no need to expose RISCV_NDS to the Kconfig menu as it is
an ax25-specific option.
Signed-off-by: Bin Meng
---
Changes in v2: None
arch/riscv/cpu/ax25/Kconfig | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/K
RISC-V privileged architecture v1.10 defines a real-time counter,
exposed as a memory-mapped machine-mode register - mtime. mtime must
run at constant frequency, and the platform must provide a mechanism
for determining the timebase of mtime. The mtime register has a
64-bit precision on all RV32, R
From: Anup Patel
This adds an implementation of riscv_get_time() API that is using
rdtime instruction.
This is the case for S-mode U-Boot, and is useful for processors
that support rdtime in M-mode too.
Signed-off-by: Anup Patel
Signed-off-by: Bin Meng
---
Changes in v2:
- incorporated and
On Fri, Dec 07, 2018 at 02:24:22PM +0100, Philipp Tomsich wrote:
> Kever,
>
> > On 07.12.2018, at 02:39, Kever Yang wrote:
> >
> > Hi Philipp,
> >
> > On 12/06/2018 09:50 PM, Philipp Tomsich wrote:
> >> +Tom
> >>
> >>> On 05.12.2018, at 03:25, Kever Yang wrote:
> >>>
> >>> The U-Boot eMMC do
With this change, we can avoid a forward declaration.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2:
- rebase on u-boot/master
- drop the patch "riscv: Pass correct exception code to _exit_trap()"
- drop the patch "riscv: Refactor handle_trap() a little for future extension
The standard RISC-V ISA sets aside a 12-bit encoding space for up
to 4096 CSRs. This adds all known CSR numbers as defined in the
RISC-V Privileged Architecture Version 1.10.
Signed-off-by: Bin Meng
---
Changes in v2: None
arch/riscv/include/asm/encoding.h | 219 +++
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.
This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as som
From: Lukas Auer
RISC-V has two code models, medium low (medlow) and medium any (medany).
Medlow limits addressable memory to a single 2 GiB range between the
absolute addresses -2 GiB and +2 GiB. Medany limits addressable memory
to any single 2 GiB address range.
By default, medlow is selected
sp cannot be loaded before restoring other registers.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2: None
arch/riscv/cpu/mtrap.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/cpu/mtrap.S
index a5ad558..da307e4 10064
From: Anup Patel
So far we have a Kconfig option for supervisor mode. This adds an
option for the machine mode.
Signed-off-by: Anup Patel
Signed-off-by: Bin Meng
---
Changes in v2:
- incorporated and reworked Anup's S-mode timer patch
@ http://patchwork.ozlabs.org/patch/1006663/
arch/ris
With current csr_xxx ops, we cannot pass a macro to parameter
'csr', hence we need add another level to allow the parameter
to be a macro itself, aka indirect stringification.
Signed-off-by: Bin Meng
---
Changes in v2:
- new patch to add indirect stringification to csr_xxx ops
arch/riscv/incl
This calls cpu_probe_all() to probe all available cpus.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2:
- move to arch/riscv/cpu/cpu.c
arch/riscv/cpu/cpu.c| 14 ++
arch/riscv/cpu/qemu/Kconfig | 1 +
2 files changed, 15 insertions(+)
diff --git a/arch/
This adds a driver for RISC-V CPU. Note the driver will bind
a RISC-V timer driver if "timebase-frequency" property is
present in the device tree.
Signed-off-by: Bin Meng
---
Changes in v2:
- pass NULL as the timer device to device_bind_with_driver_data()
drivers/cpu/Kconfig | 6 +++
dr
This adds a timebase_freq member to the 'struct cpu_platdata', to
hold the "timebase-frequency" value in the cpu or /cpus node.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Reviewed-by: Lukas Auer
---
Changes in v2:
- Use 'Hz' instead of 'HZ'
include/cpu.h | 3 +++
1 file changed, 3 ins
To enumerate devices on the /soc/ node, create a "simple-bus"
driver to match "riscv-virtio-soc".
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2:
- add DM_FLAG_PRE_RELOC flag to the simple-bus driver
arch/riscv/cpu/qemu/cpu.c | 14 ++
1 file changed, 14 inserti
This adds DM drivers to support RISC-V CPU and timer, plus some bug fixes.
This series is available at u-boot-x86/riscv-working for testing.
Changes in v2:
- Use 'Hz' instead of 'HZ'
- add DM_FLAG_PRE_RELOC flag to the simple-bus driver
- pass NULL as the timer device to device_bind_with_driver_d
On Fri, Dec 07, 2018 at 12:09:33PM +0100, Miquel Raynal wrote:
> Hi Tom, Wolfgang,
[snip]
> So what's our next move? I think Wolfgang had two points:
> * NOR (and everything related to NOR) should not depend on MTD.
> * Same for NAND.
>
> For NAND this is already too late, NAND code already relies
There is no need for an embedded device tree for this board so let the
build process generate a separate u-boot.dtb file instead.
Signed-off-by: Felix Brack
---
arch/arm/mach-omap2/am33xx/Kconfig | 1 +
configs/am335x_pdu001_defconfig| 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
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