The Libre Computer Project ALL-H3-CC has three models, all using the
same board design, but with different pin compatible SoCs and amount of
DRAM.
Currently only the H3 1GB DRAM variant is supported. To support the two
other variants, first split the original device tree into a common board
design
This patch adds a device tree file for the H5 version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe27544125e ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and
has 4Gb DDR3 chips instead of 2G
The dts Makefile entries for the H3 are not ordered correctly.
Move the Nano Pi entries before the Orange Pi so they are.
Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
---
arch/arm/dts/Makefile | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/Mak
The Libre Computer Board ALL-H3-CC does not have an I2C controllable
regulator. Having R_I2C and SPL_I2C enabled serves no purpose.
Disable them.
Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
---
configs/libretech_all_h3_cc_h3_defconfig | 2 --
1 file changed, 2 deletions(-)
diff --git
This patch adds a device tree file for the H2+ version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe27544125e ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and
has only two 2Gb DDR3 chips in
Hi,
This is v2 of the ALL-H3-CC H2+/H5 variants series.
Changes since v1:
- Renamed common board .dtsi to follow what was merged in Linux
- Fixed error in Makefile
- Collected acks from Maxime
Original cover letter:
This series is adds support for the H2+ and H5 variants of the Libre
Co
currently booting from tftp/nfs is on hold, first trying to get a
bootup using sdcard.
On Fri, Apr 27, 2018 at 8:23 AM, Ajay Garg wrote:
> Seems setting bootargs is not legal in bootz command, so segregated the two.
> However, the end-result is same as in my original email.
>
>
> tftp 0x4900
Hi All.
After a lot of hit-and-trials, I have managed to get some bootup.
Unfortunately, not able to get a login-prompt.
Following have been done :
== u-boot ==
u-boot has been compiled using bleeding-edge mainline
(ec5c4a8fd64a178a4d159917cda0aa176e5a9be5), via :
* make Cubieboard2_defconfig
find_next_zero_bit() incorrectly handles cases when:
- total bitmap size < 32
- rest of bits to process
static inline int find_next_zero_bit(void *addr, int size, int offset)
{
unsigned long *p = ((unsigned long *)addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
Hi Bryan,
On Fri, Apr 27, 2018 at 11:08 PM, Bryan O'Donoghue
wrote:
> Following on from a discussion with Marek and Lukasz re: a namespace
> collision with set_bit and clear_bit in f_mass_storage, I noticed some
> inconsistencies in the definition and usage of PLATFORM__SET_BIT and
> PLATFORM__CL
On Sun, Apr 22, 2018 at 10:20:50AM -0400, Tom Rini wrote:
> Re-sync the logic about which clang warnings to disable from v4.17-rc1.
> Note that we don't disable all of the same ones as for now we haven't
> run into any cases of warnings from clang in code from upstream Linux.
>
> Signed-off-by: T
On Sun, Apr 22, 2018 at 07:15:03PM -0400, Tom Rini wrote:
> As of clang-5.0, things have changed a bit. First, we cannot
> automatically guess -target values as if we do not pass one with CC then
> cc-option will fail. Second, to disable movt/movw relocations the
> argument has become -mno-movt.
On Wed, Apr 18, 2018 at 01:50:47PM -0400, Tom Rini wrote:
> We have a large number of places where while we historically referenced
> gd in the code we no longer do, as well as cases where the code added
> that line "just in case" during development and never dropped it.
>
> Signed-off-by: Tom Ri
On Mon, Apr 23, 2018 at 09:13:09AM -0400, Tom Rini wrote:
> We have not had CONFIG_NET_MULTI be meaningful for quite some time, drop
> the last remnants.
>
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
___
On Sun, Apr 15, 2018 at 01:51:26PM -0400, Tom Rini wrote:
> From: Adam Ford
>
> This converts the following to Kconfig:
>CONFIG_SPI
>
> This partly involves updating code that assumes that CONFIG_SPI implies
> things that are specific to the MPC8xx SPI driver. For now, just update
> the CO
Hi Sam,
On Fri, Apr 27, 2018 at 8:10 PM, Sam Protsenko
wrote:
> On 24 April 2018 at 12:37, Alex Kiernan wrote:
>>
>> This series merges the fastboot UDP support from AOSP into mainline
>> U-Boot.
>>
>
> Can you please point me out from which AOSP code exactly this code was
> ported? Links to cod
On 24 April 2018 at 12:37, Alex Kiernan wrote:
>
> This series merges the fastboot UDP support from AOSP into mainline
> U-Boot.
>
Can you please point me out from which AOSP code exactly this code was
ported? Links to code, maybe some docs. Thanks.
> Open questions:
>
> - what's the correct way
asm/global_data.h is already included via common.h.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_boottime.c | 1 -
lib/efi_loader/efi_image_loader.c | 1 -
lib/efi_loader/efi_memory.c | 1 -
lib/efi_loader/efi_runtime.c | 1 -
4 files changed, 4 deletions(-)
diff --g
Hi Bryan,
> Compiling the f_mass_storage driver for an x86 target results in a
> compilation error as set_bit and clear_bit are provided by bitops.h
>
> Looking at the provenance of the current u-boot code and the git
> change history in the kernel, it looks like we have a local copy of
> set_bit
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
Looking at the provenance of the current u-boot code and the git change
history in the kernel, it looks like we have a local copy of set_bit and
clear_bit as a hol
nios2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
Hook the arch __clear_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Thomas Chou
---
arch/nios2/include/asm/bitops/non-
nds2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
Hook the arch __clear_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Macpaul Lin
---
arch/nds32/include/asm/bitops.h | 2
nios2 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
Hook the arch __set_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Thomas Chou
---
arch/nios2/include/asm/bitops/non-atomic.h |
nds32 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
Hook the arch __set_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Macpaul Lin
---
arch/nds32/include/asm/bitops.h | 2 ++
1 fi
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
To address that situation we discussed on the list moving to
genetic_set_bit() instead.
Doing a quick grep for similar situations in drivers/usb shows that the
co
riscv bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
Hook the arch __set_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Rick Chen
Cc: Greentime Hu
---
arch/riscv/include/asm/bitop
riscv bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
Hook the arch __clear_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Rick Chen
Cc: Greentime Hu
---
arch/riscv/include
V2:
- Fix commit log nds2 -> nds32
- Fix copy/paste error resulting in double colon "arch : : text"
V1:
Following on from a discussion with Marek and Lukasz re: a namespace
collision with set_bit and clear_bit in f_mass_storage, I noticed some
inconsistencies in the definition and usage of PLATFOR
x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
Hook the arch __set_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Simon Glass
Cc: Bin Meng
---
arch/x86/include/asm/bitops.h |
nds2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
Hook the arch __clear_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Macpaul Lin
---
arch/nds32/include/asm/bitops.h | 2
nios2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
Hook the arch __clear_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Thomas Chou
---
arch/nios2/include/asm/bitops/non-
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
To address that situation we discussed on the list moving to
genetic_set_bit() instead.
Doing a quick grep for similar situations in drivers/usb shows that the
co
nds32 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
Hook the arch __set_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Macpaul Lin
---
arch/nds32/include/asm/bitops.h | 2 ++
1 fi
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
Looking at the provenance of the current u-boot code and the git change
history in the kernel, it looks like we have a local copy of set_bit and
clear_bit as a hol
riscv bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
Hook the arch __set_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Rick Chen
Cc: Greentime Hu
---
arch/riscv/include/asm/bitop
nios2 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
Hook the arch __set_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Thomas Chou
---
arch/nios2/include/asm/bitops/non-atomic.h |
riscv bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
Hook the arch __clear_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Rick Chen
Cc: Greentime Hu
---
arch/riscv/include
x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
Hook the arch __set_bit() now.
Signed-off-by: Bryan O'Donoghue
Cc: Simon Glass
Cc: Bin Meng
---
arch/x86/include/asm/bitops.h |
Following on from a discussion with Marek and Lukasz re: a namespace
collision with set_bit and clear_bit in f_mass_storage, I noticed some
inconsistencies in the definition and usage of PLATFORM__SET_BIT and
PLATFORM__CLEAR_BIT as well as a similar use of __set_bit in the composite
USB gadget driv
On 04/27/2018 04:28 PM, Patrice CHOTARD wrote:
> Hi Marek
>
> On 04/27/2018 11:18 AM, Marek Vasut wrote:
>> On 04/27/2018 11:01 AM, Patrice Chotard wrote:
>>> This patch adds phy tranceiver driver for STM32 USB PHY
>>> Controller (usbphyc) that provides dual port High-Speed
>>> phy for OTG (single
Hi Marek
On 04/27/2018 11:18 AM, Marek Vasut wrote:
> On 04/27/2018 11:01 AM, Patrice Chotard wrote:
>> This patch adds phy tranceiver driver for STM32 USB PHY
>> Controller (usbphyc) that provides dual port High-Speed
>> phy for OTG (single port) and EHCI/OHCI host controller
>> (two ports).
>
>
This patch solves assert failed displayed in the console during a boot.
The root cause is that the ubifs_inode is not already allocated when
ubifs_printdir and ubifs_finddir functions are called.
Trace showing the issue:
feed 'boot.scr.uimg', ino 94, new f_pos 0x17b40ece
dent->ch.sqnum '7132', cre
Hi Simon,
> > enum tpm_physical_presence {
> > TPM_PHYSICAL_PRESENCE_HW_DISABLE= 0x0200,
> > TPM_PHYSICAL_PRESENCE_CMD_DISABLE = 0x0100,
> > @@ -445,7 +469,7 @@ int tpm_get_specification(void);
> > * @param mode TPM startup mode
> > * @return return code
On 27.4.2018 14:52, Mario Six wrote:
> Add generic enable/disable function to the misc uclass.
>
> Signed-off-by: Mario Six
> ---
>
> v1 -> v2:
> * Merged the two functions into one function
> * Explained the semantics of enabling/disabling more throughly
>
> ---
> drivers/misc/misc-uclass.c |
Hi Simon,
On Thu, 26 Apr 2018 08:40:27 -0600, Simon Glass
wrote:
> Hi Miquel,
>
> On 24 April 2018 at 07:17, Miquel Raynal wrote:
> > Hi Simon,
> >
> > On Fri, 30 Mar 2018 06:42:32 +0800, Simon Glass
> > wrote:
> >
> >> Hi Miquel,
> >>
> >> On 29 March 2018 at 15:43, Miquel Raynal
> >> wr
Add a clock driver for the MPC83xx architecture.
Signed-off-by: Mario Six
---
v1 -> v2:
* Added binding of sysreset driver
---
arch/powerpc/cpu/mpc83xx/speed.c | 4 +
arch/powerpc/include/asm/config.h | 2 +-
drivers/clk/Kconfig | 6 +
drivers/clk/Makefile
It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).
As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset s
Add a sysreset driver for the MPC83xx platform.
Signed-off-by: Mario Six
---
v1 -> v2:
New in v2
---
arch/powerpc/cpu/mpc83xx/cpu.c | 3 +-
drivers/sysreset/Kconfig| 5 ++
drivers/sysreset/Makefile | 9 +-
drivers/sysreset/sysreset_mpc83xx.c | 160
Add a RAM driver for the MPC83xx architecture.
Signed-off-by: Mario Six
---
v1 -> v2:
No changes
---
arch/powerpc/cpu/mpc83xx/spd_sdram.c | 4 +
drivers/ram/Kconfig| 8 +
drivers/ram/Makefile | 1 +
drivers/ram/mpc83xx_sdram.c
Add a timer driver for the MPC83xx architecture.
Signed-off-by: Mario Six
---
v1 -> v2:
* Removed now-superfluous comments
* Removed usage of uclass_{first,next}_device_compat
* Switched to usage of new board uclass (instead of devinfo)
---
arch/powerpc/cpu/mpc83xx/cpu.c | 4 +-
arch/powerp
The CONFIG_PHY_MARVELL has already been migrated to Kconfig (some boards
already had it in their Kconfig), but had not been moved for older
boards.
Move it to the defconfigs for all boards.
Signed-off-by: Mario Six
---
configs/10m50_defconfig| 1 +
configs/3c120_
Includes should be sorted.
Signed-off-by: Mario Six
---
v1 -> v2:
New in v2
---
common/board_f.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/board_f.c b/common/board_f.c
index 2df30cd250..ff7a52705e 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -12,8 +
To print the reset status during boot, add a method print_resetinfo to
board_f, which is called in init_sequence_f[], that gets the reset
information from the sysreset driver (assuming there is only one seems
reasonable), and prints it.
Signed-off-by: Mario Six
---
v1 -> v2:
New in v2
---
com
Add an 'adc' cli command to get adc devices informations and read single
shots datas.
Signed-off-by: Neil Armstrong
---
cmd/Kconfig | 8
cmd/Makefile | 1 +
cmd/adc.c| 121 +++
3 files changed, 130 insertions(+)
create mode 1
Hi Tom,
Please pull this PR.
thanks,
Jagan.
The following changes since commit 275d80a4c2fb63890f3f4c16b7ad481064e650a0:
Merge git://git.denx.de/u-boot-usb (2018-04-22 09:30:36 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-sunxi.git master
for you to fetch chang
Hi Mario,
On 27/04/2018 14:51, Mario Six wrote:
> The regmap functions currently assume that all register map accesses
> have a data width of 32 bits, but there are maps that have different
> widths.
>
> Implement a size parameter for the regmap_read and regmap_write
> functions to specify the wi
> On 27 Apr 2018, at 14:51, Mario Six wrote:
>
> Since there is no canonical "board device" that can be used in board
> files, it is difficult to use DM function for board initialization in
> these cases.
>
> Hence, add a uclass that implements a simple "board device", which can
> hold devices
Hi,
On 27/04/2018 14:53, Mario Six wrote:
> Some reset lines are implemented by toggling the line via a GPIO.
>
> Add a driver to properly drive such reset lines.
You are defining a "gpio-reset" binding which has always been rejected
under Linux, so I'm not sure it's a good idea to add it in U-B
Declaration of indirect PCI bridges is not compatible with DM: Both
define PCI operations, but in different ways. Hence, don't use indirect
bridges if DM is active.
Signed-off-by: Mario Six
Reviewed-by: Simon Glass
---
v1 -> v2:
No changes
---
drivers/pci/pci_indirect.c | 2 +-
1 file changed
Register the IMMR region as a PCI region when PCI is used on MPC83xx.
Signed-off-by: Mario Six
---
v1 -> v2:
No changes
---
drivers/pci/pci-uclass.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index a2e829608a..37ca09d76b 100644
This patch adds a driver for the bus associated with a IHS FPGA.
Signed-off-by: Mario Six
---
v1 -> v2:
* Switched to correct uclass for IHS FPGA driver (now in MISC uclass)
---
drivers/misc/Kconfig | 6 -
drivers/misc/Makefile| 1 +
drivers/misc/gdsys_soc.c | 67
Add a driver for the ICS8N3QV01 Quad-Frequency Programmable VCXO.
Signed-off-by: Mario Six
---
v1 -> v2:
* Expanded documentation
* Switched to u8 for I2C register reading
---
drivers/clk/Kconfig | 8 ++
drivers/clk/Makefile | 1 +
drivers/clk/ics8n3qv01.c | 231 ++
Add generic enable/disable function to the misc uclass.
Signed-off-by: Mario Six
---
v1 -> v2:
* Merged the two functions into one function
* Explained the semantics of enabling/disabling more throughly
---
drivers/misc/misc-uclass.c | 10 ++
include/misc.h | 25 +++
Some reset lines are implemented by toggling the line via a GPIO.
Add a driver to properly drive such reset lines.
Signed-off-by: Mario Six
---
v1 -> v2:
No changes
---
drivers/reset/Kconfig | 7
drivers/reset/Makefile | 1 +
drivers/reset/gpio-reset.c | 100
On devices that have their first network interface provided by a FPGA,
the initialization of further interfaces will fail if the FPGA is not
yet programmed. This leads to problems during factory setup when the
data is supposed to be loaded over secondary netowork interfaces.
To avoid this, use the
Add a PCIe driver for the MPC83xx architecture.
Signed-off-by: Mario Six
---
v1 -> v2:
No changes
---
arch/powerpc/cpu/mpc83xx/pcie.c | 4 +
drivers/pci/Kconfig | 16 ++
drivers/pci/Makefile| 1 +
drivers/pci/pcie_mpc83xx.c | 442 ++
Implement a set of functions to manipulate properties in a live device
tree:
* ofnode_set_property() to set generic properties of a node
* ofnode_write_string() to set string properties of a node
* ofnode_set_enabled() to either enable or disable a node
Signed-off-by: Mario Six
---
v1 -> v2:
*
Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
supports initialization of the FPGA, as well as information gathering.
Signed-off-by: Mario Six
---
v1 -> v2:
New in v2
---
drivers/misc/Kconfig| 6 +
drivers/misc/Makefile | 1 +
drivers/misc/ihs_fpga.c | 686
To prepare for DM conversion, encapsulate all register accesses in
function calls.
Signed-off-by: Mario Six
---
v1 -> v2:
No changes
---
board/gdsys/common/ihs_mdio.c | 41 ++---
1 file changed, 34 insertions(+), 7 deletions(-)
diff --git a/board/gdsys/comm
Bus translations should be applied when reading the address of the sgmii
phy registers from the DT. Use ofnode_get_addr_index instead of the
plain ofnode_read_u32_default to fix this.
Signed-off-by: Mario Six
Acked-by: Joe Hershberger
---
v1 -> v2:
No changes
---
drivers/net/tsec.c | 5 +++--
It is useful to be able to treat the different ranges of a regmap
separately to be able to use distinct offset for them, but this is
currently not implemented in the regmap API.
To preserve backwards compatibility, add regmap_read_ext and
regmap_write_ext functions that take an additional paramete
The regmap functions currently assume that all register map accesses
have a data width of 32 bits, but there are maps that have different
widths.
Implement a size parameter for the regmap_read and regmap_write
functions to specify the width of a desired read or write operation on a
regmap.
Correc
Add a driver for RXAUI control on IHS FPGAs.
Signed-off-by: Mario Six
---
v1 -> v2:
* Switched to regmap usage (instead of fpgamap)
---
drivers/misc/Kconfig| 6 +++-
drivers/misc/Makefile | 1 +
drivers/misc/gdsys_rxaui_ctrl.c | 77 ++
Add tests for the dev_{enable,disable}_by_path functions.
Signed-off-by: Mario Six
---
v1 -> v2:
New in v2
---
test/dm/test-fdt.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 3067510433..903b8cc9dc 100644
--- a/
Make the ihs_mdio driver DM-compatible, while retaining the old
functionality for not-yet-converted boards.
Signed-off-by: Mario Six
---
v1 -> v2:
* Switched to regmap usage (instead of fpgamap)
---
board/gdsys/common/ihs_mdio.c | 58 +++
board/gdsys/com
Add tests for the ofnode_set_enabled, ofnode_write_string, and
ofnode_write_property functions.
Signed-off-by: Mario Six
---
v1 -> v2:
New in v2
---
test/dm/test-fdt.c | 53 +
1 file changed, 53 insertions(+)
diff --git a/test/dm/test-fdt.c
It would be convenient if one could use the regmap API in conjunction
with register maps defined as structs (i.e. structs that directly mirror
the memory layout of the registers in question). A similar approach was
planned with the regmap_write32/regmap_read32 macros, but was never
used.
Hence, im
We cannot use device structures to disable devices, since getting
them with the API functions would bind and activate the device, which
would fail if the underlying device does not exist.
Hence, add a function to disable devices by path in a live device tree.
Signed-off-by: Mario Six
---
v1 ->
Add driver for the IHS IO endpoint on IHS FPGAs.
Signed-off-by: Mario Six
---
v1 -> v2:
* Switched to regmap usage (instead of fpgamap)
---
drivers/misc/Kconfig | 5 ++
drivers/misc/Makefile | 1 +
drivers/misc/gdsys_ioep.c | 150 ++
dri
Add tests for the new board uclass.
Signed-off-by: Mario Six
---
v1 -> v2:
New in v2
---
arch/sandbox/dts/test.dts | 4 ++
configs/sandbox64_defconfig| 2 +
configs/sandbox_defconfig | 2 +
configs/sandbox_flattree_defconfig | 2 +
configs/sandbox_noblk_defcon
Since there is no canonical "board device" that can be used in board
files, it is difficult to use DM function for board initialization in
these cases.
Hence, add a uclass that implements a simple "board device", which can
hold devices not suitable anywhere else in the device tree, and is also
abl
Add a board driver for the upcoming gdsys Gazerbeam board.
Signed-off-by: Mario Six
---
v1 -> v2:
* Improved error handling
* Renamed DT properties
* Moved the driver over to the board uclass
---
drivers/board/gazerbeam.c | 173 ++
drivers/board/gaze
On Fri, Apr 27, 2018 at 9:04 AM, Lukasz Majewski wrote:
> Hi Kever,
>
>> Hi Jocelyn and Alex,
>>
>>
>> It's great to see you are getting this feature from google code
>> to be mainline code.
>>
>> My opinion is that we should have the same fastboot cmd handling
>> in both UDP and USB in a
Hi Simon,
On Thu, Apr 26, 2018 at 4:40 PM, Simon Glass wrote:
> Hi Mario,
>
> On 26 April 2018 at 00:07, Mario Six wrote:
>> Hi Simon,
>>
>> On Tue, Apr 24, 2018 at 11:53 PM, Simon Glass wrote:
>>> Hi Mario,
>>>
>>> On 19 April 2018 at 01:50, Mario Six wrote:
Hi Simon,
On W
Banana Pi BPI-M2 Berry is a quad-core mini single board computer
built with Allwinner V40 SoC. It features
- Quad Core ARM Cortex A7 CPU V40
- 1GB of RAM .
- microSD/SATA port..
- onboard WiFi and BT
- 4 USB A 2.0 ports
- 1 USB OTG port
- 1 HDMI port
- 1 audio jack
- DC power port
Signed-off-by: J
Sync sun8i-r40.dtsi changes from Linux with
Merge: a406778618d0 088345fc3553
Author: Stephen Rothwell
Date: Tue Apr 24 14:15:02 2018 +1000
Merge branch 'akpm/master'
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/dts/sun8i-r40.dtsi | 43 +++
include/dt
On Fri, Apr 27, 2018 at 01:12:14AM +0200, Marek Vasut wrote:
> The following changes since commit a61f9d1fbbca3c5e59b907ad3071db70ef174872:
>
> Merge git://git.denx.de/u-boot-spi (2018-04-25 20:50:28 -0400)
>
> are available in the Git repository at:
>
> git://git.denx.de/u-boot-usb.git mas
On Fri, Apr 27, 2018 at 01:11:43AM +0200, Marek Vasut wrote:
> The following changes since commit d2a1f120cf638fd8a149bc8a46aec961c2fb9406:
>
> Merge git://git.denx.de/u-boot-rockchip (2018-04-26 07:21:41 -0400)
>
> are available in the Git repository at:
>
> git://git.denx.de/u-boot-socfpg
On Fri, Apr 27, 2018 at 01:11:04AM +0200, Marek Vasut wrote:
> The following changes since commit a61f9d1fbbca3c5e59b907ad3071db70ef174872:
>
> Merge git://git.denx.de/u-boot-spi (2018-04-25 20:50:28 -0400)
>
> are available in the Git repository at:
>
> git://git.denx.de/u-boot-sh.git mast
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
The local version of set_bit and clear_bit are doing some IP-block specific
bit-twiddling so we don't actually want to accidentally pick up the
bitops.h version of
On 26/04/18 22:21, Marek Vasut wrote:
On 04/26/2018 10:47 PM, Bryan O'Donoghue wrote:
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
The local version of set_bit and clear_bit are doing some IP-block specifi
On Fri, 2018-04-27 at 09:08 +0200, Marek Vasut wrote:
> On 04/27/2018 07:51 AM, Ang, Chee Hong wrote:
> [...]
>
> >
> > >
> > > >
> > > > >
> > > > > >
> > > > > > + /* Check for any error */
> > > > > > + ret =
> > > > > > reconfig_status_resp[RECONFIG_STATUS_STATE];
> >
On Fri, 2018-04-27 at 09:08 +0200, Marek Vasut wrote:
> On 04/27/2018 07:31 AM, Ang, Chee Hong wrote:
> >
> > On Thu, 2018-04-26 at 14:38 +0200, Marek Vasut wrote:
> > >
> > > On 04/26/2018 08:15 AM, Ang, Chee Hong wrote:
> > > >
> > > >
> > > > On Fri, 2018-04-20 at 05:42 +0200, Marek Vasut wr
On Thu, 2018-04-26 at 14:37 +0200, Marek Vasut wrote:
> On 04/26/2018 08:12 AM, Ang, Chee Hong wrote:
> >
> > On Fri, 2018-04-20 at 05:41 +0200, Marek Vasut wrote:
> > >
> > > On 04/20/2018 05:26 AM, chee.hong@intel.com wrote:
> > > >
> > > >
> > > > From: Chee Hong Ang
> > > >
> > > > En
On Thu, 2018-04-26 at 14:38 +0200, Marek Vasut wrote:
> On 04/26/2018 08:15 AM, Ang, Chee Hong wrote:
> >
> > On Fri, 2018-04-20 at 05:42 +0200, Marek Vasut wrote:
> > >
> > > On 04/20/2018 05:26 AM, chee.hong@intel.com wrote:
> > > >
> > > >
> > > > From: Chee Hong Ang
> > > >
> > > > En
On Fri, Apr 27, 2018 at 4:17 PM, Ley Foon Tan wrote:
> Add code to reset all reset signals as in Ethernet DT node. A reset property
> is an optional feature,
> so only print out a warning and do not fail if a reset property is not
> present.
>
> If a reset property is discovered, then use it to
Hi,
On 26/04/2018 16:40, Simon Glass wrote:
> Hi Neil,
>
> On 23 April 2018 at 08:18, Neil Armstrong wrote:
>> Add an 'adc' cli command to get adc devices informations and read single
>> shots datas.
>>
>> Signed-off-by: Neil Armstrong
>> ---
>> cmd/Kconfig | 7
>> cmd/Makefile | 1 +
Add the regmap_update_bits() to simply the read/modify/write of registers
in a single command. The function is taken from Linux regmap
implementation.
Signed-off-by: Neil Armstrong
---
drivers/core/regmap.c | 14 ++
include/regmap.h | 10 ++
2 files changed, 24 insertion
This patchset adds the regmap_update_bits() to easy read/modify/write
like the Linux ragmap API.
The second patch adds a read/update_bits/write test to call these functions
but we cannot check the behaviour since io read/write is not implemented
on the sandbox arch.
Changes since v1:
- moved fro
Add calls to regmap_read/modify_bits/write even if the proper memory
read/write calls are not executed in sandbox.
Signed-off-by: Neil Armstrong
---
test/dm/regmap.c | 24
1 file changed, 24 insertions(+)
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index 7f66058..4
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