Add HPET driver as an alternative timer for x86 (default is TSC).
HPET counter has constant frequency and does not need calibration.
This change also makes TSC timer driver optional on x86.
New HPET driver can also be selected as the early timer on x86.
HPET can be selected as the tick timer in th
Add HPET driver as an alternative timer for x86 (default is TSC).
HPET counter has constant frequency and does not need calibration.
This change also makes TSC timer driver optional on x86.
New HPET driver can also be selected as the early timer on x86.
v3:
Added early timer choice in x86-specif
On Fri, Mar 30, 2018 at 10:46:40PM +0300, Andy Shevchenko wrote:
> > + writel(0, regs + HPET_MAIN_COUNT_L);
> > + writel(0, regs + HPET_MAIN_COUNT_H);
>
> Can we use writeq() here?
I don't see readq/writeq defined for x86, even x86_64.
> > + tl = readl(regs + HPET_MAIN
On Fri, Mar 30, 2018 at 10:42:57PM +0300, Andy Shevchenko wrote:
> On Fri, Mar 30, 2018 at 1:39 AM, Simon Glass wrote:
> > On 29 March 2018 at 18:52, Andy Shevchenko
> > wrote:
>
> >> First question is how this will work in case of Broadwell and Ivybridge
> >> that have something to do with HPET
Hi Tom,
On Mon, 2018-03-26 at 15:57 +0300, Eugeniy Paltsev wrote:
> This patch add support of hsdk platform-specific commands:
>
> hsdk_clock set - set clock from axi_freq, cpu_freq and tun_freq
> environment variables/command line arguments
>
> hsdk_clock get - save clock frequencies to axi_fre
On Fri, Mar 30, 2018 at 1:29 AM, Ivan Gorinov wrote:
> Adding HPET as an alternative timer for x86 (default is TSC).
> HPET counter has constant frequency and does not need calibration.
> This change also makes TSC timer driver optional on x86.
> If X86_TSC is disabled, early timer functions are p
On 03/30/2018 06:53 PM, Dinh Nguyen wrote:
> Add a DM compatible reset driver for the SoCFPGA platform.
>
> Signed-off-by: Dinh Nguyen
> ---
> drivers/reset/Kconfig | 7 +++
> drivers/reset/Makefile| 1 +
> drivers/reset/reset-socfpga.c | 111
> ++
On Fri, Mar 30, 2018 at 1:39 AM, Simon Glass wrote:
> On 29 March 2018 at 18:52, Andy Shevchenko
> wrote:
>> On Wed, 2018-03-28 at 17:58 -0700, Ivan Gorinov wrote:
>> First question is how this will work in case of Broadwell and Ivybridge
>> that have something to do with HPET in their CPU code,
Hello, Kevel!
I can confirm, that rk3188 doesn’t have arch timer. I made test, see below.
By the way, could you tell what git head to use to apply your patch series?
I want to test other changes as well.
I failed to apply to this one head:
commit eef11acebaa48e241e9187c717dc92d3e175c119
Author:
On Fri, Mar 30, 2018 at 2:49 AM, Bin Meng wrote:
> Hi Joe,
>
> On Thu, Mar 29, 2018 at 2:17 AM, Joe Hershberger
> wrote:
>> On Sun, Mar 25, 2018 at 8:40 PM, Bin Meng wrote:
>>> Hi Joe,
>>>
>>> On Sat, Mar 24, 2018 at 1:11 AM, Joe Hershberger
>>> wrote:
On Thu, Mar 22, 2018 at 9:46 AM, Bi
Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.
Signed-off-by: Joe Hershberger
---
configs/am335x_baltos_defconfig| 1 +
configs/am335x_shc_defconfig
Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen
---
drivers/reset/Kconfig | 7 +++
drivers/reset/Makefile| 1 +
drivers/reset/reset-socfpga.c | 111 ++
3 files changed, 119 insertions(+)
create mod
On 30/03/18 16:05, Fabio Estevam wrote:
This will conflict with Pierre-Jean's recent patch series that makes
use of the generic load command:
https://lists.denx.de/pipermail/u-boot/2018-March/324065.html
and
https://lists.denx.de/pipermail/u-boot/2018-March/324066.html
Would his approach w
Hi Marek,
Thanks for this update and the detailed notes.
On 03/29/2018 06:04 PM, Marek Vasut wrote:
When the DDR calibration is enabled, a situation may happen that it
will fail on a few select boards out of a whole production lot. In
particular, after the first write leveling stage, the MPWLDE
On 30/03/18 15:53, Fabio Estevam wrote:
Hi Bryan,
On Fri, Mar 30, 2018 at 7:55 AM, Bryan O'Donoghue
wrote:
Booting the following image with tip-of-tree we get a CAAM DECO error (and
subsequent crash due to a kernel bug in 4.1).
For booting NXP based kernel you should use warp7_secure_defco
Hi Marek,
On Thu, Mar 29, 2018 at 10:04 PM, Marek Vasut wrote:
> When the DDR calibration is enabled, a situation may happen that it
> will fail on a few select boards out of a whole production lot. In
> particular, after the first write leveling stage, the MPWLDECTRLx
> registers will contain a
Hi Bryan,
On Fri, Mar 30, 2018 at 11:18 AM, Bryan O'Donoghue
wrote:
> This patch replaces the current "fatload" command with an environment
> variable. Making the load command into an environment variable means we can
> change filesystem type in boot.scr and reuse existing commands within that
>
Hi Bryan,
On Fri, Mar 30, 2018 at 11:18 AM, Bryan O'Donoghue
wrote:
> Adding CONFIG_WARP7_ROOT_PART allows a defconfig to specify which partition
> is use as the root partition on WaRP7, this is a desirable change in order
> to support a different partitioning schemes. The default is the current
Hi Bryan,
On Fri, Mar 30, 2018 at 7:55 AM, Bryan O'Donoghue
wrote:
> Booting the following image with tip-of-tree we get a CAAM DECO error (and
> subsequent crash due to a kernel bug in 4.1).
For booting NXP based kernel you should use warp7_secure_defconfig
instead, which selects CONFIG_ARMV7_B
In order to sign images with the IMX code-signing-tool (CST) we need to
know the load address of a given image. The best way to derive this load
address is to make it into a define - so that u-boot.cfg contains the
address - which we can then parse when generating the IMX CST headers.
Signed-off-b
Hi guys,
Am 30.03.2018 um 10:41 schrieb Simon Glass:
> On 30 March 2018 at 15:53, Neil Armstrong wrote:
>> On 30/03/2018 00:41, Simon Glass wrote:
>>> On 29 March 2018 at 16:42, Neil Armstrong wrote:
On 03/12/2017 10:17, Beniamino Galvani wrote:
> +
> + gate = &gates[clk->id];
>
This patch adds support for verifying a signed boot.scr. With this in place
it's possible for run-time Linux to update boot.scr to set different
variables such as switching between different boot partitions, pointing to
different kernels etc and for u-boot to verify these changes via the HAB
prior
In order to sign images with the IMX code-signing-tool (CST) we need to
know the load address of a given image. The best way to derive this load
address is to make it into a define - so that u-boot.cfg contains the
address - which we can then parse when generating the IMX CST headers.
This patch m
Subtracts CONFIG_OPTEE_TZDRAM_SIZE from the available DRAM size.
On WaRP7 we simply define the OPTEE region as from the maximum DRAM address
minus CONFIG_OPTEE_TZDRAM_SIZE bytes.
Note the OPTEE boot process will itself subtract the DRAM region it lives
in from the memory map passed to Linux.
Sig
Assigning the UUID discovery path to a tweakable environment variable means
that later steps in the boot process - particularly a boot script can
change the target root partition of a particular Linux boot.
Retargeting the rootfs is an important feature when doing ping/pong
upgrades allowing a boo
Adding CONFIG_WARP7_ROOT_PART allows a defconfig to specify which partition
is use as the root partition on WaRP7, this is a desirable change in order
to support a different partitioning schemes. The default is the current
partition #1.
Signed-off-by: Bryan O'Donoghue
---
board/warp7/Kconfig | 8
This patch adds an environment variable called "hab_enabled" which gets set
to a boolean status indicating whether HAB is enabled or not.
Subsequent patches can use this environment variable to determine if its
necessary to run a given binary through the hab_auth_img console command.
Signed-off-b
Doing secure boot on the WaRP7 using a common image format and the same
variable to represent the base address for each call means we can reduce
down the command to a single environment command.
This patch adds warp7_auth_or_fail as a wrapper around
"hab_auth_img_or_fail ${hab_ivt_addr} ${filesize
setexpr allows us to do arithmetic for env variables - something that is
both useful and required when doing HAB authentication without hard-coding
HAB load addresses.
Enable setexpr in the secure defconfig - it's not required for the unsecure
version.
Signed-off-by: Bryan O'Donoghue
---
config
We need to know the name of a signed boot-script, its better to have a
separate variable for this then to simply append some fixed string to an
existing image name.
Signed-off-by: Bryan O'Donoghue
---
include/configs/warp7.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/war
This patch introduces the environment variable ivt_offset. When we define a
load address for Linux or DTB or any file the IVT associated with that file
is prepended. We extract the actual load addresses from u-boot.cfg and feed
these values into the code-signing process - hence we want u-boot to ha
Various function associated with booting the WaRP7 in High Assurance Boot
(HAB) mode are enabled by switching on CONFIG_SECURE_BOOT.
This patch enables CONFIG_SECURE_BOOT for the WaRP7 defconfig.
Signed-off-by: Bryan O'Donoghue
---
configs/warp7_secure_defconfig | 1 +
1 file changed, 1 inserti
+ Breno
Forget to add you to the CC Breno bod < sleep
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Requires setting CONFIG_OPTEE=y and setting an OPTEE TrustZone DRAM base in
include/configs/warp7.h.
Signed-off-by: Bryan O'Donoghue
---
configs/warp7_secure_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig
index 731085
This patch replaces the current "fatload" command with an environment
variable. Making the load command into an environment variable means we can
change filesystem type in boot.scr and reuse existing commands within that
boot script.
Signed-off-by: Bryan O'Donoghue
---
include/configs/warp7.h |
Right now a region of 0x30 bytes is allocated at the end of DRAM for
the purposes of loading an OPTEE firmware inside of it. This patch adds the
printout of the relevant address ranges.
Signed-off-by: Bryan O'Donoghue
---
board/warp7/warp7.c | 10 ++
1 file changed, 10 insertions(+)
In order to correctly produce an image with a IVT/DCD header we need to
define a CSF in imximage.cfg. We just use the mx7 default here.
All we have to do with this option switched on is "make u-boot.imx" and we
then will get
- u-boot.imx
- u-boot.imx.log
The log file is really important because
This patch enables CONFIG_BOOTM_TEE. Once enabled its possible to
chain-load Linux through OPTEE.
Loading kernel to 0x8080
=> run loadimage
Load FDT to 0x8300
=> run loadfdt
Load OPTEE to 0x8400
=> fatload mmc 0:5 0x8400 /lib/firmware/uTee.optee
Then chain-load to the kernel via
This series enables an automated HAB verified secure boot which chain-loads
via OPTEE see `git show 5cf3251..c225e7c` for details.
This set depends on three in-flight patchsets
1. [PATCH v3 0/3] NXP WaARP7 set serial# from OTP fuses for USB iSerial
Already has a Reviewed-by from Fabio
2. [PAT
This patch adds BOOTROM_IVT_HDR_OFFSET at 0xC00. The BootROM expects to
find the IVT header at a particular offset in an i.MX image.
Defining the expected offset of the IVT header in the first-stage BootROM
image format is of use of later stage authentication routines where those
routines continue
Hi Tom,
please pull the first batch of Marvell related patches.
Thanks,
Stefan
The following changes since commit 81cf7c8d45935a295991fe2cd1df286f0f47511f:
Merge git://git.denx.de/u-boot-ubi (2018-03-25 12:02:13 -0400)
are available in the Git repository at:
git://www.denx.de/git/u-boot-
On 19.02.2018 07:17, Baruch Siach wrote:
This makes the network devices usable when booting a blank board over
UART, with no pre-configured MAC address stored in the environment area.
Signed-off-by: Baruch Siach
---
configs/clearfog_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
On 14.02.2018 18:25, ig...@marvell.com wrote:
From: Igal Liberman
Currently, ATU (address translation unit) implementation doesn't
support translate addresses > 32 bits.
This patch allows to configure ATU correctly for different
memory accesses (memory, configuration and IO).
The same approach
On 17.03.2018 09:34, Mark Kettenis wrote:
The various load address values are taken from the a37xx configuration
and match the dowstream 'u-boot-2017.03-armada-17.10' release where
appropriate.
Signed-off-by: Mark Kettenis
---
include/configs/mvebu_armada-8k.h | 19 +++
1 fil
On 15.03.2018 11:14, Alexander Graf wrote:
The kwbimage format is reading beyond its header structure if it
misdetects a Xilinx Zynq image and tries to read it. Fix it by
sanity checking that the header we want to read fits inside our
file size.
Signed-off-by: Alexander Graf
---
tools/kwbimag
On 26.03.2018 09:57, m...@marvell.com wrote:
From: Wilson Ding
This patch added a new region of 32MiB AT 0xe800.
to Armada37x0's memory map. This region is supposed to
be mapped in MMU in order to enable the access to the
PCI I/O or MEM resources.
Signed-off-by: Wilson Ding
Reviewed-on: h
On 26.03.2018 09:55, m...@marvell.com wrote:
From: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Signed-off-by: Ken Ma
---
arch/arm/dts/armada-37xx.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi
index 6902342..75a22de 10064
Hi Jagan,
On Mon, 2018-03-26 at 14:08 +0300, Eugeniy Paltsev wrote:
> Add support for the SST sst26wf016, sst26wf032 and sst26wf064 flash IC:
>
> sst26wf*** flash series block protection implementation differs from other
> SST series, so we add implementation for sst26wf*** lock/unlock/is_locked
Booting the following image with tip-of-tree we get a CAAM DECO error (and
subsequent crash due to a kernel bug in 4.1).
http://freescale.github.io/#download -> BoardsWaRPboard community - WaRP -
Wearable Reference PlatformFSL Community BSP 2.3fsl-image-multimediawayland
Image: fsl-image-multimed
Hi Ivan,
On Fri, Mar 30, 2018 at 6:29 AM, Ivan Gorinov wrote:
> Adding HPET as an alternative timer for x86 (default is TSC).
> HPET counter has constant frequency and does not need calibration.
> This change also makes TSC timer driver optional on x86.
> If X86_TSC is disabled, early timer funct
This patch adds a "bulk" API to the clock API in order to get/enable/disable
/release a group of clocks associated with a device.
This bulk API will avoid adding a copy of the same code to manage
a group of clocks in drivers.
Signed-off-by: Neil Armstrong
---
This serie and the "reset bulk" seri
This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.
This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.
Signed-off-by: Neil Armstrong
---
This serie and the "c
> On 30 Mar 2018, at 10:28, Guillaume GARDET wrote:
>
> Commit 253c60a breaks the exit value of 'mkimage -T rkimage'
> and print the following error:
> mkimage: Can't print header for Rockchip Boot Image support: Success
>
> It is not a failure to not print headers, so just display the warnin
Hi,
On 28 March 2018 at 20:38, Mario Six wrote:
> Add a cpu_print_info function to the CPU uclass to emulate the behavior
> of some current non-DM drivers (e.g. MPC83xx) to print CPU information
> during startup.
>
> Signed-off-by: Mario Six
> ---
> drivers/cpu/cpu-uclass.c | 10 ++
> i
Hi Mario,
On 28 March 2018 at 20:40, Mario Six wrote:
> Add test infrastructure and tests for the AXI uclass.
>
> Signed-off-by: Mario Six
> ---
> drivers/axi/Kconfig | 6 +++
> drivers/axi/Makefile | 3 ++
> drivers/axi/axi-emul-uclass.c | 68
>
On 24 March 2018 at 04:12, Heinrich Schuchardt wrote:
> According to the documentation the EFI log category is called LOGC_EFI.
> All other categories start with LOGC_. So let's fix it.
>
> Fixes: 1973b381a1b3 ("log: add category LOGC_EFI")
> Signed-off-by: Heinrich Schuchardt
> ---
> include/lo
On 28 March 2018 at 20:40, Mario Six wrote:
> Add test AXI drivers to the sandbox.
>
> Signed-off-by: Mario Six
> ---
> arch/sandbox/dts/sandbox.dts | 11 +++
> arch/sandbox/dts/test.dts| 11 +++
> configs/sandbox_defconfig| 3 +++
> 3 files changed, 25 insertions(+)
Re
Hi Heinrich,
On 24 March 2018 at 21:41, Heinrich Schuchardt wrote:
> Hello Simon,
>
> in patch
> db9391e165dd ("net: Move driver-model code into its own file")
> function eth_write_hwaddr hides() you chose to introduce the follwing lines:
>
> static int eth_write_hwaddr(struct udevice *dev)
> ...
On 23 March 2018 at 05:53, Sjoerd Simons wrote:
> Use CONFIG_IS_ENABLED to see if CONFIG_BLK is enabled. Otherwise
> SPL compilation breaks on boards which do have CONFIG_BLK enabled but
> not DM_MMC for the SPL as follows:
>
> env/mmc.c: In function ‘init_mmc_for_env’:
> env/mmc.c:164:6: warning:
Hi Mario,
On 28 March 2018 at 20:40, Mario Six wrote:
> Add a power_on function to the display uclass to allow devices to be
> probed and powered-on separately.
Is this different from the 'enable' method?
Also note that we have a panel uclass that might be useful.
>
> Signed-off-by: Mario Six
Hi Mario,
On 28 March 2018 at 20:38, Mario Six wrote:
> A lot of times one wants to cycle through the devices in a uclass, but
> only certain ones, especially ones identified by their compatibility
> string, and ignore all others (in the best case this procedure should
> not even activate the dev
Hi Mario,
On 28 March 2018 at 20:40, Mario Six wrote:
> Add a uclass for AXI (Advanced eXtensible Interface) busses, and a
> driver for the gdsys IHS AXI bus on IHS FPGAs.
>
> Signed-off-by: Mario Six
> ---
> drivers/Kconfig | 2 +
> drivers/Makefile | 1 +
> drivers/axi/Kc
Hi Mario,
On 28 March 2018 at 20:40, Mario Six wrote:
> Add a driver for the Xilinx LogiCORE DisplayPort IP core.
>
> Signed-off-by: Mario Six
> ---
> drivers/video/Kconfig|8 +
> drivers/video/Makefile |1 +
> drivers/video/logicore_dp_dpcd.h | 342 ++
Hi Neil,
On 30 March 2018 at 15:53, Neil Armstrong wrote:
> On 30/03/2018 00:41, Simon Glass wrote:
>> Hi Neil,
>>
>> On 29 March 2018 at 16:42, Neil Armstrong wrote:
>>> Hi Beniamino,
>>>
>>> On 03/12/2017 10:17, Beniamino Galvani wrote:
Introduce a basic clock driver for Amlogic Meson SoC
Hi Mario,
On 28 March 2018 at 20:38, Mario Six wrote:
> Add generic enable/disable functions to the misc uclass.
>
> Signed-off-by: Mario Six
> ---
> drivers/misc/misc-uclass.c | 20
> include/misc.h | 30 ++
> 2 files changed, 50 ins
Hi Jean-Jacques,
On 26 March 2018 at 21:50, Jean-Jacques Hiblot wrote:
> syscon_regmap_lookup_by_phandle() can be used to the regmap of a syscon
used to ... the
> device from a reference in the DTS. It operates similarly to the linux
> version of the namesake function.
>
> Signed-off-by: Jean-J
Hi Mario,
On 28 March 2018 at 20:36, Mario Six wrote:
> Add a device information driver for the upcoming gdsys Gazerbeam board.
>
> Signed-off-by: Mario Six
> ---
> drivers/devinfo/gazerbeam.c | 151
>
> drivers/devinfo/gazerbeam.h | 17 +
> 2
Hi Mario,
On 28 March 2018 at 20:37, Mario Six wrote:
> The FPGA (as a device) and the register map supplied by a FPGA are two
> different entities. There are U-Boot drivers for the former, but not for
> the later.
>
> Add a uclass that makes it possible to read from and write to FPGA
> memory ma
Hi Mario,
On 28 March 2018 at 20:36, Mario Six wrote:
> Some boards have encoded information, e.g. hard-wired GPIOs on a GPIO
> expander, read-only memory ICs, etc. that carry information about the
> hardware.
>
> Add a uclass that encapsulates device information of such a kind and
> makes them a
On 26 March 2018 at 22:31, Michal Simek wrote:
> SPL ATF implementation requires FIT image with partitions where the one
> is Firmware/ATF and another one Firmware/U-Boot. OS field is used for
> recording that difference that's why make sense to show values there for
> Firmware types.
>
> For exam
On 26 March 2018 at 22:31, Michal Simek wrote:
> SPL ATF support requires to have firmware property which should be also
> listed by mkimage -l when images is created.
>
> The patch is also using this macro in spl_fit to match keyword.
>
> When image is created:
> Default Configuration: 'config'
Commit 253c60a breaks the exit value of 'mkimage -T rkimage'
and print the following error:
mkimage: Can't print header for Rockchip Boot Image support: Success
It is not a failure to not print headers, so just display the warning message,
and finish the function properly.
Signed-off-by: Guill
Hi Tom,
The following changes since commit 81cf7c8d45935a295991fe2cd1df286f0f47511f:
Merge git://git.denx.de/u-boot-ubi (2018-03-25 12:02:13 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git
for you to fetch changes up to 5d73292cf84db1e8f7d99dd27100ef2e8ac15c
On Tue, Mar 27, 2018 at 9:06 AM, Ivan Gorinov wrote:
> On x86 platforms, U-Boot does not pass Device Tree data to the kernel.
> This prevents the kernel from using FDT loaded by U-Boot.
>
> Read the working FDT address from the "fdtaddr" environment variable
> and add a copy of the FDT data to the
Hi Alex,
On Thu, Feb 15, 2018 at 11:03 PM, Alexander Graf wrote:
>
>
> On 12.02.18 07:26, Bin Meng wrote:
>> Hi Alexander,
>>
>> On Tue, Dec 5, 2017 at 7:20 AM, Bin Meng wrote:
>>> On Mon, Dec 4, 2017 at 11:33 PM, Alexander Graf wrote:
The get_codeseg32() wants to know if a passed in descr
On 30/03/2018 00:41, Simon Glass wrote:
> Hi Neil,
>
> On 29 March 2018 at 16:42, Neil Armstrong wrote:
>> Hi Beniamino,
>>
>> On 03/12/2017 10:17, Beniamino Galvani wrote:
>>> Introduce a basic clock driver for Amlogic Meson SoCs which supports
>>> enabling/disabling clock gates and getting thei
Hi Joe,
On Thu, Mar 29, 2018 at 2:17 AM, Joe Hershberger wrote:
> On Sun, Mar 25, 2018 at 8:40 PM, Bin Meng wrote:
>> Hi Joe,
>>
>> On Sat, Mar 24, 2018 at 1:11 AM, Joe Hershberger
>> wrote:
>>> On Thu, Mar 22, 2018 at 9:46 AM, Bin Meng wrote:
Hi,
On Fri, Feb 2, 2018 at 9:53 PM
On Tue, Mar 27, 2018 at 9:58 AM, Bin Meng wrote:
> On Tue, Mar 27, 2018 at 9:06 AM, Ivan Gorinov wrote:
>> On x86 platforms, U-Boot does not pass Device Tree data to the kernel.
>> This prevents the kernel from using FDT loaded by U-Boot.
>>
>> Read the working FDT address from the "fdtaddr" envi
On Mon, Mar 19, 2018 at 11:43 AM, Bin Meng wrote:
> On Thu, Feb 15, 2018 at 4:09 PM, Bernhard Messerklinger
> wrote:
>> Use dm_pci_map_bar function for BAR mapping. This has the advantage
>> of clearing BAR flags and and only accepting mapped memory.
>>
>> Signed-off-by: Bernhard Messerklinger
>
On Fri, Mar 30, 2018 at 6:43 AM, Simon Glass wrote:
> On 27 March 2018 at 15:46, Bin Meng wrote:
>> It makes no sense to set a PCI region that has 0 size.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> drivers/pci/pci-uclass.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> Review
On Fri, Mar 30, 2018 at 6:43 AM, Simon Glass wrote:
> On 27 March 2018 at 15:46, Bin Meng wrote:
>> PCI enumeration may happen very early on an x86 board. The board
>> information pointer should have been checked in decode_regions()
>> as its space may not be allocated yet.
>>
>> With this commit
Similarly to ARMV7, on ARMV7M instruction cache memory needs
to be disabled before running linux kernel to avoid kernel to
be stuck.
Signed-off-by: Patrice Chotard
---
arch/arm/cpu/armv7m/cpu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/cpu/armv7m/cpu.c b/arch/arm/cpu/armv7
Hi Tom,
Please pull the following patch from u-boot-riscv into your tree.
Thanks!
The following changes since commit 81cf7c8d45935a295991fe2cd1df286f0f47511f:
Merge git://git.denx.de/u-boot-ubi (2018-03-25 12:02:13 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot-
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