Hi,
On Mon, 21 Aug 2017 21:53:41 -0700 Bin Meng wrote:
> There are already two macros LBAF and LBAFU to aid formatted print
> with lbaint_t variables. Now let's add another one LBAFD and use it
> in the common block command codes.
>
> Signed-off-by: Bin Meng
> ---
>
> cmd/blk_common.c | 10 +++
Hi Stefan,
On Tue, Aug 22, 2017 at 2:19 PM, Stefan Roese wrote:
> On 22.08.2017 05:46, Bin Meng wrote:
>>
>> All these places seem to inherit the codes from the MMC driver where
>> a FIXME was put in the comment. However the correct operation after
>> read should be cache invalidate, not flush.
>
Signed-off-by: Masahiro Yamada
---
doc/uImage.FIT/signature.txt | 10 +-
doc/uImage.FIT/verified-boot.txt | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
index 7cdb7bf324c1..a57cdab33956 100644
--- a/
On 22.08.2017 05:46, Bin Meng wrote:
All these places seem to inherit the codes from the MMC driver where
a FIXME was put in the comment. However the correct operation after
read should be cache invalidate, not flush.
The underlying drivers should be responsible for the cache operation.
Remove t
There are already two macros LBAF and LBAFU to aid formatted print
with lbaint_t variables. Now let's add another one LBAFD and use it
in the common block command codes.
Signed-off-by: Bin Meng
---
cmd/blk_common.c | 10 --
include/blk.h| 1 +
2 files changed, 5 insertions(+), 6 de
All these places seem to inherit the codes from the MMC driver where
a FIXME was put in the comment. However the correct operation after
read should be cache invalidate, not flush.
The underlying drivers should be responsible for the cache operation.
Remove these codes completely.
Signed-off-by:
Greetings,
I'm trying to get uboot 2017.7 working on my odroidc2 board.
I have a image without uboot, I've compiled uboot with the correct defconfig.
the image has two partitions, boot (fat32) and root (ext4), I've followed the
howto in the readme file, generated and burnt the needed files into t
Pawel,
> On 21 Aug 2017, at 17:46, Bin Meng wrote:
>
> Hi,
>
> On Thu, Aug 17, 2017 at 9:11 PM, =?UTF-8?q?Pawe=C5=82=20Jarosz?=
> wrote:
>> This patch serie adds support for Rockchip RK3066 processor.
>>
>> Paweł Jarosz (19):
>> rockchip: rk3066: add grf header file
>> rockchip: rk3066: add
On Mon, Aug 21, 2017 at 05:25:40PM +0200, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20170819011542.GE17193@bill-the-cat> you wrote:
> >
> > For all of the dts/dtsi files that we copy in-place from Linux,
> > converting them to SPDX tags would be churn that has to be kept in-place
> > every
Hi,
> -Original Message-
> From: Dr. Philipp Tomsich [mailto:philipp.toms...@theobroma-systems.com]
> Sent: Monday, August 21, 2017 3:17 AM
> To: Vikas MANOCHA
> Cc: U-Boot Mailing List ; Alexandru Gagniuc
> ; Kever Yang ;
> Simon Glass ; Stefan Agner
> Subject: Re: [PATCH] spl: fix usa
> On 18 Aug 2017, at 20:14, Paweł Jarosz wrote:
>
> Hi,
>
>
> W dniu 18.08.2017 o 14:45, Philipp Tomsich pisze:
>>
>>
>> On Thu, 17 Aug 2017, Paweł Jarosz wrote:
>>
>>> Add basic Rockchip nand driver.
>>>
>>> Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability and 8
>>> b
I shouldn't take this patch without Jagan's ack.
York
On 08/21/2017 05:03 AM, Suresh Gupta wrote:
> Hi York,
>
> Can I delegate this patch to you? Delegate to Jagan (SPI Maintainer) delays
> the acceptance process.
>
> Thanks
> SuresH
>
>> -Original Message-
>> From: Suresh Gupta [mai
Hi,
On Thu, Aug 17, 2017 at 9:11 PM, =?UTF-8?q?Pawe=C5=82=20Jarosz?=
wrote:
> This patch serie adds support for Rockchip RK3066 processor.
>
> Paweł Jarosz (19):
> rockchip: rk3066: add grf header file
> rockchip: rk3066: add rk3066 pinctrl driver
> rockchip: rk3066: add sysreset driver
>
Dear Tom,
In message <20170819011542.GE17193@bill-the-cat> you wrote:
>
> For all of the dts/dtsi files that we copy in-place from Linux,
> converting them to SPDX tags would be churn that has to be kept in-place
> every update, and upstream does not want them (I had a chat with Frank
> or Rob at
On Mon, Aug 21, 2017 at 3:56 PM, Suresh Gupta wrote:
> It is recommended to check either controller is free to take
> new spi action. The IP_ACC and AHB_ACC bits indicates that
> the controller is busy in IP or AHB mode respectively.
> And the BUSY bit indicates that the controller is currently
>
> Sometimes it's helpful to know the reset reason caused in the SoC.
> Add reset reason detection for the RK3288 SoC.
> This will set an environment variable which represents the reset reason.
>
> Signed-off-by: Wadim Egorov
> Acked-by: Philipp Tomsich
> Reviewed-by: Philipp Tomsich
> ---
> Cha
> Read SoM information from EEPROM and set ethaddr in late init.
>
> Signed-off-by: Wadim Egorov
> Acked-by: Philipp Tomsich
> Reviewed-by: Philipp Tomsich
> ---
> Changes in v3:
> - Rebased to current master. Renamed eth_setenv_enetaddr()
> ---
> board/phytec/phycore_rk3288/phycore-rk3288.c |
Since we support ATF in SPL and add script for it, let's make the
document up to date.
Signed-off-by: Kever Yang
Acked-by: Philipp Tomsich
---
Changes in v2:
- typo fix, evb-firefly－>firefly-rk3399
board/rockchip/evb_rk3399/README | 79
1 file changed,
Enable SPL_FIT_GENERATOR with path for it.
With this patch you can get u-boot.itb for rk3399-firefly with:
> make u-boot.itb
Signed-off-by: Kever Yang
Reviewed-by: Mark Kettenis
Tested-by: Mark Kettenis
---
Changes in v2:
- typo fix, rk3399-evb->rk3399-firefly
configs/firefly-rk3399_defconfi
Add a script to generate binaries from bl31.elf, and generate
u-boot.its file for FIT image including u-boot, dtb and atf binaries.
Signed-off-by: Kever Yang
Reviewed-by: Mark Kettenis
Tested-by: Mark Kettenis
---
Changes in v2: None
board/rockchip/evb_rk3399/mk_fit_atf.sh | 110
> Read SoM information from EEPROM and set ethaddr in late init.
>
> Signed-off-by: Wadim Egorov
> ---
> Changes in v3:
> - Rebased to current master. Renamed eth_setenv_enetaddr()
> ---
> board/phytec/phycore_rk3288/phycore-rk3288.c | 62
>
> board/phytec/phycore_r
> This patch enables support for the Rockchip RK3066 SD/MMC controller, which
> is based on Designware IP. The device supports SD, SDIO, MMC and eMMC.
>
> Signed-off-by: PaweÅ Jarosz
> Reviewed-by: Jaehoon Chung
> ---
> Changes since v1:
> - dropped OF_PLATDATA
>
> Changes since v2:
> - none
> Sometimes it's helpful to know the reset reason caused in the SoC.
> Add reset reason detection for the RK3288 SoC.
> This will set an environment variable which represents the reset reason.
>
> Signed-off-by: Wadim Egorov
> ---
> Changes in v4:
> - Factore out env_set()
> - Use BIT/GENMASK for
> Sometimes it's helpful to know the reset reason caused in the SoC.
> Add reset reason detection for the RK3288 SoC.
> This will set an environment variable which represents the reset reason.
>
> Signed-off-by: Wadim Egorov
> ---
> Changes in v4:
> - Factore out env_set()
> - Use BIT/GENMASK for
> Read SoM information from EEPROM and set ethaddr in late init.
>
> Signed-off-by: Wadim Egorov
> ---
> Changes in v3:
> - Rebased to current master. Renamed eth_setenv_enetaddr()
> ---
> board/phytec/phycore_rk3288/phycore-rk3288.c | 62
>
> board/phytec/phycore_r
> dw_mmc supports two transfer modes in u-boot: idma and fifo.
> This patch adds autodetection of transfer mode and eliminates setting this in
> host config struct
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
> This patch allows building of nand_bbt, nand_ids, nand_util for nand drivers
> that need it.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> drivers/mtd/nand/Makefile | 3 +++
> 1 file changed, 3 insertio
> In current state dfu depends on cmd/mtdparts.c which isn't build in SPL.
> This patch resolves it by cutting out unwanted code in SPL build.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - removed unneded space
>
>
> Use live tree functions to fill dwc2_plat_otg_data structure in
> board_usb_init.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> arch/arm/mach-rockchip/rk3066-board.c | 52
> +---
> Since we support ATF in SPL and add script for it, let's make the
> document up to date.
>
> Signed-off-by: Kever Yang
> ---
>
> board/rockchip/evb_rk3399/README | 79
>
> 1 file changed, 63 insertions(+), 16 deletions(-)
>
Acked-by: Philipp Tomsich
Hi York,
Can I delegate this patch to you? Delegate to Jagan (SPI Maintainer) delays the
acceptance process.
Thanks
SuresH
> -Original Message-
> From: Suresh Gupta [mailto:suresh.gu...@nxp.com]
> Sent: Monday, August 21, 2017 3:56 PM
> To: u-boot@lists.denx.de
> Cc: York Sun ; ja...
> rk3xxx.dtsi is used by rk3188 and rk3066. rk3188 uses alocated data in spl
> but rk3066 needs it in tpl.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> arch/arm/dts/rk3xxx.dtsi | 8
> 1 file cha
> Sysreset drivers for rk3066 and rk3188 contain common elements which can be
> reused.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> .../include/asm/arch-rockchip/sysreset_common.h| 20 +++
>
> The Rockchip boot ROM requires a particular file format for booting from NAND:
>
> * It starts with 512-byte, rc4 encoded header and is aligned to nand page size
>
> * Then first 2KB of first stage loader (tpl) aligned to nand page size
> * n empty pages
>
> * second 2KB of first stage loader
> Add basic Rockchip nand driver.
>
> Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability and 8
> bit asynchronous flash interface support. Other features will come later.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - fixed corre
> Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB
> write size and 40 bit ecc support
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> drivers/mtd/nand/nand_ids.c | 3 +++
> 1 file
> fdtdec.h is included, but not used in rk3399-board-spl.c: remove the
> '#include'-statement.
>
> Signed-off-by: Philipp Tomsich
> Acked-by: Philipp Tomsich
> ---
>
> arch/arm/mach-rockchip/rk3399-board-spl.c | 1 -
> 1 file changed, 1 deletion(-)
>
Acked-by: Philipp Tomsich
__
Sometimes it's helpful to know the reset reason caused in the SoC.
Add reset reason detection for the RK3288 SoC.
This will set an environment variable which represents the reset reason.
Signed-off-by: Wadim Egorov
---
Changes in v4:
- Factore out env_set()
- Use BIT/GENMASK for CRU_GLB_RST_ST re
It is recommended to check either controller is free to take
new spi action. The IP_ACC and AHB_ACC bits indicates that
the controller is busy in IP or AHB mode respectively.
And the BUSY bit indicates that the controller is currently
busy handling a transaction to an external flash device
Signed-
Vikas,
thanks for reporting this.
Fortunately, a fix has already been merged by Tom as
commit b5c4d81b3507b3abb239ea8323515fce09dc378f
Best,
Philipp.
> On 20 Aug 2017, at 19:45, Vikas Manocha wrote:
>
> Signed-off-by: Vikas Manocha
> ---
> common/spl/Makefile | 6 +++---
> 1 file chan
Hi Tom,
please pull this one mvebu fix from Chris.
Thanks,
Stefan
The following changes since commit 2d7cb5b426e7e0cdf684d7f8029ad132d7a8d383:
env: Replace all open-coded gd->env_valid values with ENV_ flags (2017-08-20
19:27:44 -0400)
are available in the git repository at:
git://www.d
On 17.08.2017 13:46, Stefan Roese wrote:
On 17.08.2017 12:27, Chris Packham wrote:
The db-88f6820-amc has four chips with 2Gb density giving a total of 1GB
DRAM. Update the board_topology_map to reflect the correct
configuration.
Signed-off-by: Chris Packham
---
When I setup this board I misin
The following changes since commit 2d7cb5b426e7e0cdf684d7f8029ad132d7a8d383:
env: Replace all open-coded gd->env_valid values with ENV_ flags
(2017-08-20 19:27:44 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-usb.git master
for you to fetch changes up to 5bf4475f1d
> -Original Message-
> From: Poonam Aggrwal
> Sent: Friday, August 18, 2017 4:17 PM
> To: Prabhakar Kushwaha ; Santan Kumar
> ; u-boot@lists.denx.de; York Sun
>
> Cc: Priyanka Jain
> Subject: RE: [U-Boot] [PATCH 1/1] board/ls2080ardb: Remove
> CONFIG_DISPLAY_BOARDINFO_LATE
>
>
>
> --
On 08/21/2017 11:16 AM, Łukasz Majewski wrote:
> Dear Marek,
Hi,
> The following changes since commit
> 5b70b1688cdf677563096063e4a48e4bed250a10:
Pulled, thanks.
--
Best regards,
Marek Vasut
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.d
Dear Marek,
The following changes since commit 5b70b1688cdf677563096063e4a48e4bed250a10:
usb: ehci: Convert CONFIG_USB_EHCI_PCI to Kconfig (2017-08-09
10:50:08 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-dfu.git/master
for you to fetch changes up to b14b19e1a
On Sun, 2017-08-20 at 04:33 -0700, Bin Meng wrote:
> These options should not be exposed to other platforms.
>
Fair enough.
Thanks for taking care of this!
Acked-by: Andy Shevchenko
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/tangier/Kconfig | 4
> 1 file changed, 4 insertions(+)
On Sun, Aug 20, 2017 at 6:41 PM, Tom Rini wrote:
> With the change to the environment code to remove the common init stage
> of pointing to the default environment and setting it as valid, combined
> with the change to switch gd->env_valid from 0/1/2 to an enum we now
> must set env_valid to one o
Read SoM information from EEPROM and set ethaddr in late init.
Signed-off-by: Wadim Egorov
---
Changes in v3:
- Rebased to current master. Renamed eth_setenv_enetaddr()
---
board/phytec/phycore_rk3288/phycore-rk3288.c | 62
board/phytec/phycore_rk3288/som.h
Am 18.08.2017 um 15:06 schrieb Philipp Tomsich:
>
>
> On Thu, 3 Aug 2017, Wadim Egorov wrote:
>
>> The hw can read up to 32 bytes at a time. If we need
>> more than one chunk, we have to enter the plain RX mode.
>
> Why does this need to be in 'plain RX' mode for more than 32 bytes?
I am not sur
On 08/08/2017 06:18 PM, Frank Kunz wrote:
> For EFI boot GPT partition table support is needed as well
> as the part command and also the SPL needs to fallback to
> other boot methods after parse the SPL header.
>
> Signed-off-by: Frank Kunz
Applied, thanks
--
Best regards,
Marek Vasut
__
This converts the following to Kconfig:
CONFIG_MVNETA
Signed-off-by: Chris Packham
---
arch/arm/mach-mvebu/include/mach/config.h | 3 ---
configs/clearfog_defconfig| 2 +-
configs/controlcenterdc_defconfig | 2 +-
configs/db-88f6820-amc_defconfig | 2 +-
conf
> Date: Sun, 20 Aug 2017 22:20:13 +0200
> From: Urs Schulz
>
> Hey there,
>
> I have several issues with the newer U-Boot versions on my Banana Pi.
>
> I recently decided to upgrade some of my Banana Pis to the latest
> U-Boot, the last version I had there was 2015.04. Unfortunately the
> upgra
Add support for selecting proper dtb for
dra76x u-boot from FIT.
Signed-off-by: Lokesh Vutla
---
arch/arm/dts/Makefile | 2 +-
board/ti/dra7xx/evm.c | 4 +++-
configs/dra7xx_evm_defconfig| 2 +-
configs/dra7xx_hs_evm_defconfig | 2 +-
4 files changed, 6 insertions(+), 4 d
From: Keerthy
dra76-evm uses lp8736 and tps65917 pmic for powering on
various peripherals. Add data for these pmics and register
for dra76-evm.
Reviewed-by: Tom Rini
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla
---
arch/arm/include/asm/arch-omap5/clock.h | 9 ++
arch/arm/include/a
ldo4 is used to poweron mmc on dra76-evm. Enable it.
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
board/ti/dra7xx/evm.c | 2 ++
include/palmas.h | 4
2 files changed, 6 insertions(+)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index ad63abd759..87b7403070 1006
dra76-evm has the ddr parts connectedi running at 666MHz:
EMIF1: MT41K512M16HA-125 AIT:A x 2
EMIF2: MT41K512M8RH-125-AAT:E x 4
Add support for configuring the above DDR parts.
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-omap2/omap5/hw_data.c | 1 +
arch/arm/mach-omap2/
Adding pinmux and IODELAY data for dra76-evm.
Reviewed-by: Tom Rini
Signed-off-by: Vignesh R
Signed-off-by: Lokesh Vutla
---
board/ti/dra7xx/evm.c | 6 +
board/ti/dra7xx/mux_data.h | 294 +
2 files changed, 300 insertions(+)
diff --git a/boar
Select dtb name for dra76-evm.
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
include/environment/ti/boot.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
index 1c3ae40a99..01f7f7a300 100644
--- a/include/environment/ti
Separate out u-boot specific compatibles from dts files.
This will help in syncing dts files in future.
Also these will get deleted eventually once respective drivers
are capable of handling Linux dts files.
Signed-off-by: Lokesh Vutla
---
arch/arm/dts/dra71-evm-u-boot.dtsi | 23 +++
LP87565 is present on dra76-evm. Select it for
TARGET_DRA7XX_EVM.
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-omap2/omap5/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-omap2/omap5/Kconfig
b/arch/arm/mach-omap2/omap5/Kconfig
index 30a9ff9c7b..8f58235baf 100644
-
The dra76-evm is a board based on TI's DRA76 processor
Add eeprom support
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
board/ti/dra7xx/evm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 1c0a1eb052..ee6d5251d5 100644
--- a/
From: Praneeth Bajjuri
dra76 family is a high-performance, infotainment application
device, based on OMAP architecture on a 28-nm technology.
This contains most of the subsystems, peripherals that are
available on dra74, dra72 family. This SoC mainly features
Subsystems:
- 2 x Cortex-A15 with max
It is not necessary all omap5+ based uses the same PMIC
to poweron mmc. So add support for enabling mmc based on board.
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
arch/arm/include/asm/omap_mmc.h| 1 +
arch/arm/mach-omap2/omap5/hwinit.c | 16 ++--
board/ti/dra7xx/evm.
It is not necessary that ldo1 is used to power on mmc.
So, add support for passing ldo registers for powering on mmc.
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-omap2/omap5/hwinit.c | 2 +-
board/ti/dra7xx/evm.c | 2 +-
drivers/power/palmas.c
dra76 family is a high-performance, infotainment application
device, based on OMAP architecture on a 28-nm technology.
This contains most of the subsystems, peripherals that are
available on dra74, dra72 family. This SoC mainly features
Subsystems:
- 2 x Cortex-A15 with max speed of 1.8GHz
- 2 X DS
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