Hi Simon,
On 2017/4/10 3:28, Simon Glass wrote:
+Tom
Hi,
On 7 April 2017 at 01:28, Yang, Wenyou wrote:
Hi Andreas,
Could you help find a time to take these patch series?
They are here for a long time.
Tom might be able to take it, or if not I could bring it in via DM I
suppose, since it
Fixes the following problem:
zynq-uboot> run dfu_ram
Setting bus to 1
g_dnl_register: failed!, error: -19
The cause appears to be that the USB framework is looking for a usbotg aliases,
so add the alias to point to our USB device.
Signed-off-by: Mike Looijmans
---
arch/arm/dts/zynq-topic-miami.
Add support for %p, %pa[p], %pM, %pm and %pI4 formats to tiny-printf.
%pM and %pI4 are widely used by SPL networking stack and is required if
networking support is desired in SPL.
%p, %pa and %pap are mostly used by debug prints and hence supported
only when DEBUG is enabled.
Before this patch:
$
Dear all,
I am very very sorry. Because I used patman tool to send the
patches , which use "send-email" by default.
but "send-email" combine “263.com smtp server” will always
encounter problem. Ｉｔ‘ｓ show as that when the
patch's quantity more than 3, patches can not be send com
Sync with Linux commit ad0376eb1483b ("Merge tag 'edac_for_4.11_2'").
Signed-off-by: Peng Fan
Cc: Tom Rini
---
V2:
Use `./tools/buildman/buildman -v` to do the build,
the following 3 build fails, but not related to this patch.
x86: + qemu-x86_64
x86: + qemu-x86_efi_payload64
x86: + ch
Hello Eric,
Am 08.04.2017 um 14:22 schrieb Eric Gao:
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
Signed-off-by: Eric Gao
Why you have 2 "Signed-off-by" lines?
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Friday, April 07, 2017 9:41 PM
> To: Sumit Garg ; u-boot@lists.denx.de
> Cc: Ruchika Gupta ; Prabhakar Kushwaha
> ; Vini Pillai ; Udit
> Agarwal
> Subject: Re: [PATCH 2/3] fsl-ppa: Kconfig: Support to load PPA hdr from
hi all,
I hit an issue about clk_get_by_name w/ fdt.
I wanna get a specified clock cell from dts via clk_get_by_name. eg:
clk_get_by_name(, "ciu-sample",..) from 'emmc: dwmmc@ff0f' on rk3288
platform which it has four clock cell: "biu", "ciu", "ciu_drv",
"ciu_sample".
I found that the clock
Enable mipi dsi by default for rk3399-evb board
Signed-off-by: Eric Gao
---
configs/evb-rk3399_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index aac6d2d..f41cbf9 100644
--- a/configs/evb-rk3399_defconfig
+++ b/c
Add dts config for mipi display, include vop,
mipi controller, panel, backlight.And Enable rk808
for lcd_3v3 in another patch.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399-evb.dts | 84 +
arch/arm/dts/rk3399.dtsi| 72 +++
Add mipi dsi driver for rk chip, To enable this
you need to enable DM, DM_VIDEO, DM_ROCKCHIP_VIDEO,
DISPLAY_MIPI in menuconfig. And enable rk808,and it's
corresponding i2c.
Signed-off-by: Eric Gao
---
arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 +
arch/arm/include/asm/arch-rockchip/g
For using mipi display, we need to enable lcd3v3
which supplied by rk808,so enable rk808 first.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399-evb.dts | 39 +++
configs/evb-rk3399_defconfig | 5 +
2 files changed, 44 insertions(+)
diff --git a/arch/ar
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files
This serials patches add mipi dsi support for rk3399. Except the
basic mipi driver, we need also enable pmic rk808 for lcd power and
enable i2c for rk808 communication. what's more, the needed clk and
pwm for backlight is init in spl stage, make sure spl work first.
Eric Gao (5):
rockchip:
Hi Simon,
On 04/10/2017 03:28 AM, Simon Glass wrote:
Hi Kever,
On 7 April 2017 at 04:35, Kever Yang wrote:
Need to enablt CONFIG_OF_EMBED if we use separate uboot and dtb
in FIT image for SPL loading.
Can you please explain that a bit more? We shouldn't OF_EMBED in
production code, only fo
Hi Tom,
The following changes since commit 04735a8fc45ba7c9f5b17d4837a0c649087b29e1:
Merge branch 'master' of git://git.denx.de/u-boot-samsung
(2017-04-08 10:20:26 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git
for you to fetch changes up to ca0d29e4f06095f
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files
This serials patches add mipi dsi support for rk3399. Except the
basic mipi driver, we need also enable pmic rk808 for lcd power and
enable i2c for rk808 communication. what's more, the needed clk and
pwm for backlight is init in spl stage, make sure spl work first.
Eric Gao (5):
rockchip:
On Thu, Apr 6, 2017 at 11:44 AM, Simon Glass wrote:
> Hi Andy,
>
> On 1 April 2017 at 07:21, Andy Shevchenko
> wrote:
>> This simple PMU driver allows to tyrn power on and off for selected
>> devices. In particularly Intel Tangier needs to power on SDHCI
>> controllers in order to access to them
On Sat, Apr 1, 2017 at 12:22 PM, Simon Glass wrote:
> +Bin
>
> Hi,
>
> On 26 March 2017 at 05:48, Andy Shevchenko
> wrote:
>> On Mon, 2017-03-13 at 16:09 +0200, Andy Shevchenko wrote:
>>> On Fri, Mar 3, 2017 at 12:31 PM, Kever Yang >> > wrote:
>>> > On 02/28/2017 08:04 PM, Andy Shevchenko wrote:
After enable log printing to lcd,when
the screen start scroll,system crash,
log is shown as bellow.
"Synchronous Abort" handler, esr 0x9645
"Synchronous Abort" handler, esr 0x9645
Checking the source code, we found that the
variate "pixels" get a wrong value.
int pixels = VIDEO_FONT_HEIG
On Thu, Apr 6, 2017 at 11:44 AM, Simon Glass wrote:
> Hi Andy,
>
> On 1 April 2017 at 07:21, Andy Shevchenko
> wrote:
>> From: Felipe Balbi
>>
>> Intel MID platforms have few microcontrollers inside SoC, one of them
>> is so called System Controller Unit (SCU).
>>
>> Here is the driver to commun
On Mon, Apr 10, 2017 at 3:27 AM, Simon Glass wrote:
> On 4 April 2017 at 22:17, Bin Meng wrote:
>> With recent changes, some x86-specific rom tests of binman fail to
>> run. Fix it by adding missing filenames in corresponding entries.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> tools/binman/test
when enable PMIC rk808,the system will halt at very
early stage,log is shown as bellow.
INFO:plat_rockchip_pmu_init(1211): pd status 3e
INFO:BL31: Initializing runtime services
INFO:BL31: Preparing for EL3 exit to normal world
INFO:Entry point address = 0x20
INFO:SPSR = 0x
On 2017-04-09, Andreas Färber wrote:
> From: Joel Stanley
>
> Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set
> CONFIG_SYS_TEXT_BASE=0 with the following error:
>
> LD u-boot
> arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try
> linking with -
This is not to be applied. It is needed to test using CONFIG_DM_MMC on x86
since SCSI is broken with this setup.
Signed-off-by: Simon Glass
---
include/configs/x86-common.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/configs/x86-common.h b/include/configs/x
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.
Signed-off-by: Simon Glass
---
arch/Kconfig | 1 +
arch/x86/cpu/baytrail/valleyview.c | 12 --
arch/x86/cpu/quark/quark.c | 10 -
arch/x86/cpu/queensbay/Makefile|
This serial converts x86 boards to use MMC for driver model. It has to
disable SCSI to make this work, for now. Once SCSI is sorted out, we can
apply the patch.
Simon Glass (2):
WIP: Disable SCSI on x86
x86: Convert MMC to driver model
arch/Kconfig | 1 +
arch/x86/cpu
On Sun, Apr 9, 2017 at 4:12 PM, Jagan Teki wrote:
> Bcz we need to define dtb through CONFIG_DEFAULT_DEVICE_TREE
Having 3 defconfigs for SPL is not good. Looks like a step in the
opposite direction.
Can this limitation be changed?
___
U-Boot mailing l
On Fri, Apr 07, 2017 at 10:11:26AM -0500, Andrew F. Davis wrote:
> Add a new defconfig file for the AM335x High Security EVM. This config
> is specific for the case of UART booting
>
> Signed-off-by: Andrew F. Davis
Please note that with gcc-4.9 and gcc-5.x this does not link, only with
gcc-6.x
Hi,
Dne nedelja, 09. april 2017 ob 21:28:47 CEST je Simon Glass napisal(a):
> Hi,
>
> On 28 March 2017 at 16:39, Jernej Skrabec wrote:
> > I2C_EDID currently selects DM_I2C. However, it is not needed. I2C_EDID
> > is used for building edid.c, which doesn't even use I2C bus, and by I2C
> > comman
I am trying to port my OMAP3630 board to use DM_MMC and
OMAP_HSMMC_USE_GPIO without CONFIG_DM_MMC_OPS and with OF support by
porting the OMAP3 device tree and I think there might be an issue with
card detect. I am hoping someone might be able to clarify it for me.
For what it's worth, the card det
Hi Tom,
On 20 March 2017 at 08:27, Tom Rini wrote:
> On Mon, Mar 20, 2017 at 10:58:57AM +0530, Lokesh Vutla wrote:
>> Hi Simon,
>>
>> On Wednesday 15 March 2017 08:13 PM, Simon Glass wrote:
>> > From: Eddie Cai
>> >
>> > At present malloc_base/_limit/_ptr are not initialised in spl_init() when
>
Hi Stefan,
On 6 April 2017 at 07:29, Stefan Roese wrote:
> On my x86 platform I've noticed, that calling dm_uninit() or the new
> function dm_remove_devices_flags() does not remove the desired device at
> all. Debugging showed, that the serial uclass returns -EPERM in
> serial_pre_remove() and th
On 6 April 2017 at 07:29, Stefan Roese wrote:
> This patch adds a call to dm_remove_devices_flags() to
> bootm_announce_and_cleanup() so that drivers that have one of the removal
> flags set (e.g. DM_FLAG_ACTIVE_DMA_REMOVE) in their driver struct, may
> do some last-stage cleanup before the OS is
On 7 April 2017 at 04:38, Heiko Stuebner wrote:
> The warm-reset of rk3188 socs keeps the remap setting as it was, so if
> it was enabled, the cpu would start from address 0x0 of the sram instead
> of address 0x0 of the bootrom, thus making the reset hang.
>
> Therefore make sure the remap is disa
Hi Eric,
On 8 April 2017 at 06:17, Eric Gao wrote:
> From: "eric.gao"
>
> To enable mipi display, we need to enable pmic
> rk808 first for lcd3v3 power,which use i2c0 to
> communicate with soc. So enable i2c0.
>
> Signed-off-by: eric.gao
>
> eric@rock-chips.com
Can you fix up these duplica
On 7 April 2017 at 04:12, Kever Yang wrote:
> The lower address is reserved for ATF, do not use it.
>
> Signed-off-by: Kever Yang
> ---
>
> include/configs/rk3399_common.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Simon Glass
On 7 April 2017 at 05:42, Jean-Jacques Hiblot wrote:
> This is a cosmetic change. target and LUN have kind of the same role in
> this function. One of them was passed as a parameter and the other was
> embedded in a structure. For consistency, pass both of them as parameters.
>
> Signed-off-by: Je
Hi Ken,
On 5 April 2017 at 02:47, Ken Ma wrote:
> Hi Simon
>
> Please see my inline reply, thanks a lot!
>
> Yours,
> Ken
>
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2017年4月1日 12:22
> To: Ken Ma
> Cc: U-Boot Mailing List; Stefan
On 5 April 2017 at 16:19, Heiko Stuebner wrote:
> Somehow 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") moved
> the rock board in between some rk3288 board, probably as a result of
> rebasing.
>
> So move it back to its original position above all rk3288 boards.
>
> Fixes: 43b5c78d8d91 (
Hi,
On 5 April 2017 at 07:24, Ziping Chen wrote:
>
>
> 2017-04-01 12:22 GMT+08:00 Simon Glass :
>>
>> Hi,
>
>
> Hi, Simon
>
> I have seen your version, and I deem your code is more appropriate.
> I'll learn from your code.
That is very kind of you. I'm sorry for the duplication.
Regards,
Simo
Hi,
On 8 November 2016 at 05:10, Raschen Josef wrote:
> Hi,
>
>> From my tests it should be somewhere between these two commits:
>> 1c62d999528da1f052cb4b07cbb540b148c52537OK
>> ceec08f50b66df0c988033842ec057a32658cfe0NOK
>
> I did some more tests and it looks like commit
> 14bed52d276af
On 6 April 2017 at 07:29, Stefan Roese wrote:
> This patch adds a remove function to the Intel ICH SPI driver, that will
> be called upon U-Boot exit, directly before the OS (Linux) is started.
> This function takes care of configuring the BIOS registers in the SPI
> controller (similar to what a
Hi,
On 28 March 2017 at 16:39, Jernej Skrabec wrote:
> I2C_EDID currently selects DM_I2C. However, it is not needed. I2C_EDID
> is used for building edid.c, which doesn't even use I2C bus, and by I2C
> command, which knows how to use DM and old style I2C interface, so it is
> not directly affecte
On 7 April 2017 at 05:42, Jean-Jacques Hiblot wrote:
> We might want to get information about the scsi device without initializing
> the partition.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> common/scsi.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Simon Glass
_
On 5 April 2017 at 16:19, Heiko Stuebner wrote:
> Most Rockchip socs have the ability to either map the bootrom or a sram
> area to the starting address of the cpu by flipping a bit in the GRF.
>
> Newer socs leave this untouched and mapped to the bootrom but the legacy
> loaders on rk3188 and bef
Hi Patrice,
On 3 April 2017 at 03:39, Patrice CHOTARD wrote:
> Hi Simon
>
> On 04/01/2017 06:21 AM, Simon Glass wrote:
>> Hi Patrice,
>>
>> On 23 March 2017 at 03:59, Patrice CHOTARD wrote:
>>> Hi Simon
>>>
>>> On 03/22/2017 02:05 PM, Simon Glass wrote:
Hi,
On 17 March 2017 at 10:
On 8 April 2017 at 03:59, Andreas Fenkart wrote:
> this makes it easier comparable to the double-buffered version
>
> Signed-off-by: Andreas Fenkart
> Reviewed-by: Simon Glass
> ---
> common/env_sf.c | 20 +++-
> 1 file changed, 11 insertions(+), 9 deletions(-)
Reviewed-by: Sim
Hi Tom,
On 4 April 2017 at 13:06, Tom Rini wrote:
> On Tue, Mar 28, 2017 at 11:37:45AM +0530, Lokesh Vutla wrote:
>> + more folks.
>>
>> On Tuesday 28 March 2017 03:14 AM, Nishanth Menon wrote:
>> > Hi,
>> >
>> > we've kind of run into an interesting situation recently, but might be
>> > of inter
Hi,
On 7 April 2017 at 05:42, Jean-Jacques Hiblot wrote:
> With DM_SCSI enabled, blk_create_devicef() is called with blkz = 0, leading
> to a divide-by-0 exception.
> scsi_detect_dev() can be used to get the required parameters (block size
> and number of blocks) from the drive before calling blk
+Tom
Hi,
On 7 April 2017 at 01:28, Yang, Wenyou wrote:
> Hi Andreas,
>
> Could you help find a time to take these patch series?
>
> They are here for a long time.
>
Tom might be able to take it, or if not I could bring it in via DM I
suppose, since it is a conversion.
Regards,
Simon
__
On 8 April 2017 at 03:59, Andreas Fenkart wrote:
> setup_flash_device selects one of two code paths depending on the driver
> model being used (=CONFIG_DM_SPI_FLASH). env_relocate_spec only used
> the non driver-model code path. I'm unsure why, either none of the
> platforms that need relocation u
On 7 April 2017 at 11:09, Philipp Tomsich
wrote:
> The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed.
> This updates the licensing info in the rk3399-puma.dts.
>
> Signed-off-by: Philipp Tomsich
>
> ---
>
> arch/arm/dts/rk3399-puma.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 delet
Hi,
On 7 April 2017 at 05:42, Jean-Jacques Hiblot wrote:
> The PHY framework provides a set of APIs to control a PHY. This API is
> derived from the linux version of the generic PHY framework.
> Currently the API supports init(), deinit(), power_on, power_off() and
> reset(). The framework provid
Hi,
On 7 April 2017 at 05:02, Kever Yang wrote:
> The latest kernel PWM drivers enable the polarity settings. When system
> run from U-Boot to kerenl, if there are differences in polarity set or
> duty cycle, the PMW will re-init:
> close -> set polarity and duty cycle -> enable the PWM.
> The
On 7 April 2017 at 11:13, Philipp Tomsich
wrote:
> From: Klaus Goger
>
> The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
> connector) system-on-module from Theobroma Systems, featuring the
> Rockchip RK3399.
>
> It provides the following feature set:
> * up to 4GB DDR3
> * on-mod
Hi Stefan,
On 6 April 2017 at 07:29, Stefan Roese wrote:
> This new flag can be added to DM device drivers, which need to do some
> final configuration before U-Boot exits and the OS (e.g. Linux) is
> started. The remove functions of those drivers will get called at
> this stage to do these last-
On 5 April 2017 at 09:46, Stefano Babic wrote:
> Not force to use python from PATH. Issue was noted when building with
> Yocto, because python from the distro is always taken instead of
> python-native built during Yocto process.
>
> Signed-off-by: Stefano Babic
> CC: Simon Glass
> ---
> Makefi
Hi Ken,
On 5 April 2017 at 19:32, Ken Ma wrote:
> Hi Stefan
>
> Please see my inline reply, thanks!
>
> Yours,
> Ken
>
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: 2017年4月5日 21:46
> To: Ken Ma; Simon Glass
> Cc: u-boot@lists.denx.de; Michal Simek; Kostya Porotch
On 4 April 2017 at 11:46, Alexandru Gagniuc wrote:
> uclass_find_device_by_seq() prints seq and req_seq when debugging is
> enabled, but this information is not very useful by itself. Add the
> name of he driver to this information. This improves debugging as it
> shows which devices are being con
On 7 April 2017 at 09:00, Andrew F. Davis wrote:
> From: Madan Srinivas
>
> The function 'board_fit_image_post_process' is defined only when the
> config option CONFIG_FIT_IMAGE_POST_PROCESS is enabled. For secure
> systems that do not use SPL but do use FIT kernel images, only
> CONFIG_FIT_IMAGE
On 8 April 2017 at 03:59, Andreas Fenkart wrote:
> simpler to read
>
> Signed-off-by: Andreas Fenkart
> ---
> common/env_sf.c | 18 +-
> 1 file changed, 5 insertions(+), 13 deletions(-)
Reviewed-by: Simon Glass
___
U-Boot mailing list
Hi Eric,
On 6 April 2017 at 00:58, Eric Gao wrote:
> From: "Eric Gao"
>
> when enable PMIC rk808,the system will halt at very
> early stage,log is shown as bellow.
>
> INFO:plat_rockchip_pmu_init(1211): pd status 3e
> INFO:BL31: Initializing runtime services
> INFO:BL31: Preparing f
Hi Kever,
On 7 April 2017 at 04:35, Kever Yang wrote:
> Need to enablt CONFIG_OF_EMBED if we use separate uboot and dtb
> in FIT image for SPL loading.
>
Can you please explain that a bit more? We shouldn't OF_EMBED in
production code, only for debug/test.
> Run make savedefconfig to make the o
Hi Vikas,
On 4 April 2017 at 15:45, Vikas Manocha wrote:
> This patch adds gpio driver supporting driver model for stm32f7 gpio.
>
> Signed-off-by: Vikas Manocha
> cc: Christophe KERELLO
> ---
>
> Changes in v2:
> - included files in correct order.
> - moved the pinctrl specific routine from gp
Hi Ken,
On 5 April 2017 at 02:38, Ken Ma wrote:
> Hi Simon
>
> Please see my inline reply, thanks a lot!
>
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: 2017年4月1日 12:22
> To: Ken Ma
> Cc: U-Boot Mailing List; Stefan Roese; Michal Si
On 7 April 2017 at 05:42, Jean-Jacques Hiblot wrote:
> From: Mugunthan V N
>
> Implement a sata driver for Synopsys DWC sata device based on
> U-boot driver model.
>
> Signed-off-by: Mugunthan V N
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/block/Kconfig| 10 +
> drivers/bloc
On 4 April 2017 at 22:17, Bin Meng wrote:
> With recent changes, some x86-specific rom tests of binman fail to
> run. Fix it by adding missing filenames in corresponding entries.
>
> Signed-off-by: Bin Meng
> ---
>
> tools/binman/test/30_x86-rom-me-no-desc.dts | 1 +
> tools/binman/test/31_x86-r
On 7 April 2017 at 05:42, Jean-Jacques Hiblot wrote:
> This phy is found on omap platforms with sata capabilities.
> Except for the part related to the DM and the PHY framework, the code is
> basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
Hi Heiko,
On 4 April 2017 at 04:43, Heiko Stuebner wrote:
> Am Dienstag, 4. April 2017, 11:34:52 CEST schrieb Heiko Stübner:
>> Am Sonntag, 2. April 2017, 09:50:27 CEST schrieb Simon Glass:
>> > With the rockchip 'rock' board some build and code size problems have come
>> > to light with TPL. Thi
Hi Vignesh,
On 7 April 2017 at 12:12, Vignesh R wrote:
>
>
> On 4/7/2017 8:40 PM, Tom Rini wrote:
>> On Fri, Apr 07, 2017 at 03:20:34PM +0530, Vignesh R wrote:
>>
>>> Add support for %p, %pa[p], %pM, %pm and %pI4 formats to tiny-printf.
>>> %pM and %pI4 are widely used by SPL networking stack and
Hi,
On 2 April 2017 at 05:50, Konstantin Porotchkin wrote:
> Hi, Simon,
>
> On 04/01/2017 07:23 AM, Simon Glass wrote:
>>
>> External Email
>>
>> --
>>
>> Hi Konstanitin,
>>
>> On 30 March 2017 at 07:58, Konstantin Porotchkin
>>
Hi Alex,
On 2 April 2017 at 02:49, Alex Deymo wrote:
> An Android Bootloader must comply with certain boot modes and change
> the kernel command line accordingly. This patch introduces the Android
> boot mode concept which determines whether the device should boot to
> one of the following:
> *
On Sun, Apr 9, 2017 at 6:17 PM, Fabio Estevam wrote:
> Hi Jagan,
>
> On Sun, Apr 9, 2017 at 3:52 AM, Jagan Teki wrote:
>> This series has full possible dts support for SabreSD DualLite,
>> Quad and Quad Plus and DCD code for DualLite has added in SPL code.
>>
>> The main intention of this series
Am 09.04.2017 um 20:04 schrieb Tom Rini:
> On Sun, Apr 09, 2017 at 02:02:56PM -0400, Tom Rini wrote:
>> On Sun, Apr 09, 2017 at 03:33:47PM +0200, Andreas Färber wrote:
>>> Am 09.04.2017 um 15:21 schrieb Andreas Färber:
Hello,
In v2017.03 the firefly-rk3288 target fails to link with o
From: Joel Stanley
Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set
CONFIG_SYS_TEXT_BASE=0 with the following error:
LD u-boot
arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try
linking with -N
arm-linux-gnueabi-ld.bfd: final link failed: Bad v
On Sun, Apr 09, 2017 at 02:02:56PM -0400, Tom Rini wrote:
> On Sun, Apr 09, 2017 at 03:33:47PM +0200, Andreas Färber wrote:
> > Am 09.04.2017 um 15:21 schrieb Andreas Färber:
> > > Hello,
> > >
> > > In v2017.03 the firefly-rk3288 target fails to link with our gcc 6.3.1.
> > > I've tried gcc 7.0.1
On Sun, Apr 09, 2017 at 03:33:47PM +0200, Andreas Färber wrote:
> Am 09.04.2017 um 15:21 schrieb Andreas Färber:
> > Hello,
> >
> > In v2017.03 the firefly-rk3288 target fails to link with our gcc 6.3.1.
> > I've tried gcc 7.0.1 (CC=gcc-7), but no change.
> >
> > [ 99s] LD u-boot
> > [
According to the researching result of Ondrej Jirman, the factor M of
PLL1 shouldn't be used and the factor P should be used only if the
intended frequency is lower than 288MHz. This is proven by the
clk-sun8iw7_tbl.c in the BSP source code -- in there the M value is
always 0 and the maximum freque
Am 09.04.2017 um 15:21 schrieb Andreas Färber:
> Hello,
>
> In v2017.03 the firefly-rk3288 target fails to link with our gcc 6.3.1.
> I've tried gcc 7.0.1 (CC=gcc-7), but no change.
>
> [ 99s] LD u-boot
> [ 99s] ld.bfd: u-boot: Not enough room for program headers, try
> linking with -N
Hello,
In v2017.03 the firefly-rk3288 target fails to link with our gcc 6.3.1.
I've tried gcc 7.0.1 (CC=gcc-7), but no change.
[ 99s] LD u-boot
[ 99s] ld.bfd: u-boot: Not enough room for program headers, try
linking with -N
[ 99s] ld.bfd: final link failed: Bad value
[ 99s] make: *
I am working on porting an OMAP3630 board to support device tree, and
I attempted to change enable DM_MMC. Unfortunately, that broke MMC.
I discovered that the base addresses were originally updated to reflect a
change in the base address when using the device tree for some devices.
This was don
Hi Jagan,
On Sun, Apr 9, 2017 at 3:52 AM, Jagan Teki wrote:
> This series has full possible dts support for SabreSD DualLite,
> Quad and Quad Plus and DCD code for DualLite has added in SPL code.
>
> The main intention of this series is to add the dts node step
> by step and remove the legacy cod
The name of the gpio bank under DM_GPIO appear to be a copy-paste error.
This changes the name of the gpio bank from am33xx_gpios to omap34xx_gpios.
Signed-off-by: Adam Ford
diff --git a/arch/arm/mach-omap2/omap3/board.c
b/arch/arm/mach-omap2/omap3/board.c
index f1436fb..01df579 100644
--- a/ar
From: Jagan Teki
DCD register initialization from mx6dlsabresd.cfg are moved to
SPL code in mx6dl_dcd_table.
Now mx6sabresd SPL code support Dual Lite, Quad, Quad Plus.
mx6dl_dcd_table reginit as
- GPR io regs
- DRAM io regs,
- MMDC Calibration io regs
- dram sdcke0 (0x020e04a4) and sdcke1(0x02
From: Jagan Teki
Now SabreSD board support SPL and non-SPL with devicetree
enabled, so update the README according with images generated
with respective builds.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4:
- Update the dtb-enabled im
From: Jagan Teki
Since SabreSD is supporting fdt, there is no use
of printing the board name explicitly using checkboard
because dtb supported u-boot will print model like this
Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
From: Jagan Teki
Add imx6_pcie_toggle_power on board file using dm_gpio_*
calls for OF_CONTROL configs.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4, v3, v2:
- none
board/freescale/mx6sabresd/mx6sabresd.c | 30 ++
From: Jagan Teki
Enable DM_I2C, DM_PMIC and DM_PMIC_PFUZE100 for dt
supported sabresd config boards:
- imx6q_sabresd_spl_defconfig
- imx6qp_sabresd_spl_defconfig
I2C Log:
=> i2c bus
Bus 0: i2c@021a
Bus 1: i2c@021a4000
08: pfuze100@08, offset len 1, flags 0
Bus 2: i2c@021a8000
- Removed non-fdt code (becuase which has dt support)
- Remove mx6sabresd_spl_defconfig
- Re-arrange the header includes and removed unneeded includes.
- Move the SPL code in #ifdef CONFIG_SPL_BUILD area.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
C
From: Jagan Teki
Moved CONFIG_FEC_MXC from include/configs/mxsabresd.h
to imx6 sabresd and sabreauto defconfigs.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4:
- Move CONFIG_FEC_MXC to mx6[dl|q|qp]sabreauto_defconfig
Changes for v3, v2
From: Jagan Teki
- Give proper tab alignment for display_info_t structure
- Add tab spaces UART_PAD_CTRL and SPI_PAD_CTRL
- Give proper alignment of reg init values on setup_display
- Add space and newline on board_init_f
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by
From: Jagan Teki
Add FEC node for i.MX6QDL Sabresd boards.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4, v3, v2:
- none
arch/arm/dts/imx6qdl-sabresd.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --g
From: Jagan Teki
Add usb otg node for i.MX6QDL sabresd boards.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4, v3, v2:
- none
arch/arm/dts/imx6qdl-sabresd.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git
From: Jagan Teki
Add initial dts support for i.MX6 DualLite Sabresd board.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4:
- none
Changes for v3:
- Newly added
Changes for v2:
- none
arch/arm/dts/Makefile | 1 +
arch/arm/dt
From: Jagan Teki
Enable CONFIG_DM_REGULATOR for i.MX6QDL sabresd boards.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4, v3, v2:
- none
configs/imx6q_sabresd_spl_defconfig | 1 +
configs/imx6qp_sabresd_spl_defconfig | 1 +
2 files ch
From: Jagan Teki
Add usb host node for i.MX6QDL sabresd boards.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4, v3, v2:
- none
arch/arm/dts/imx6qdl-sabresd.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --gi
From: Jagan Teki
Add PMIC pfuze100 node via i2c2 for i.MX6QDL sabresd boards.
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v4, v3, v2:
- none
arch/arm/dts/imx6qdl-sabresd.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/ar
From: Jagan Teki
Add initial dts support for i.MX6 Quad Plus Sabresd board.
Boot from MMC:
-
U-Boot SPL 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29)
Trying to boot from MMC1
U-Boot 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29 +0530)
CPU: Freescale i.MX6QP rev1.0
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