Hi Simon,
On 07/06/2016 08:10 AM, Simon Glass wrote:
> Move zynq to the latest driver model support by enabling CONFIG_DM_MMC,
> CONFIG_DM_MMC_OPS and CONFIG_BLK.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> arch/arm/Kconfig | 5 +
> drivers/mmc/zynq_sdhci.c |
Hi,
On Wed, Jul 6, 2016 at 8:22 AM, Richard Snow wrote:
> Building current source for 4 boards (4 threads, 2 jobs per thread)
>arm: + q8_a33_tablet_800x480
> +{standard input}: Assembler messages:
> +{standard input}:299: Error: push/pop do not support {reglist}^ -- `pop
> {r0,r1,r2,r3
Building current source for 4 boards (4 threads, 2 jobs per thread)
arm: + q8_a33_tablet_800x480
+{standard input}: Assembler messages:
+{standard input}:299: Error: push/pop do not support {reglist}^ -- `pop
{r0,r1,r2,r3,r4,r9,ip,pc}^'
+make[3]: *** [arch/arm/cpu/armv7/sunxi/psci.o] Erro
On Wednesday 06 July 2016 10:26 AM, Vignesh R wrote:
> According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
> DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
> MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
> throughput.
>
> Signed-off-by: Vignesh
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
arch/arm/dts/dra7-evm.dts | 6 ++
K2G SoC has a Cadence QSPI controller to communicate with NOR flash
devices. Add DT nodes to support the same.
Also, K2G EVM has a s25fl512s flash connect to QSPI bus at CS 0. Add nor
flash slave node for the same.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
arch
Instead of relying on CONFIG_SPI_FLASH_QUAD to be defined to enable QUAD
mode, make use of mode_rx field of dm_spi_slave_platdata to determine
whether to enable or disable QUAD mode. This is necessary to support
muliple SPI controllers where one of them may not support QUAD mode.
Signed-off-by: Vi
AHB address can be as long as 32 bit, hence remove the
CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT
and read as u32 value, it anyway does not make sense to mask upper bits.
Signed-off-by: Vignesh R
Tested-by: Marek Vasut
Acked-by: Marek Vasut
Reviewed-by: Jagan Teki
Enable Cadence QSPI controller support to use QSPI on K2G SoC. Also
enable Spansion flash support to access s25fl512s flash present on K2G
QSPI bus.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
configs/k2g_evm_defconfig | 2 ++
include/configs/k2g_evm.h | 6 ++
This series adds support for Cadence QSPI controller present on K2G SoC.
The first patch extends AHB address to 32 bit as K2G has 32 bit AHB
address. Second patch to enable QUAD mode based on DT data instead of
relying on config option. And last to patches add DT node and add
configs to enable th
In case of DT boot, don't read default speed and mode for SPI from
CONFIG_*, instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can be probed at different
bus frequencies and SPI modes.
Signed-off-by: Vignesh R
Reviewed-by: Simon Glass
Reviewed-by: Mugu
Enable SPI and SPI Flash driver model as K2G SPI controller driver
supports driver model.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
---
configs/k2g_evm_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 8efa58c8c43a..
K2G SoC has 4 SPI instances that are compatible with davinci_spi
controller(present on previous generation of Keystone2 devices). Add DT
nodes for the same. K2G EVM has a N25Q128A13 SPI NOR flash connected on
SPI-1. Add DT bindings for the same.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Rev
Enable SPI and SPI Flash driver model as K2L SPI controller driver
supports driver model.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
configs/k2l_evm_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defco
Enable SPI and SPI Flash driver model as K2E SPI controller driver
supports driver model.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
configs/k2e_evm_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defco
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
arch/arm/d
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
arch/arm/d
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
arch/arm/d
Enable SPI and SPI Flash driver model as K2HK SPI controller driver
supports driver model.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
configs/k2hk_evm_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_d
Convert davinci_spi driver so that it complies with SPI DM framework.
Signed-off-by: Vignesh R
Reviewed-by: Simon Glass
Reviewed-by: Jagan Teki
---
drivers/spi/davinci_spi.c | 329 +-
1 file changed, 240 insertions(+), 89 deletions(-)
diff --git a/d
Add aliases for SPI nodes in order for it to be probed by the DM
framework.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
arch/arm/dts/keystone.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/dts/keystone.dtsi b/arch/arm/dts/keystone.dtsi
index
Since Keystone2 devices do not have support DM in SPL, do not define
DM_SPI and DM_SPI_FLASH for SPL build.
Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
---
include/configs/ti_armv7_keystone2.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/ti
This API helps to map physical register addresss pace of device to
virtual address space easily. Its just a wrapper around map_physmem()
with MAP_NOCACHE flag.
Signed-off-by: Vignesh R
Suggested-by: Simon Glass
Reviewed-by: Jagan Teki
Reviewed-by: Simon Glass
---
drivers/core/device.c | 11 ++
This series converts davinci_spi driver to adapt to driver model
framework. And enables the driver on k2l, k2e, k2hk evms. Also,
added support for davinci_spi on k2g evm.
Tested on k2l, k2e, k2hk and k2g evms.
Resend:
Rebased on top of v2016.07-rc3
Vignesh R (12):
dm: core: implement dev_ma
On 2016年07月06日 06:01, Heiko Stuebner wrote:
Am Dienstag, 5. Juli 2016, 10:05:52 schrieb Ziyuan Xu:
From: Xu Ziyuan
So far, Rockchip SoCs have two kinds of USB2.0 phy, like Synopsys and
Innosilicon. This patch applys dwc2 usb driver framework to implement
phy_init and phy_off for Synopsys phy
On Tue, Jul 5, 2016 at 11:55 PM, Stefan Agner wrote:
> On 2016-07-03 20:21, Max Filippov wrote:
>> On Sun, Jul 3, 2016 at 9:53 PM, Stefan Agner wrote:
>>> On 2016-07-02 19:27, Max Filippov wrote:
I'm getting the following build errors when I'm trying to build U-Boot
for a board with UBI
On Sun, Jul 3, 2016 at 5:05 PM, Hans de Goede wrote:
> Hi,
>
> On 03-07-16 02:35, Chen-Yu Tsai wrote:
>>
>> Hi,
>>
>> On Sat, Jul 2, 2016 at 8:00 PM, Hans de Goede wrote:
>>>
>>> Hi,
>>>
>>> On 19-06-16 06:38, Chen-Yu Tsai wrote:
Hi everyone,
This is ARM PSCI improvements
On Tue, Jul 05, 2016 at 10:26:42AM +0200, Maxime Ripard wrote:
> Add a function to retrieve a writeable property only by the first
> characters of its name.
>
> Signed-off-by: Maxime Ripard
This shouldn't be exported, so it should go into libfdt_internal.h.
> ---
> include/libfdt.h | 7 +++
On Tue, Jul 05, 2016 at 10:26:40AM +0200, Maxime Ripard wrote:
> The function fdt_path_next_seperator had an obvious mispell. Fix it.
>
> Signed-off-by: Maxime Ripard
Huh.. this entire function appears not to be in upstream libfdt.
> ---
> lib/libfdt/fdt_ro.c | 8
> 1 file changed, 4
On Tue, Jul 05, 2016 at 10:26:39AM +0200, Maxime Ripard wrote:
> Add a function to retrieve the highest phandle in a given device tree.
>
> Signed-off-by: Maxime Ripard
> Reviewed-by: Stefan Agner
> Acked-by: Simon Glass
> ---
> include/libfdt.h| 13 +
> lib/libfdt/fdt_ro.c | 2
On Tue, Jul 05, 2016 at 10:26:41AM +0200, Maxime Ripard wrote:
> Add a namelen variant of fdt_path_offset to retrieve the node offset using
> only a fixed number of characters.
>
> Reviewed-by: Simon Glass
> Signed-off-by: Maxime Ripard
> ---
> include/libfdt.h| 16 +++-
> lib/l
On 2016-07-05 13:56, Fabio Estevam wrote:
> On Tue, Jul 5, 2016 at 5:47 PM, Stefan Agner wrote:
>
>> Sounds sensible. Would be the first use of
>> CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG in arch/arm/, but I guess that is
>> fine.
>
> To keep the consistency you could add
> CONFIG_ENV_VARS_UBOOT_RUN
These two options go together and it is best to do the conversion in one
step. So enable DM_MMC_OPS by default if DM_MMC is enabled.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mmc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kcon
To speed up conversion to CONFIG_BLK, enable it by default when DM_MMC is
enabled.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new dm_scan_fdt_dev() function and convert the code
- Drop patches previously applied to u-boot-dm/next
drivers/block/Kconfig | 1 +
1 file changed, 1 insertio
Update the USB mass storage code to allow it to work with driver model.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to use blk_dread/write() instead of direct calls
cmd/usb_mass_storage.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/cmd/usb_mass_sto
Update the driver to support using driver model for block devices.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to support CONFIG_BLK with socfpga
drivers/mmc/socfpga_dw_mmc.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/
Fix up the call in mmc_load_image_raw_partition() to use the correct
function to obtain the MMC device, so that this code can support driver
model.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to support raw partitions with CONFIG_BLK
common/spl/spl_mmc.c | 2 +-
1 file change
Move zynq to the latest driver model support by enabling CONFIG_DM_MMC,
CONFIG_DM_MMC_OPS and CONFIG_BLK.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/Kconfig | 5 +
drivers/mmc/zynq_sdhci.c | 39 ++-
2 files changed, 39 insertion
This new function is more convenient for callers, and handles pre-relocation
situations automatically.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to make use of dm_scan_fdt_dev()
arch/x86/lib/lpc-uclass.c | 4 +---
common/usb_hub.c |
Quite a few places have a bind() method which just calls dm_scan_fdt_dev().
We may as well call dm_scan_fdt_dev() directly. Update the code to do this.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to use dm_scan_fdt_dev() directly where possible
arch/x86/lib/lpc-uclass.c
This is needed to support driver-model conversion of USB and block devices.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/cpu/armv8/zynqmp/Kconfig | 4
arch/arm/mach-zynq/Kconfig| 3 +++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig
Convert zynq USB to driver model. Note this is tested on zynq-zybo only.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add missing struct ehci_ctrl to struct zynq_ehci_priv
arch/arm/Kconfig | 2 +
drivers/usb/host/ehci-zynq.c | 103 +--
2
This corrects a build error on zynqmp.
Signed-off-by: Simon Glass
---
Changes in v2:
- Fix sign-off tag
drivers/net/phy/marvell.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 58d287b..4eeb0f6 100644
--- a/drivers/net/phy/marvel
This is useful information to show how close we are to the limit. At present
it is only available by enabling DEBUG in board_r.c.
Make it available with the 'bdinfo' command also.
Note that this affects ARM only. The bdinfo command is different for each
architecture. Rather than duplicating the c
We currently use dm_scan_fdt_node() to bind devices. It is an internal
function and it requires the caller to know whether we are pre- or post-
relocation.
This requirement has become quite common in drivers, so the current function
is not ideal.
Add a new function with fewer arguments, that does
At present MMC does not use driver model for its operations. It uses its own
structure and passes a struct mmc instead of a struct udevice.
This series addresses this by adding driver-model operations for MMC. The
conversion process is also started, with patches for rockchip, zynq and
qualcomm.
W
On 07/05/2016 10:35 PM, Stefan Agner wrote:
On 2016-07-03 15:33, Marek Vasut wrote:
On 07/03/2016 09:33 PM, Stefan Agner wrote:
From: Stefan Agner
Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
OTG Power Pin to be high active. Low active is the reset value
of the affected co
On 07/05/2016 10:28 PM, Stefan Agner wrote:
On 2016-07-03 15:32, Marek Vasut wrote:
On 07/03/2016 09:33 PM, Stefan Agner wrote:
From: Stefan Agner
USBNC_n_CTRL1 bit 9 actually controls the power pin polarity.
Rename UCTRL_PM to align reference manual and set the bit in
the appropriate callbac
Hi Joe,
On 13 June 2016 at 12:21, Joe Hershberger wrote:
> Hi Simon,
>
> On Mon, Jun 13, 2016 at 12:30 AM, Simon Glass wrote:
>> This corrects a build error on zynqmp.
>>
>> Signed-off-by: Simon Glass
>> Signed-off-by: Simon Glass
>> ---
>>
>> drivers/net/phy/marvell.c | 1 +
>> 1 file change
Hi Stephen,
On 5 July 2016 at 16:09, Stephen Warren wrote:
> On 07/04/2016 09:40 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 3 July 2016 at 22:14, Simon Glass wrote:
>>>
>>> Hi Stephen,
>>>
>>> I'd like to get access to SPL output from a test. It seems that only
>>> the output from U-Boot
Am Dienstag, 5. Juli 2016, 10:05:52 schrieb Ziyuan Xu:
> From: Xu Ziyuan
>
> So far, Rockchip SoCs have two kinds of USB2.0 phy, like Synopsys and
> Innosilicon. This patch applys dwc2 usb driver framework to implement
> phy_init and phy_off for Synopsys phy on Rockchip platform.
>
> Signed-off-
On 07/04/2016 09:40 AM, Simon Glass wrote:
Hi Stephen,
On 3 July 2016 at 22:14, Simon Glass wrote:
Hi Stephen,
I'd like to get access to SPL output from a test. It seems that only
the output from U-Boot proper is logged, although I cannot see why.
For background, I have a new sandbox_spl tar
On 2016-07-03 20:21, Max Filippov wrote:
> On Sun, Jul 3, 2016 at 9:53 PM, Stefan Agner wrote:
>> On 2016-07-02 19:27, Max Filippov wrote:
>>> I'm getting the following build errors when I'm trying to build U-Boot
>>> for a board with UBIFS in its config from the current U-Boot mainline:
>>>
>>> f
On Tue, Jul 5, 2016 at 5:47 PM, Stefan Agner wrote:
> Sounds sensible. Would be the first use of
> CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG in arch/arm/, but I guess that is
> fine.
To keep the consistency you could add
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG in your board file, just like the
other boa
On 2016-07-04 05:27, Fabio Estevam wrote:
> Hi Stefan,
>
> On Sun, Jul 3, 2016 at 4:33 PM, Stefan Agner wrote:
>
>> +#ifdef CONFIG_ARCH_MISC_INIT
>> +int arch_misc_init(void)
>> +{
>> + if (is_mx7d())
>> + setenv("soc", "imx7d");
>> + else
>> + setenv("soc
On 2016-07-03 15:33, Marek Vasut wrote:
> On 07/03/2016 09:33 PM, Stefan Agner wrote:
>> From: Stefan Agner
>>
>> Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
>> OTG Power Pin to be high active. Low active is the reset value
>> of the affected configuration register, hence the
Friendly poke, I would really like to see that in 2016.07 release
as MMC is currently not working for dragonboard :(
Mateusz
On 26.06.2016 22:43, Mateusz Kulikowski wrote:
> MMC core expects (now) valid mmc->dev pointer.
> During conversion in commit cffe5d86 not every driver was updated.
>
> Th
On 2016-07-03 15:32, Marek Vasut wrote:
> On 07/03/2016 09:33 PM, Stefan Agner wrote:
>> From: Stefan Agner
>>
>> USBNC_n_CTRL1 bit 9 actually controls the power pin polarity.
>> Rename UCTRL_PM to align reference manual and set the bit in
>> the appropriate callback usb_power_config.
>>
>> Signed
On 07/05/2016 08:37 PM, Marek Vasut wrote:
The errata command is useless in SPL, so don't build it. This fixes
multiple build failures on PowerPC.
Signed-off-by: Marek Vasut
Cc: York Sun
Fixes: 92623672f9d3 ("fsl: usb: make errata function common for PPC and ARM")
Since 2016.07 is very close
The errata command is useless in SPL, so don't build it. This fixes
multiple build failures on PowerPC.
Signed-off-by: Marek Vasut
Cc: York Sun
Fixes: 92623672f9d3 ("fsl: usb: make errata function common for PPC and ARM")
---
arch/powerpc/cpu/mpc85xx/Makefile | 2 ++
1 file changed, 2 insertion
Commit e677724 (arm: Fix setjmp) added code to fix compilation of the setjmp
code path with thumv1. Unfortunately it missed a constraint that the adr
instruction can only refer to 4 byte aligned offsets.
So this patch adds the required alignment hooks to make compilation
work again even when setjm
On 5 July 2016 at 20:34, Daniel Schwierzeck
wrote:
>
>
> Am 05.07.2016 um 19:17 schrieb Alon Bar-Lev:
>> On 5 July 2016 at 20:05, Daniel Schwierzeck
>> wrote:
>>>
>>
>>
>> Can you please try to copy from sector in flash to another as I've shown?
>> It seems to happen especially in this case.
>> M
Am 05.07.2016 um 19:17 schrieb Alon Bar-Lev:
> On 5 July 2016 at 20:05, Daniel Schwierzeck
> wrote:
>>
>>
>> Am 05.07.2016 um 18:50 schrieb Alon Bar-Lev:
>>> Thank you so much!
>>> Erase does not complain any more.
>>
>> please do not top-quote on a mailing list.
>>
>
> Sorry.
>
>>>
>>> Howeve
On 5 July 2016 at 20:05, Daniel Schwierzeck
wrote:
>
>
> Am 05.07.2016 um 18:50 schrieb Alon Bar-Lev:
>> Thank you so much!
>> Erase does not complain any more.
>
> please do not top-quote on a mailing list.
>
Sorry.
>>
>> However, write is not working.
>>
>> Result is always something like:
>>
Hi Tom,
Just a little patch that got lost in time.
The following changes since commit e8009beff6d5c55c1bf1ae8184791f167e6378b0:
Merge git://git.denx.de/u-boot-arc (2016-07-04 11:46:21 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-rockchip.git
for you to fetch cha
Am 05.07.2016 um 18:50 schrieb Alon Bar-Lev:
> Thank you so much!
> Erase does not complain any more.
please do not top-quote on a mailing list.
>
> However, write is not working.
>
> Result is always something like:
> be04: 00800080 00800080 00800080 00800080
hm, I c
Thank you so much!
Erase does not complain any more.
However, write is not working.
Result is always something like:
be04: 00800080 00800080 00800080 00800080
I enabled the debug info of both u-boot and qemu.
I hope it helps.
I am using master of qemu and u-boot, I get si
On 29 February 2016 at 19:03, Simon Glass wrote:
> On 28 February 2016 at 14:40, Sjoerd Simons
> wrote:
>> Waiting 30 seconds for the hpd to go high seems a bit much, especially
>> on headless boots. Lowering the timeout to 300ms.
>>
>> Sending as RFC because frankly i don't know what a sensible
Hi Alon,
+cc Paul, Stefan
Am 05.07.2016 um 14:04 schrieb Alon Bar-Lev:
> Hi,
>
> Found the debug setting.
>
> When I try to erase flash under qemu I get the following error, the
> erase actually succeeds in the backed file, I see sector as 0xff.
>
> Can anyone check if problem is within u-boot
With a recent bunch of SD3.0 cards in our A20-based board we
experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
with previous cards from the same vendor (both 4 GB/class 10). By
increasing status register polling rate from 1 kHz to 1 MHz we were
able to reach the original transf
On Tue, Jul 05, 2016 at 08:49:00AM -0300, Fabio Estevam wrote:
> Hi Alexey,
>
> On Tue, Jul 5, 2016 at 1:54 AM, Alexey Brodkin
> wrote:
>
> > IMHO there's an obvious solution for all that - just move U-Boot's env for
> > say
> > another 300-400k above like that:
> >
The original PSCI implementation assumed CONFIG_ARMV7_PSCI_NR_CPUS=4.
Add this to platforms that have not defined it, using CONFIG_MAX_CPUS if
it is defined, or the actual number of cores for the given platform.
Signed-off-by: Chen-Yu Tsai
---
Was "ARM: PSCI: Add fallback value for CONFIG_ARMV7_P
The secure monitor may need to store global or static values within the
secure section of memory, such as target PC or CPU power status.
Signed-off-by: Chen-Yu Tsai
---
Changes since v1:
- Copy secure data section to binary image
---
arch/arm/config.mk| 4 ++--
arch/arm/cpu/u-boo
Now that we have a data section, add helper functions to save and fetch
per-CPU target PC.
Signed-off-by: Chen-Yu Tsai
---
Changes since v1:
- Rebased onto latest master
---
arch/arm/cpu/armv7/Makefile | 2 +-
arch/arm/cpu/armv7/psci-common.c | 39 ++
On 07/05/2016 05:38 AM, Sriram Dash wrote:
From: Marek Vasut [mailto:ma...@denx.de]
On 07/04/2016 01:11 PM, Sriram Dash wrote:
Commit 9262367 moved USB errata workaround to a C file but didn't
build it for SPL targets. The EHCI errata should be applied/checked
only when EHCI is defined.
Signed-
Hi,
Found the debug setting.
When I try to erase flash under qemu I get the following error, the
erase actually succeeds in the backed file, I see sector as 0xff.
Can anyone check if problem is within u-boot or qemu?
Thanks!
---
malta # erase BE23 BE23
fwc addr be23 cmd 50 00
Hi Alexey,
On Tue, Jul 5, 2016 at 1:54 AM, Alexey Brodkin
wrote:
> IMHO there's an obvious solution for all that - just move U-Boot's env for say
> another 300-400k above like that:
> -->8---
> diff --git a/include/configs/wandboard.h b/include
On Monday 04 July 2016 05:26 AM, Andre Przywara wrote:
> As printf calls may be executed quite early, we should avoid using any
> BSS stored variables, since some boards put BSS in DRAM, which may not
> have been initialised yet.
> Explicitly mark those "static global" variables as belonging to t
This patch adds support for the evb-rk3288 which is a rk3288-based
development board.
The same as firefly, it also supports booting from eMMC or SD card, the
default is eMMC. Please refer to doc/README.rockchip to achieve the
upgrade approach like firefly-rk3288.
Ziyuan Xu (1):
rockchip: add b
evb-3288 board RK3288-based development board with 2 USB ports, HDMI,
VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes
on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to
display pins, I2C, SPI, UART and GPIOs. This add some basic files
required to allow t
evb-3288 board RK3288-based development board with 2 USB ports, HDMI,
VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes
on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to
display pins, I2C, SPI, UART and GPIOs. This add some basic files
required to allow t
This patch adds support for the evb-rk3288 which is a rk3288-based
development board.
The same as firefly, it also supports booting from eMMC or SD card, the
default is eMMC. Please refer to doc/README.rockchip to achieve the
upgrade approach like firefly-rk3288.
Ziyuan Xu (1):
rockchip: add b
The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.
Change History:
[Patch v3 1/5] armv8: fsl-layerscape: Add A72 core detection
v3:
- Revise commit message.
v2:
- Add commit message.
[Patch v3 2/5] armv8: fsl-layersc
From: Mingkai Hu
The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Mihai Bantea
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
v3:
- No change.
v2:
- Move ser
Add a function to retrieve a writeable property only by the first
characters of its name.
Signed-off-by: Maxime Ripard
---
include/libfdt.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/libfdt.h b/include/libfdt.h
index f13b01f08f71..a55d2d0d8c7b 100644
--- a/include/libfdt.
The current code only checks if the fdt subcommand is fdt addr by checking
whether it starts with 'a'.
Since this is a pretty widely used letter, narrow down that check a bit.
Acked-by: Simon Glass
Acked-by: Pantelis Antoniou
Signed-off-by: Maxime Ripard
---
cmd/fdt.c | 2 +-
1 file changed,
This adds a bunch of unit tests for the "fdt apply" command.
They've all been run successfully in the sandbox. However, as you still
require an out-of-tree dtc with overlay support, this is disabled by
default.
Acked-by: Simon Glass
Acked-by: Pantelis Antoniou
Signed-off-by: Maxime Ripard
---
New SoC LS1046A belongs to Freescale Chassis Generation 2 and
has two SerDes so we need to add this support in fsl_lsch2.
The SoC related SerDes 2 support will be added in SoC patch.
Signed-off-by: Gong Qianyu
---
v3:
- Revise commit message.
v2:
- New Patch.
arch/arm/cpu/armv8/fsl-layerscape
From: Alison Wang
Add support to detect Cortex-A72 core for printing it out.
The Initiator Version of A72 core should be 0x4.
Signed-off-by: Alison Wang
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
v3:
- Revise commit message.
v2:
- Added commit messages.
arch/arm/cpu/armv8/fs
Add a function to retrieve the highest phandle in a given device tree.
Signed-off-by: Maxime Ripard
Reviewed-by: Stefan Agner
Acked-by: Simon Glass
---
include/libfdt.h| 13 +
lib/libfdt/fdt_ro.c | 26 ++
2 files changed, 39 insertions(+)
diff --git a/i
Add a namelen variant of fdt_path_offset to retrieve the node offset using
only a fixed number of characters.
Reviewed-by: Simon Glass
Signed-off-by: Maxime Ripard
---
include/libfdt.h| 16 +++-
lib/libfdt/fdt_ro.c | 18 ++
2 files changed, 25 insertions(+), 9 de
vsprintf.h doesn't include the stdarg.h file, which means that it relies on
the files that include vsprintf.h to include stdarg.h as well.
Add an explicit include to avoid build errors when simply including that
file.
Acked-by: Simon Glass
Acked-by: Pantelis Antoniou
Signed-off-by: Maxime Ripar
The function fdt_path_next_seperator had an obvious mispell. Fix it.
Signed-off-by: Maxime Ripard
---
lib/libfdt/fdt_ro.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 503150ef1dc5..6b737b211d2e 100644
--- a/lib/libfdt
Implement a macro based on fdt_first_property_offset and
fdt_next_property_offset that provides a convenience to iterate over all
the properties of a given node.
Signed-off-by: Maxime Ripard
Acked-by: Simon Glass
---
include/libfdt.h | 24
1 file changed, 24 insertions(
The libfdt overlay support introduces a bunch of new includes and
functions.
Make sure we are able to build it by adding the needed glue.
Signed-off-by: Maxime Ripard
Acked-by: Simon Glass
---
include/libfdt_env.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/libfdt_env.h b
Having dashes as a separator in the DTB name is a quite common practice.
However, the current code to generate objects from DTBs assumes the
separator is an underscore, leading to a compilation error when building a
device tree with dashes.
Replace all the dashes in the DTB name to generate the s
Add a function to modify inplace only a portion of a property..
This is especially useful when the property is an array of values, and you
want to update one of them without changing the DT size.
Signed-off-by: Maxime Ripard
Acked-by: Simon Glass
---
include/libfdt.h | 21 +
The device tree overlays are a good way to deal with user-modifyable
boards or boards with some kind of an expansion mechanism where we can
easily plug new board in (like the BBB or the raspberry pi).
However, so far, the usual mechanism to deal with it was to have in Linux
some driver detecting t
Hi,
The device tree overlays are a great solution to the issue raised by
the bunch expandable boards we find everywhere these days, like the
Beaglebone, Raspberry Pi or CHIP.
However, most of the time, the overlays are applied through a
mechanism involving the firmware request interface in Linux,
The device tree overlays are a good way to deal with user-modifyable
boards or boards with some kind of an expansion mechanism where we can
easily plug new board in (like the BBB, the Raspberry Pi or the CHIP).
Add a new function to merge overlays with a base device tree.
Signed-off-by: Maxime Ri
1 - 100 of 102 matches
Mail list logo
