Hello Peng,
On Mon, 19 Oct 2015 13:40:51 +0800, Peng Fan
wrote:
> On Tue, Oct 06, 2015 at 05:13:24PM -0500, Frank Li wrote:
> >When added above configuration, iram fix up plus relocate offset may locate
> >in invalidate space. Write back fix up value will cause data abort.
> >
> >Add address chec
On Mon, 19 Oct 2015 08:11:25 +0200, Albert ARIBAUD
wrote:
> Hello Tom,
>
> A last-minute fix, maybe it can go in 2015.10 since this is a
> single-target bugfix by the maintainer?
Actually, two bug-fixes:
The following changes since commit ac6a53219a1bf5bd30b754d6d3f04f26e3921d15:
Merge git:/
Hello Tom,
A last-minute fix, maybe it can go in 2015.10 since this is a
single-target bugfix by the maintainer?
The following changes since commit ac6a53219a1bf5bd30b754d6d3f04f26e3921d15:
Merge git://git.denx.de/u-boot-socfpga (2015-10-16 20:21:04 -0400)
are available in the git repository
Add README.nios2 about how to add nios2 boards to u-boot.
Signed-off-by: Thomas Chou
---
doc/README.nios2 | 86
1 file changed, 86 insertions(+)
create mode 100644 doc/README.nios2
diff --git a/doc/README.nios2 b/doc/README.nios2
new fil
Hello Vadzim,
On Mon, 19 Oct 2015 00:13:29 +0300, Vadzim Dambrouski
wrote:
> Signed-off-by: Vadzim Dambrouski
> ---
>
> arch/arm/lib/semihosting.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
> index ed5e8
Hello Vadzim,
On Mon, 19 Oct 2015 00:13:28 +0300, Vadzim Dambrouski
wrote:
> It is possible to enable CONFIG_SEMIHOSTING for STM32F429 target, but it
> would result in compile error. This patch adds support for semihosting for
> STM32F429 or any other ARMv7M target. Tested on STM32F429-DISCOVERY
Hello Thomas,
On Mon, 12 Oct 2015 20:55:03 +0800, Thomas Chou
wrote:
> Hi Marek,
>
> On 10/12/2015 06:32 PM, Marek Vasut wrote:
> > Wouldn't invalidate_dcache_range() be enough here ? You don't care about the
> > data in the newly allocated area at this point I guess -- either you fill
> > them
Hello Lubomir,
On Wed, 14 Oct 2015 17:17:54 +0200, Lubomir Rintel wrote:
> Seen this one in the wild. Is labelled "Raspberry Pi Model A+ V1.1,
> (C) Raspberry Pi 2014". A standard A+ board, much like the one with
> version 0x12, didn't notice any differencies.
>
> Signed-off-by: Lubomir Rintel
> -Original Message-
> From: Gong Qianyu-B52263
> Sent: Friday, October 16, 2015 2:15 PM
> To: Kushwaha Prabhakar-B32579 ; u-
> b...@lists.denx.de
> Cc: Hu Mingkai-B21284 ; Sun York-R58495
> ; Hou Zhiqiang-B48286 ;
> Xie Shaohui-B21989 ; Song Wenbin-B53747
> ; Wood Scott-B07421
> ; Wang Hu
On Tue, Oct 06, 2015 at 05:13:24PM -0500, Frank Li wrote:
>When added above configuration, iram fix up plus relocate offset may locate
>in invalidate space. Write back fix up value will cause data abort.
>
>Add address check, skip psci code.
>
>Signed-off-by: Frank Li
>---
> arch/arm/lib/relocate.
Hello Marek,
On 15-10-17 21:59:07, maitysancha...@gmail.com wrote:
> Hello,
>
> On 15-10-16 16:20:07, Santhosh Kumar Janardhanam -ERS, HCL Tech wrote:
> > Hi All,
> > I am working on USB part for vybrid vf-610 processor, We have two ports in
> > the board
> >
> > when I type usb start in uboot
Hello Eric,
On Mon, 12 Oct 2015 19:18:52 -0400, Eric Cooper wrote:
> The default dockstar configuration for U-Boot currently causes it to
> overrun the environment area, so that a "saveenv" command bricks the
> device. This patch moves the environment to a higher address to avoid
> that.
>
> Si
Hello Simon,
On Sun, 18 Oct 2015 14:38:06 -0600, Simon Glass
wrote:
> Hi Albert,
>
> On 18 October 2015 at 10:28, Albert ARIBAUD wrote:
> > Hello Simon,
> >
> > On Sat, 17 Oct 2015 15:06:55 -0600, Simon Glass
> > wrote:
> >> Unfortunately memset() is not always available, so provide a substitu
Hello Ezequiel,
Am 17.10.2015 um 20:07 schrieb Ezequiel Garcia:
Hi Heiko,
On 9 October 2015 at 09:30, Heiko Schocher wrote:
[..]
I just updated the "ubi_sync_with_linux" branch on u-boot-ubi.
It seems UBI/UBIFS now work with the NAND on the aristainetos2
board, but my stomach says, there a
Hello Simon,
On Sun, 18 Oct 2015 14:37:03 -0600, Simon Glass
wrote:
> Hi Albert,
>
> On 18 October 2015 at 10:36, Albert ARIBAUD wrote:
> > Hello Simon,
> >
> > On Sat, 17 Oct 2015 15:07:00 -0600, Simon Glass
> > wrote:
> >> We should not init the console this early and there is no need to. If
Rename GPU functions to less generic names to avoid potential name
collisions.
Signed-off-by: Alexandre Courbot
---
arch/arm/include/asm/arch-tegra/gpu.h | 8
arch/arm/mach-tegra/board2.c | 4 ++--
arch/arm/mach-tegra/gpu.c | 4 ++--
3 files changed, 8 insertions(+)
T210's GPU secure firmware loading requires a write-protected region
to be set up.
This patch reserves the upper 256KB of RAM as the WPR region and locks
it so the kernel can initiate secure firmware loading.
Signed-off-by: Alexandre Courbot
---
arch/arm/include/asm/arch-tegra210/mc.h | 12
Enable the GPU node in the system-wide ft_system_setup() hook instead of
the board-specific ft_board_hook(). This allows us to enable GPU per SoC
generation instead of per-board as we did initially.
Reported-by: Stephen Warren
Signed-off-by: Alexandre Courbot
---
arch/arm/mach-tegra/board2.c
This series makes U-boot program the write-protected (WPR) region of T210 chips,
allowing the kernel to perform GPU secure firmware loading.
Tegra 210's GPU requires its firmware to be loaded though a write-protected
region. An area of physical memory is carved-out, programmed into the
correspondi
There is no justification for this function, especially in exported
form.
Signed-off-by: Alexandre Courbot
---
arch/arm/include/asm/arch-tegra/gpu.h | 6 --
arch/arm/mach-tegra/gpu.c | 7 +--
2 files changed, 1 insertion(+), 12 deletions(-)
diff --git a/arch/arm/include/asm/
On Mon, Oct 19, 2015 at 1:17 AM, Simon Glass wrote:
> + CONFIG_CROS_EC_KEYB
> + Enables a Chrome OS keyboard using the CROS_EC interface.
> + This uses CROS_EC to communicate with a second microcontroller
> + which provides key scans on requ
Add a function which returns a new keyboard LED value when the LEDs need
updating.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/input/input.c | 9 +
include/input.h | 14 +-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/input/in
Move all the '!release' code into one block so that it is clear that it only
applies on key release.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/input/input.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/input/input.c
At present the i8042 driver has its own logic and keymaps. In an effort to
unify the code, move it over to use the input library. This changes most of
the keycode-processing logic since it is now in that library. The main
responsibilities of the driver are now to handle the LEDs, deal with the
PS/2
Add a new option CONFIG_I8042_KEYB which will replace the current
CONFIG_I8042_KBD. This new name fits better with existing drivers.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/input/Kconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/d
Generally the input library handles processing of a list of scanned keys.
Repeated keys need to be generated based on a timer in this case, since all
that is provided is a list of keys current depressed.
Keyboards which do their own scanning will resend codes when they want to
inject a repeating k
This option is mentioned but does not do anything. Drop it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
README | 11 ++-
board/mpl/pip405/README | 4
include/configs/MIP405.h | 5 -
include/configs/PIP405.h | 5 -
4 files
Sometimes we seem to get 0xaa twice which causes the config read to fail.
This causes chromebook_link to fail to set up the keyboard.
Add a check for this and read the config again when detected.
Signed-off-by: Simon Glass
---
Changes in v2:
- Use device tree to handle this quirk
drivers/inpu
Adjust this driver to support driver model. The only users are x86 boards
so this should be safe.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/input/Makefile | 2 +-
drivers/input/i8042.c | 109 ++---
include/i8042.h| 6 ---
On Mon, Oct 19, 2015 at 9:51 AM, Simon Glass wrote:
> Add support for the debug UART on link. This is useful for early debugging.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> arch/x86/cpu/ivybridge/cpu.c | 7 +++
> configs/chromebook_link_defconfig | 4
> 2 file
When caps lock is enabled we should convert lower case to upper case. Add
this to the input key processing so that caps lock works correctly.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/input/input.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git
This has duplicated scan code tables and logic. We can use the input
library to implement most of the features here.
This needs testing. The only supported board appears to be TQM5200.
Unfortunately no maintainer is listed for this board.
Signed-off-by: Simon Glass
---
Changes in v2: None
dri
Now that i8042 uses driver model, adjust other mentions of it and remove old
code that is no-longer used. Update the README and unify the keyboard text
into one place.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
README | 33 +++
On Mon, Oct 19, 2015 at 9:51 AM, Simon Glass wrote:
> If the debug UART is enabled, get it ready for use at the earliest possible
> opportunity. This is not actually very early, but until we have a stack it
> is difficult to make it work.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
>
Add support for the German keymap, taken from i8042.c. This can be selected
when the input library it initialised.
Signed-off-by: Simon Glass
---
Changes in v2:
- Update input_add_tables() to add error checking
board/kosagi/novena/novena.c | 2 +-
drivers/input/cros_ec_keyb.c | 2 +-
drive
Adjust the tegra keyboard driver to support driver model, using the new
uclass. Make this the default for all Tegra boards so that those that use
a keyboard will build correctly with this driver.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/mach-tegra/Kconfig | 1 +
drivers/in
Some boards have an i8042 device. Enable the driver for all x86 boards, and
add a device tree node for those which may have this keyboard.
Also adjust the configuration so that i8042 is always separate from the VGA,
and rename the stdin driver accordingly. With this commit the keyboard will
not wo
On Mon, Oct 19, 2015 at 9:51 AM, Simon Glass wrote:
> It is useful to see a message from the debug UART early during boot so that
> you know things are working. Add an option to enable this. The message will
> be displayed as soon as debug_uart_init() is called.
>
> Signed-off-by: Simon Glass
> -
This code is currently incorrect, perhaps due to a typo. Fix it.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/input/input.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 82e8381..a6834cf 100644
--- a/driver
The slash and * are missing from the keycode tables. Add these so that
these keypad keys can be used.
Signed-off-by: Simon Glass
---
Changes in v2:
- Fix extra space in commit message
drivers/input/input.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/input/
CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and
CONFIG_CONSOLE_TIME are not used by any board. The implementation is not
great and stands in the way of a refactor of i8042. Drop these for now.
They can be re-introduced quite easily later, perhaps with driver-model
real-time-clock (RTC) su
Most keyboards can be scanned to produce a list of the keycodes which are
depressed. With the i8042 keyboard this scanning is done internally and
only the processed results are returned.
In this case, when a key is pressed, a 'make' code is sent. When the key
is released an 'unmake' code is sent.
At present the register access in kbd_reset() is quite primitive. This makes
it hard to follow.
Create functions to read and write data, both to a single register, and via
the command/data approach.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-on: Intel Crown Bay and QEMU
Tested-by:
When driver model is used for keyboards we must scan the available keyboards
and register them with stdio. Add code to do this.
At some point (once LCD/video is converted) we should be able to convert
stdio to driver model and avoid these dual data structures.
Signed-off-by: Simon Glass
Reviewed
Modify i8042_kbd_init() so that the normal pass is sucessful init and
failure exits early. This will make the code easier to extend and is easier
to read.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/input/i8042.c | 19 +--
1 file changed, 9
On Mon, Oct 19, 2015 at 9:51 AM, Simon Glass wrote:
> Some boards need to set things up before the debug UART can be used. On
> these boards a call to debug_uart_init() is insufficient. When this option
> is enabled, the function board_debug_uart_init() will be called when
> debug_uart_init() is c
Rather than lots of 'return' statements, use goto to a single return.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/input/i8042.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c
Return a useful error instead of -1 when something goes wrong.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/input/input.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 007b855..9033
Adjust the cros_ec keyboard driver to support driver model. Make this the
default for all Exynos boards so that those that use a keyboard will build
correctly with this driver.
Signed-off-by: Simon Glass
---
Changes in v2: None
README | 5 --
arch/arm/Kconfig
In preparation for converting the cros_ec keyboard driver to driver model,
adjust the cros_ec functions it will use to use a normal struct udevice.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/input/cros_ec_keyb.c | 4 ++--
drivers/misc/cros_ec.c | 14 +-
inclu
This series adds a new uclass for keyboards and converts some drivers
over to use it.
This series includes some work to remove code duplication in the keyboard
drivers by updating them to use the input library (input.c). This unifies
the keycode decoding logic in one place. In order to do this som
Require the caller to add the keycode translation tables separately so that
it can select which ones to use. In a later patch we will add the option to
add German tables.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add error checking to input_add_tables()
board/kosagi/novena/novena.c | 1
Add a uclass for keyboard input, mirroring the existing stdio methods.
This is enabled by a new CONFIG_DM_KEYBOARD option.
Signed-off-by: Simon Glass
Reviewed-by: Marek Vasut
---
Changes in v2:
- Add more debug info to input_init() for when it fails
- Support driver's tstc() and getc() methods
The read_keys() method in input is passed a struct input_config. Add a
device pointer there so that we can find out the device that is referred
to with driver model.
Once all drivers are converted we can update the input structure to use
driver model instead.
Signed-off-by: Simon Glass
Reviewed-
Hi Simon,
On Mon, Oct 19, 2015 at 9:51 AM, Simon Glass wrote:
> We want to be able to add other common code to this function. So change the
> driver's version to have an underscore before it, just like
> _debug_uart_putc(). Define debug_uart_init() to call this version.
>
> Update all drivers to
Hi,
On 5 April 2014 at 06:50, armdev wrote:
> Dear batao / Inderpal,
>
> ping works only a few times after a number of usb reset / start attempts.
> We are using linux 3.13 (exynos_defconfig) and rootfs linaro saucy server.
>
> Upon linux boot there is only lo in ifconfig.
> lsusb results in -99
Hi Bin,
On 18 October 2015 at 21:01, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Oct 19, 2015 at 7:17 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 15 September 2015 at 00:12, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Wed, Sep 9, 2015 at 12:32 PM, Simon Glass wrote:
Adjust this driver to support
On 3 October 2015 at 08:27, Simon Glass wrote:
> On 18 September 2015 at 22:49, Sjoerd Simons
> wrote:
>> Save the environment on the SD card for Firefly in the empty space
>> between the SPL and the u-boot image.
>>
>> Signed-off-by: Sjoerd Simons
>>
>> ---
>>
>> include/configs/chromebook_jer
On 3 October 2015 at 08:27, Simon Glass wrote:
> On 18 September 2015 at 22:49, Sjoerd Simons
> wrote:
>> Similar to load an fdt, when loading an initrd about the 512Mb mark
>> things seem to break. For now force loading below 512Mb until the reason
>> why this fails has been determined/solved.
>
Hi Simon,
On Mon, Oct 19, 2015 at 7:17 AM, Simon Glass wrote:
> Hi Bin,
>
> On 15 September 2015 at 00:12, Bin Meng wrote:
>> Hi Simon,
>>
>> On Wed, Sep 9, 2015 at 12:32 PM, Simon Glass wrote:
>>> Adjust this driver to support driver model. The only users are x86 boards
>>> so this should be s
Hi Simon,
On Mon, Oct 19, 2015 at 10:51 AM, Simon Glass wrote:
> Hi Bin,
>
> On 18 October 2015 at 20:44, Bin Meng wrote:
>> Hi Simon,
>>
>> On Mon, Oct 19, 2015 at 4:27 AM, Simon Glass wrote:
>>> Hi Bin,
>>>
>>> On 12 October 2015 at 02:30, Bin Meng wrote:
Currently sdram_initialise() sa
Hi Bin,
On 10 October 2015 at 02:57, Bin Meng wrote:
> Hi Simon,
>
> On Sat, Oct 3, 2015 at 10:29 PM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 29 September 2015 at 11:17, Bin Meng wrote:
>>> SeaBIOS is an open source implementation of a 16-bit X86 BIOS.
>>> It can run in an emulator or natively o
Hi Bin,
On 18 October 2015 at 20:44, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Oct 19, 2015 at 4:27 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 12 October 2015 at 02:30, Bin Meng wrote:
>>> Currently sdram_initialise() saves pei_data->mrc_output directly to
>>> gd->arch.mrc_output. This is incorre
Hi Simon,
On Mon, Oct 19, 2015 at 4:27 AM, Simon Glass wrote:
> Hi Bin,
>
> On 12 October 2015 at 02:30, Bin Meng wrote:
>> Currently sdram_initialise() saves pei_data->mrc_output directly to
>> gd->arch.mrc_output. This is incorrect as pei_data->mrc_output points
>> to an address on the stack w
Hi Tom,
On 16 October 2015 at 18:23, Tom Rini wrote:
> On Fri, Oct 16, 2015 at 04:27:31PM -0600, Simon Glass wrote:
>> Hi Linus,
>>
>> On 16 October 2015 at 15:23, Linus Walleij wrote:
>> > On Wed, Oct 14, 2015 at 6:55 PM, Sergey Temerkhanov
>> > wrote:
>> >
>> >> On some systems, UART initiali
Hi Simon,
On Mon, Oct 19, 2015 at 10:38 AM, Simon Glass wrote:
> Hi Bin,
>
> On 18 October 2015 at 20:32, Bin Meng wrote:
>> Hi Simon,
>>
>> On Mon, Oct 19, 2015 at 10:26 AM, Simon Glass wrote:
>>> Hi Bin,
>>>
>>> On 18 October 2015 at 20:22, Bin Meng wrote:
Hi Simon,
On Mon, Oc
Hi Bin,
On 18 October 2015 at 20:32, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Oct 19, 2015 at 10:26 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 18 October 2015 at 20:22, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
At present this driver uses bin
Convert altera_tse to driver model and phylib.
Signed-off-by: Thomas Chou
---
configs/nios2-generic_defconfig | 2 +
doc/device-tree-bindings/net/altera_tse.txt | 112
drivers/net/Kconfig | 9 +
drivers/net/altera_tse.c| 938 ++
Hi Simon,
On Mon, Oct 19, 2015 at 10:26 AM, Simon Glass wrote:
> Hi Bin,
>
> On 18 October 2015 at 20:22, Bin Meng wrote:
>> Hi Simon,
>>
>> On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
>>> At present this driver uses bind() to set up the device. The bind() method
>>> should not touch th
Hi Simon,
On Mon, Oct 19, 2015 at 10:24 AM, Simon Glass wrote:
> Hi Bin,
>
> On 18 October 2015 at 20:01, Bin Meng wrote:
>> Hi Simon,
>>
>> On Mon, Oct 19, 2015 at 4:27 AM, Simon Glass wrote:
>>> Hi Bin,
>>>
>>> On 11 October 2015 at 22:37, Bin Meng wrote:
With MRC cache enabled, when ty
Hi Tom,
On 18 October 2015 at 18:09, Tom Rini wrote:
> On Sun, Oct 18, 2015 at 06:58:51AM -0600, Simon Glass wrote:
>> Hi Tom,
>>
>> On 28 September 2015 at 22:52, Simon Glass wrote:
>> > On 28 September 2015 at 03:11, Bin Meng wrote:
>> >> The logic to calculate the number of E820 table entrie
Hi Bin,
On 18 October 2015 at 20:23, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
>> At present a missing $ causes this code to hang when using the MRC cache/
>> Fix it.
>>
>> Signed-off-by: Simon Glass
>
> Reviewed-by: Bin Meng
>
>> ---
>>
>> arch/x86/c
Hi Bin,
On 18 October 2015 at 20:22, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
>> At present this driver uses bind() to set up the device. The bind() method
>> should not touch the hardware, so move the init code to probe().
>>
>
> I think RTC should be
Hi Bin,
On 18 October 2015 at 19:58, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Oct 19, 2015 at 4:26 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 11 October 2015 at 22:37, Bin Meng wrote:
>>> Currently struct fmap_entry is used to describe a mrc region.
>>> However this structure contains some other
Hi Bin,
On 18 October 2015 at 20:01, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Oct 19, 2015 at 4:27 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 11 October 2015 at 22:37, Bin Meng wrote:
>>> With MRC cache enabled, when typing 'reset' in the U-Boot shell,
>>> BayTrail FSP initialization hangs at "C
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> From: Bin Meng
>
> This works correctly now, so enable it.
>
> Signed-off-by: Bin Meng
> Dropped malloc() and adjusted commit message:
> Signed-off-by: Simon Glass
>
> ---
>
> arch/x86/cpu/ivybridge/sdram.c | 10 ++
> 1 file changed
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> This code takes about 450ms without the MRC cache and about 27ms with the
> cache. Add a debug timer so that this time can be displayed.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/ivybridge/sdram.c | 3 +++
> 1 file changed, 3 inse
Hi Simon,
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> At present a missing $ causes this code to hang when using the MRC cache/
> Fix it.
>
> Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
> ---
>
> arch/x86/cpu/ivybridge/car.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> The RTC can fail, so check the return value for reads.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/ivybridge/sdram.c | 13 ++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/cpu/ivybridge/sdra
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> The current check is incorrect and will fail when any non-zero byte is read.
> Fix it.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/rtc/rtc-uclass.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/rtc/rtc-
Hi Simon,
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> Use this option instead of a private CONFIG_CACHE_MRC_BIN option.
>
The CONFIG_CACHE_MRC_BIN option seems to be used to program the MTRR
for the mrc.bin text range to make it run faster. It is nothing
related to the MRC cache data t
Hi Simon,
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> At present this driver uses bind() to set up the device. The bind() method
> should not touch the hardware, so move the init code to probe().
>
I think RTC should be initialized anyway. If moving it to probe, it
may not be initializ
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> For consistency, use 'ret' to handle a return value.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/ivybridge/sdram.c | 16
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/cpu/ivybridge/sdra
On Mon, Oct 19, 2015 at 5:55 AM, Simon Glass wrote:
> Add a comment to make it clear to which block the #endif relates.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/rtc/mc146818.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc
Hi Premyslaw,
On 13 October 2015 at 05:59, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 10/03/2015 04:28 PM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 21 September 2015 at 13:26, Przemyslaw Marczak
>> wrote:
>>>
>>> This commit adds additional file with implementation of board
>>> de
Hi Przemyslaw,
On 13 October 2015 at 05:58, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 10/03/2015 04:28 PM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 21 September 2015 at 13:26, Przemyslaw Marczak
>> wrote:
>>>
>>> This commit adds driver for Exynos54xx ADC subsystem.
>>>
>>> The d
On 12 October 2015 at 15:18, George McCollister
wrote:
> Add the Wildcat Point ID so Broadwell U based boards can use SPI.
>
> Signed-off-by: George McCollister
> Reviewed-by: Bin Meng
> ---
> Changes for V2:
> Add Reviewed-by: Bin Meng
>
> drivers/spi/ich.c | 3 ++-
> 1 file changed, 2 insert
On 12 October 2015 at 15:18, George McCollister
wrote:
> Add Wildcat Point AHCI and LPC PCI IDs which are present on Broadwell U
> based (and possibly other) boards.
>
> Signed-off-by: George McCollister
> Reviewed-by: Bin Meng
> ---
> Changes for V2:
> Add simple sentence as the commit message
On 8 October 2015 at 18:30, Bin Meng wrote:
> Hi Simon,
>
> On Fri, Oct 9, 2015 at 2:10 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 8 October 2015 at 19:07, Simon Glass wrote:
>>> On 7 October 2015 at 10:13, Bin Meng wrote:
PCI_HEADER_TYPE register (offset 0x0e) bit 7 is an indicator
f
Hi Simon,
On Mon, Oct 19, 2015 at 4:27 AM, Simon Glass wrote:
> Hi Bin,
>
> On 11 October 2015 at 22:37, Bin Meng wrote:
>> With MRC cache enabled, when typing 'reset' in the U-Boot shell,
>> BayTrail FSP initialization hangs at "Configuring Memory Start":
>>
>> Setting BootMode to 0
>> Inst
Hi Simon,
On Mon, Oct 19, 2015 at 4:26 AM, Simon Glass wrote:
> Hi Bin,
>
> On 11 October 2015 at 22:37, Bin Meng wrote:
>> Currently struct fmap_entry is used to describe a mrc region.
>> However this structure contains some other fields that are not
>> related to mrc cache and causes confusion
We want to be able to add other common code to this function. So change the
driver's version to have an underscore before it, just like
_debug_uart_putc(). Define debug_uart_init() to call this version.
Update all drivers to this new method.
Signed-off-by: Simon Glass
---
Changes in v2:
- Adjus
Some boards need to set things up before the debug UART can be used. On
these boards a call to debug_uart_init() is insufficient. When this option
is enabled, the function board_debug_uart_init() will be called when
debug_uart_init() is called. You can put any code here that is needed to
set up the
Hi Bin,
On 18 October 2015 at 17:17, Simon Glass wrote:
> Hi Bin,
>
> On 15 September 2015 at 00:12, Bin Meng wrote:
>> Hi Simon,
>>
>> On Wed, Sep 9, 2015 at 12:32 PM, Simon Glass wrote:
>>> Adjust this driver to support driver model. The only users are x86 boards
>>> so this should be safe.
>
It is useful to see a message from the debug UART early during boot so that
you know things are working. Add an option to enable this. The message will
be displayed as soon as debug_uart_init() is called.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/serial/Kconfig | 10 ++
Hi Thomas,
On 13 October 2015 at 07:17, Thomas Chou wrote:
>
>
> On 10/10/2015 03:16 PM, Thomas Chou wrote:
>>
>> Implement a Timer uclass to work with lib/time.c.
>>
>> Signed-off-by: Thomas Chou
>> Acked-by: Simon Glass
>> ---
>> v2
>>fix coding style.
>> v3
>>add description to Kconf
If the debug UART is enabled, get it ready for use at the earliest possible
opportunity. This is not actually very early, but until we have a stack it
is difficult to make it work.
Signed-off-by: Simon Glass
---
Changes in v2:
- Remove comment block since we now always enable the debug UART
- Us
Add support for the debug UART on link. This is useful for early debugging.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/ivybridge/cpu.c | 7 +++
configs/chromebook_link_defconfig | 4
2 files changed, 11 insertions(+)
diff --git a/arch/x86/cpu/ivybridge/cpu.c
This series adds a few more features to the debug UART, making it possible
to use it even when the board needs to perform additional init for the UART
to work. The debug UART is anabled on link.
Some minor PCI tidy-ups are also included.
Link currently does not boot due to lack of early malloc()
Hi Lukasz,
On Tue, Sep 22, 2015 at 4:46 AM, Lukasz Majewski wrote:
> Hi Fabio,
>
>> From: Fabio Estevam
>>
>> SPI NOR flashes need to erase the entire sector size and we cannot
>> pass any arbitrary length for the erase operation.
>>
>> To illustrate the problem:
>>
>> Copying data from PC to DF
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