On 25 June 2015 at 05:01, Tom Rini wrote:
> On Tue, Jun 23, 2015 at 08:47:25PM +0530, Jagan Teki wrote:
>
>> Hi Tom,
>>
>> Please pull this request, few importent feature list on spi-flash front
>> like data flash and spi flash MTD supports.
>>
>> thanks!
>> Jagan.
>>
>> The following changes sinc
Hello Tom,
Am 25.06.2015 um 01:31 schrieb Tom Rini:
On Tue, Jun 23, 2015 at 08:47:25PM +0530, Jagan Teki wrote:
Hi Tom,
Please pull this request, few importent feature list on spi-flash front
like data flash and spi flash MTD supports.
thanks!
Jagan.
The following changes since commit c6265
DCIMVAC is upgraded to DCCIMVAC for the individual processor
(Cortex-A7) that the DCIMVAC is executed on.
We should follow the linux dma follow. Before DMA read, first
invalidate dcache then after DMA read, invalidate dcache again.
With the DMA direction DMA_FROM_DEVICE, the dcache need be
invali
Hi, Simon.
On 06/24/2015 06:38 AM, Simon Glass wrote:
> We can calculate this. Add code to do this if it is not provided.
Did you consider the kernel side?
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/mmc/dw_mmc.
Hi, Simon.
On 06/24/2015 06:38 AM, Simon Glass wrote:
> Some SoCs want to adjust the input clock to the DWMMC block as a way of
> controlling the MMC bus clock. Update the get_mmc_clk() method to support
> this.
I didn't see your other patches.
But i don't know this patch's purpose.
I think that
Hi Andre,
On Sat, Jun 13, 2015 at 10:10 AM, Tom Rini wrote:
> On Fri, Jun 05, 2015 at 12:58:45AM +0100, Andre Przywara wrote:
>
>> From: Mark Langsdorf
>>
>> Enable full 48-bit LBA48 data reads by passing the upper word of the
>> LBA block pointer in bytes 9 and 10 of the FIS.
>>
>> This allows
Hi, Alexy.
On 06/25/2015 02:06 AM, Alexy Gallardo Segura wrote:
> Hello everyone
>
> I am currently working with the ODROID-x2 platform and the U-boot that was
> using the u-boot by default, but support for the USB driver does not work
> well. Then I started to use the version available at:
>
Add I2C4 clock support for i.MX6SX. Since we use runtime check,
but not macro, we need to remove `#ifdef ..` in crm_regs.h, or
we will get compliation failure for other platforms.
Making the macros only for i.MX6SX open to other i.MX6x maybe not
a good choice, but we have runtime check.
Signed-of
enable_spi_clock does the same thing with enable_cspi_clock, so
remove enable_cspi_clock.
Remove enable_cspi_clock prototype in header file
convert cm_fx6/spl.c to use enable_spi_clk
Signed-off-by: Peng Fan
---
arch/arm/cpu/armv7/mx6/clock.c| 19 ---
arch/arm/include/asm/
Hi Saket,
On Thu, Jun 25, 2015 at 3:38 AM, Saket Sinha wrote:
> Hi Simon,
>
> Please find my comments inline -
>
[snip]
>>> +static unsigned long acpi_fill_mcfg(unsigned long current)
>>> +{
>>> + pci_dev_t qemu_dev;
>>> + struct pci_device_id qemu_id[] = { { 0x8086, 0x29c0 } };
>>>
On Wed, Jun 24, 2015 at 12:53:40PM -0300, Fabio Estevam wrote:
>On Wed, Jun 24, 2015 at 7:44 AM, Peng Fan wrote:
>> enable_spi_clock does the same thing with enable_cspi_clock.
>>
>> Signed-off-by: Peng Fan
>> ---
>> arch/arm/cpu/armv7/mx6/clock.c | 19 ---
>> 1 file changed, 19
Hi Tom,
On Wed, Jun 24, 2015 at 11:50 PM, Beaman, Thomas
wrote:
>
> Hi Bin,
>
>>> You are correct I was confused about the usage of the dtb file in
>>> U-Boot. I know it is probably outside the scope of U-Boot, but do you
>>> have any pointers to info on linux x86 kernel usage of a FDT (dtb)
>>>
Hi everyone, is there a particular reason why OMAP4 has not migrated to
ext4 from ext3? Specifically, the uenv variable 'rootfstype" is still set
to ext3, rather than ext4 [1].
Thanks,
Adam
[1]
http://git.denx.de/?p=u-boot.git;a=blob;f=include/configs/ti_omap4_common.h;h=ef5a69da63407d52a315e8e3
On Tue, Jun 23, 2015 at 08:47:25PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this request, few importent feature list on spi-flash front
> like data flash and spi flash MTD supports.
>
> thanks!
> Jagan.
>
> The following changes since commit c6265f7f3410b5e5763181cdd123a3f6fcd9fd58:
>
sram size could be different on different socs, e.g. on stv0991 it is 256 while
on altera platform it is 128. It is better to receive it from device tree.
Signed-off-by: Vikas Manocha
Tested-by: Stefan Roese
---
Changes in v2: None
arch/arm/dts/socfpga.dtsi |1 +
arch/arm/dts/stv0991
This patchset adds support to get controller sram size from device tree
& fix to support different FIFO widths.
Changes in v2:
- fix the checkpatch error from patch 3/3
Vikas Manocha (3):
spi: cadence_qspi: move the sram partition in init
spi: cadence_qspi: get sram size from device tree
sp
This patch makes the code compatible with FIFO depths other than 4
bytes. It also simplify read/write FIFO loops.
Signed-off-by: Vikas Manocha
Tested-by: Stefan Roese
---
Changes in v2: Fixed the checkpatch.pl error
drivers/spi/cadence_qspi_apb.c | 46 ---
There is no need to re-configure sram partition for every read/write for
better full use of sram for read or write. This patch divides the half
sram for read & half for write once at initialization.
Signed-off-by: Vikas Manocha
Tested-by: Stefan Roese
---
Changes in v2: None
drivers/spi/caden
stv0991 has cadence qspi controller for flash interfacing, this
patch configures the device pads & clock for the controller.
Signed-off-by: Vikas Manocha
---
Changed in v2:
- removed checkpatch.pl error.
arch/arm/cpu/armv7/stv0991/clock.c |4 +++-
arch/arm/cpu/armv7/stv0991
Signed-off-by: Vikas Manocha
---
Changed in v2: None
include/configs/stv0991.h |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index d8f51d8..fe5b2fe 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/st
This patch add the device tree entry for qspi controller & spi flash
memory.
Signed-off-by: Vikas Manocha
---
Changed in v2: None
arch/arm/dts/stv0991.dts | 34 ++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/dts/stv0991.dts b/arch/arm/dts/stv0991.d
Signed-off-by: Vikas Manocha
---
Changed in v2: None
configs/stv0991_defconfig |1 +
include/configs/stv0991.h |1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index f8ec5db..1d47178 100644
--- a/configs/stv0991_def
This patch does all the board configurations required to use the qspi
controller & attached spi flash memory.
Signed-off-by: Vikas Manocha
---
Changed in v2: None
include/configs/stv0991.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/include/configs/stv0991.h b/inc
CONFIG_OF_SEPARATE is default define with CONFIG_OF_CONTROL, removing
this define from the board file to avoid multiple definition warning.
Signed-off-by: Vikas Manocha
---
Changed in v2: None
include/configs/stv0991.h |1 -
1 file changed, 1 deletion(-)
diff --git a/include/configs/stv09
This patchset enables cadence qspi controller for stv0991 soc, saves
environment in spi flash & moves CONFIG_OF in the defconfig file.
In fact it clubs two patchsets submitted earlier:
- [PATCH 0/3] stv0991: enable cadence qspi controller & spi flash
- [PATCH 0/3] stv0991: spi env & configs relate
Thanks Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: Wednesday, June 24, 2015 12:00 PM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; tr...@konsulko.com
> Subject: Re: [U-Boot] [PATCH 0/3] stv0991: spi env & configs related board
> changes
>
> Please
Thanks Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: Wednesday, June 24, 2015 11:54 AM
> To: Vikas MANOCHA
> Cc: Stefan Roese; u-boot@lists.denx.de; grmo...@opensource.altera.com
> Subject: Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT
Hi Simon,
Please find my comments inline -
>> diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/acpi_table.c
>> new file mode 100755
>> index 000..cefd5f4
>> --- /dev/null
>> +++ b/arch/x86/cpu/qemu/acpi_table.c
>
> We should split the routines below in this file into two parts
Hello everyone
I am currently working with the ODROID-x2 platform and the U-boot that
was using the u-boot by default, but support for the USB driver does not
work well. Then I started to use the version available at:
https://github.com/LeMaker/u-boot
The USB works well. Probe the network an
Am Mittwoch, 24. Juni 2015, 09:54:07 schrieb Kevin Hilman:
> Simon Glass writes:
> > The Rockchip RK3288 is based on a quad-core Cortex-A17 CPU and has a good
> > set of peripherals. Various full-featured U-Boot ports are available and
> > this is an attempt to bring those features into mainline.
Please test these - will pull these on my master-next
On 17 June 2015 at 03:04, Vikas MANOCHA wrote:
> Thanks Jagan.
>
>> -Original Message-
>> From: Jagan Teki [mailto:jt...@openedev.com]
>> Sent: Tuesday, June 16, 2015 3:50 AM
>> To: Vikas MANOCHA
>> Cc: u-boot@lists.denx.de; tr...@kons
On 24 June 2015 at 23:43, Vikas MANOCHA wrote:
> Thanks Stefan,
> Adding Jagan to apply the patchset.
I saw checkpatch.pl errors/warnings with 1 and 3 patches, please check
it those and resend.
Anyway I will apply these on master-next for next releases, is that fine?
>
>> -Original Message--
Thanks Stefan,
Adding Jagan to apply the patchset.
Rgds,
Vikas
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Wednesday, June 24, 2015 3:09 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com
> Subject:
Hi,
On 24 June 2015 at 11:39, Heiko Stübner wrote:
> Am Mittwoch, 24. Juni 2015, 09:54:07 schrieb Kevin Hilman:
>> Simon Glass writes:
>> > The Rockchip RK3288 is based on a quad-core Cortex-A17 CPU and has a good
>> > set of peripherals. Various full-featured U-Boot ports are available and
>> >
On 06/24/2015 09:00 AM, Roger Quadros wrote:
> If board is booted with transitions happening on DCAN1 pins then
> the following warning is seen in the kernel at boot when the
> hwmod layer initializes.
>
> "omap_hwmod: dcan1: _wait_target_disable failed"
>
> This is because DCAN1 module's SWAKEUP
Simon Glass writes:
> The Rockchip RK3288 is based on a quad-core Cortex-A17 CPU and has a good
> set of peripherals. Various full-featured U-Boot ports are available and
> this is an attempt to bring those features into mainline. With this series
> the Firefly RK3288 can boot to a prompt from an
Update boards that already include it, add DM options for those
that don't yet.
Signed-off-by: Peter Robinson
---
configs/aristainetos2_defconfig | 2 ++
configs/aristainetos_defconfig | 2 ++
configs/cgtqmx6qeval_defconfig | 2 ++
configs/cm_fx6_defconfig| 2 ++
config
These options were merged into mx6_common and were seemingly missed
in mx6cuboxi so drop the duplicates
Signed-off-by: Peter Robinson
---
include/configs/mx6cuboxi.h | 8
1 file changed, 8 deletions(-)
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 3f99512
On Wed, Jun 24, 2015 at 5:09 PM, Peter Robinson wrote:
> The first two patches are a resend and basic cleanups of duplicate includes
>
> The second two patches consolidate the fuse and thermal options. They're both
> options that are standard SoC features so should be there by default for all
> de
According to README.mxc_ocotp the OCOTP is a stanard i.MX6 SoC feature
so centralise the config in mx6_common.h so functionality is standard
across all boards
Signed-off-by: Peter Robinson
---
include/configs/aristainetos-common.h | 3 ---
include/configs/embestmx6boards.h | 5 -
include
The first two patches are a resend and basic cleanups of duplicate includes
The second two patches consolidate the fuse and thermal options. They're both
options that are standard SoC features so should be there by default for all
devices.
___
U-Boot ma
It's defind earlier in the file
Signed-off-by: Peter Robinson
---
include/configs/mx6_common.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 50370e1..b37477a 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6
Hi Bin,
>> You are correct I was confused about the usage of the dtb file in
>> U-Boot. I know it is probably outside the scope of U-Boot, but do you
>> have any pointers to info on linux x86 kernel usage of a FDT (dtb)
>> file for configuration source
> Please check kernel documentation boo
On Wed, Jun 24, 2015 at 7:44 AM, Peng Fan wrote:
> enable_spi_clock does the same thing with enable_cspi_clock.
>
> Signed-off-by: Peng Fan
> ---
> arch/arm/cpu/armv7/mx6/clock.c | 19 ---
> 1 file changed, 19 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/ar
Hi Tom,
On Wed, Jun 24, 2015 at 11:19 PM, Beaman, Thomas
wrote:
> Hi Bin,
>
> Thanks you for the quick response, my responses are embedded below
>
> On Wed, Jun 24, 2015 at 10:38 PM, Beaman, Thomas
> wrote:
>>> Hi Bin,
>>>
>>> I see that you have created a .dts file for the minnowboard max in
Hi Bin,
On 23 June 2015 at 21:59, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Jun 24, 2015 at 11:54 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 23 June 2015 at 21:46, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Wed, Jun 24, 2015 at 11:18 AM, Simon Glass wrote:
Hi Bin,
On 7 June 2015 at
Hi Bin,
Thanks you for the quick response, my responses are embedded below
On Wed, Jun 24, 2015 at 10:38 PM, Beaman, Thomas
wrote:
>> Hi Bin,
>>
>> I see that you have created a .dts file for the minnowboard max in
>> arch/x86/dts/minnow.dts What I cannot see is how to load and use this file.
Hi Simon,
On Wed, Jun 24, 2015 at 10:46 PM, Simon Glass wrote:
> To try to reduce the pain of confusion of binary blobs, add MD5 checksums
> for the current versions. This may worsen the situation as new versions
> appear, but it should still be possible to obtain these versions, and thus
> get a
+Simon
Hi Tom,
On Wed, Jun 24, 2015 at 10:38 PM, Beaman, Thomas
wrote:
> Hi Bin,
>
> I see that you have created a .dts file for the minnowboard max in
> arch/x86/dts/minnow.dts What I cannot see is how to load and use this file.
> I cannot find any example of its use.
You can read doc/READM
Hi Bin,
I see that you have created a .dts file for the minnowboard max in
arch/x86/dts/minnow.dts What I cannot see is how to load and use this file. I
cannot find any example of its use. In the RAMBOOT line zboot is used to load
the kernel and ramdisk, but it does not take a parameter for a
To try to reduce the pain of confusion of binary blobs, add MD5 checksums
for the current versions. This may worsen the situation as new versions
appear, but it should still be possible to obtain these versions, and thus
get a working setup.
Signed-off-by: Simon Glass
---
doc/README.x86 | 8 +++
If board is booted with transitions happening on DCAN1 pins then
the following warning is seen in the kernel at boot when the
hwmod layer initializes.
"omap_hwmod: dcan1: _wait_target_disable failed"
This is because DCAN1 module's SWAKEUP mechanism is broken
and it fails to correctly turn OFF if
Add I2C4 clock support for i.MX6SX. Since we use runtime check,
but not macro, we need to remove `#ifdef ..` in crm_regs.h, or
we will get compliation failure for other platforms.
Making the macros only for i.MX6SX open to other i.MX6x maybe not
a good choice, but we have runtime check.
Signed-of
Use enable_spi_clock, since enable_cspi_clock is removed.
Signed-off-by: Peng Fan
---
board/compulab/cm_fx6/spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
index 5b4b76f..5ce33d0 100644
--- a/board/compulab/cm_fx
enable_spi_clock does the same thing with enable_cspi_clock.
Signed-off-by: Peng Fan
---
arch/arm/cpu/armv7/mx6/clock.c | 19 ---
1 file changed, 19 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index ae99945..1134770 100644
--- a/arch
Hi Vikas,
On 23.06.2015 16:48, Vikas MANOCHA wrote:
-Original Message-
From: Stefan Roese [mailto:s...@denx.de]
Sent: Friday, June 12, 2015 5:10 AM
To: Vikas MANOCHA; u-boot@lists.denx.de;
grmo...@opensource.altera.com; dingu...@opensource.altera.com
Subject: Re: [PATCH 0/3] spi: cadence
> I'm build last u-boot for Wandoard device.
> After prepare SD-card with SPL and u-boot.img
> my device Wandboard Quad rev.B1 not boot.
>
> In console only one line:
> U-Boot SPL 2015.07-rc2-00133-g325849f-dirty (Jun 23 2015 - 20:54:12)
It's worked fine for me on the same device just now
I wrote
Hi u-boot@,
I'm build last u-boot for Wandoard device.
After prepare SD-card with SPL and u-boot.img
my device Wandboard Quad rev.B1 not boot.
In console only one line:
U-Boot SPL 2015.07-rc2-00133-g325849f-dirty (Jun 23 2015 - 20:54:12)
Can I'm help to fix this problem?
- Roman
__
This series adds several new uclasses. Some of these have been discussed
for a while. All are fairly simple and just provide enough functionality for
existing use cases. The following are included in this series:
- Clocks - setting and getting PLL and peripheral clocks
- Pinctrl - adjusting pin m
On Wed, Jun 24, 2015 at 8:55 AM, Yegor Yefremov
wrote:
> Hi Joe,
>
> On Wed, Jun 24, 2015 at 5:26 AM, Joe Hershberger
> wrote:
>> Hi Tom,
>>
>> On Tue, Jun 23, 2015 at 9:23 AM, Tom Rini wrote:
>>> On Mon, Jun 22, 2015 at 04:15:27PM -0500, Joe Hershberger wrote:
>>>
This config defined a CON
60 matches
Mail list logo
